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Full-chip integration at On Semi - Page 10 — Parallax Forums

Full-chip integration at On Semi

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  • jmgjmg Posts: 15,140
    David Betz wrote: »
    Didn't I just suggest that a few messages back? :-)
    Ah, yes, so that's another upvote :)

  • I would simply remove the hyphen whose originally intention was to break up the lengthy part number. Saying P2X tends to clutter IMO but nonetheless, here they are side by side (hyphen removed). The italics and stripes create a dynamic and note that there are 8 stripes to signify the fast parallel design of the chip.

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  • I would simply remove the hyphen whose originally intention was to break up the lengthy part number. Saying P2X tends to clutter IMO but nonetheless, here they are side by side (hyphen removed). The italics and stripes create a dynamic and note that there are 8 stripes to signify the fast parallel design of the chip.

    https://en.wikipedia.org/wiki/P2X_purinoreceptor
  • I would simply remove the hyphen whose originally intention was to break up the lengthy part number. Saying P2X tends to clutter IMO but nonetheless, here they are side by side (hyphen removed). The italics and stripes create a dynamic and note that there are 8 stripes to signify the fast parallel design of the chip.

    I prefer a large italicized "P2" with no "X". I'm not sure about the go-faster stripes. What does "X" signify?
  • TonyB_ wrote: »
    I would simply remove the hyphen whose originally intention was to break up the lengthy part number. Saying P2X tends to clutter IMO but nonetheless, here they are side by side (hyphen removed). The italics and stripes create a dynamic and note that there are 8 stripes to signify the fast parallel design of the chip.

    I prefer a large italicized "P2" with no "X". I'm not sure about the go-faster stripes. What does "X" signify?
    I thought the "P" and the "X" were for ParallaX but I'm not sure. A web search of "P2X" might be more likely to find the Parallax chip than just "P2" by itself.

  • I used X as a separator and in conjunction with 8C as x8 cogs but as P2-8C4M64P we could drop the the X.
  • TonyB_TonyB_ Posts: 2,099
    edited 2018-05-06 02:11
    I used X as a separator and in conjunction with 8C as x8 cogs but as P2-8C4M64P we could drop the the X.

    I like P2-8C4M64P as the part no. as the hyphen is a better separator than "X". Might there be more than one version of P2-8C4M64P and if so how would they be told apart?

    The large "P2" text would allow the chip to be identified or located on a PCB very quickly. Also a great help to the older generation!
  • cgraceycgracey Posts: 14,131
    Peter,

    Could I please order up some image files from you with the "P2-8C4M64P" and "P2-8C4M64PE" names and a BIG "P2" without any lines on its side? And those bottom letters need to read "AWLYYWWCCCCC". On Semi will know to replace those bottom letters with their own data. The image should have equal X and Y dimensions. I'll just send those to On Semi and we'll call it done.

    Hey, Everyone, FPGAs specify their RAM size in terms of bits, not bytes, too.
  • Good call chip.
  • TonyB_ wrote: »
    I like P2-8C4M64P as the part no. as the hyphen is a better separator than X. Might there be more than one version of P2-8C4M64P and if so how would they be told apart?

    The large P2 text would allow the chip to be identified or located on a PCB very quickly. Also a great help to the older generation!

    Actually, P2-8C4M64P has almost it entirely described.

    One possible missing point, if any, is its maximum clock speed, or MIPS rate, whichever would help make it a bestseller.

    I'll really would love to see 200MHz or 800 MIPS flagged somewhere, but, aside from space and visual-bloating concerns, we'll need to wait till OnSemi sends the engineering samples to Chip/Parallax, for final evaluation.
  • cgracey wrote: »
    Peter,

    Could I please order up some image files from you with the "P2-8C4M64P" and "P2-8C4M64PE" names and a BIG "P2" without any lines on its side? And those bottom letters need to read "AWLYYWWCCCCC". On Semi will know to replace those bottom letters with their own data. The image should have equal X and Y dimensions. I'll just send those to On Semi and we'll call it done.

    Hey, Everyone, FPGAs specify their RAM size in terms of bits, not bytes, too.

    If the italicized "P2" occupies the same rectangle as the original here, the result would be most impressive.

  • Peter JakackiPeter Jakacki Posts: 10,193
    edited 2018-05-06 06:59
    cgracey wrote: »
    Peter,

    Could I please order up some image files from you with the "P2-8C4M64P" and "P2-8C4M64PE" names and a BIG "P2" without any lines on its side? And those bottom letters need to read "AWLYYWWCCCCC". On Semi will know to replace those bottom letters with their own data. The image should have equal X and Y dimensions. I'll just send those to On Semi and we'll call it done.

    Hey, Everyone, FPGAs specify their RAM size in terms of bits, not bytes, too.

    Just got back home, here's a png plus the odg format file which is an open format that I use with my decal suppliers as I can use objects and layers and exact sizes and positions etc. I use LibreOffice suite which runs on Windows/Mac/Linux.

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  • cgraceycgracey Posts: 14,131
    cgracey wrote: »
    Peter,

    Could I please order up some image files from you with the "P2-8C4M64P" and "P2-8C4M64PE" names and a BIG "P2" without any lines on its side? And those bottom letters need to read "AWLYYWWCCCCC". On Semi will know to replace those bottom letters with their own data. The image should have equal X and Y dimensions. I'll just send those to On Semi and we'll call it done.

    Hey, Everyone, FPGAs specify their RAM size in terms of bits, not bytes, too.

    Just got back home, here's a png plus the odg format file which is an open format that I use with my decal suppliers as I can use objects and layers and exact sizes and positions etc. I use LibreOffice suite which runs on Windows/Mac/Linux.

    Thanks, Peter.

    One problem, though: I can't open .odg files and I don't know that On Semi can, either. Could you make a .png of just the square marking?

    Also, what if "P2" is made 'bold', or is it, already? I think it would be nicer if it could fill the space a little more. Maybe even try it non-italicized.

    And, we need the "P2-8C4M64PE" version, too, for the engineering samples.

    Thanks.
  • Peter JakackiPeter Jakacki Posts: 10,193
    edited 2018-05-06 07:35
    cgracey wrote: »
    Thanks, Peter.

    One problem, though: I can't open .odg files and I don't know that On Semi can, either. Could you make a .png of just the square marking?

    Also, what if "P2" is made 'bold', or is it, already? I think it would be nicer if it could fill the space a little more. Maybe even try it non-italicized.

    And, we need the "P2-8C4M64PE" version, too, for the engineering samples.

    Thanks.

    I could easily make that change but anybody with any kind of computer can click on that LibreOffice link and install it. Then you can go to town with different versions. LibreOffice (the open fork of the not so open OpenOffice) is totally free and all I ever use.

    P2-8C4M64P-CHIP-M.png
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  • Cluso99Cluso99 Posts: 18,066
    P2%20chip%20label.png
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  • cgraceycgracey Posts: 14,131
    Looks good. Thanks, Peter. I will load that app later.

    P.S. I emailed you a BeMicro-A9 image with v133a ROM and switched pins.
  • cgracey wrote: »
    Looks good. Thanks, Peter. I will load that app later.

    P.S. I emailed you a BeMicro-A9 image with v133a ROM and switched pins.

    Thanks Chip, I've been loading the code at $FC000 with the ROM version FPGA myself but it is overwritten on any hard or hub reset or power-up of course. I'm looking at using the same software except for one tiny thing in that the first thing it does is check for a pull-up on P0 and if found it then overlays the ROM with code from a SPI Flash on P0..P2. This simulates a programmable persistent boot ROM since all I need to do is remove the pullup from P0 and the PROM will boot with normal checks etc. We wouldn't use this version for the final but maybe we could just nop out the call so that we can keep the source the same. I will check and send you a ROM source shortly.
  • Cluso99Cluso99 Posts: 18,066
    Chip, (and Peter)
    What is configured on P61 in the FPGA? v133a
    My meter is not seeing a pullup on P61 but P2 test software is seeing a permanent pullup.
    This should be connected internally to the CLK pin of the SD (which does not have a pullup on it) and also to the P61 pin header.

    Any thoughts?
  • Cluso99Cluso99 Posts: 18,066
    v133a is reaching the "> " and responds to the Prop_Chk 0 0 0 0 "
    But there is nothing from <esc>, Ctl-D or ctl-B.

    I tried loading my test pullup/pulldown code and that works fine - it has an old version of serial which works fine but shows a pullup on P61 which should be trying Flash booting.

    I tied downloading my SD code with the new pinout but no joy :(

    That's all for tonight. I am working tomorrow so it will not be until tomorrow evening before I get time to do further testing to see what is wrong.
  • ErNaErNa Posts: 1,738
    my nxt tshirt will show: me too - P2
  • OMG T-Shirts with the full chip image on them would be Awesome !!!
    There could be circuitry "wiring up" the chip going all over the shirt too.


    Yeah...totally off topic... but too cool not to mention :-)

    J
  • Personally, I think this is a retrograde naming solution overall.

    For people in the know, somewhat, P2 means its the successor of the P1.
    But then, people in the know are already in the know, so you could call it PAnything and they'd know.

    Regardless of the hit to anyone's ego, I'd suggest not trying to tail off of the P1.
    Its unjustified, however it is what it is, and the public rep of the P1 isn't and never was steller.

    The P2 is similar, however with Interrupts, etc, its a distinctly different and better device.
    All of the past complaints are largely nullified, so why tie an albatross around its neck?

    I think something like the Parallax X832 is short and memorable, 8-core,32bit self-evident upon introduction, and largely differentiates it from the P-Series.

    Thats the branding part of it.
    The actual part # could add on memory and pins, however thats inside baseball details relevant to data sheets.

    Everyone knows, or should know, that the P2 is going to have a hard, uphill battle across the current industry and Maker-verse.
    It is instantly going to be branded a re-hash of the P1, for better or worse. Mostly worse.
    Getting away from the P and Propeller, even if just publicly, should give this new device the chance for a fresh look from many.

    Thats just my $0.02.
  • koehler wrote:
    ... Thats just my $0.02.

    +1 (Make it $0.03. :) )

    I like the X832 idea, or something similar. Easy to remember and market. Nobody will remember or identify with a part that has nine characters in its part number.

    -Phil
  • kwinnkwinn Posts: 8,697
    edited 2018-05-07 18:10
    koehler wrote:
    ... Thats just my $0.02.

    +1 (Make it $0.03. :) )

    I like the X832 idea, or something similar. Easy to remember and market. Nobody will remember or identify with a part that has nine characters in its part number.

    -Phil

    +1. Only make it 8X32. Makes it $0.05 - no pennies here any more.
  • cgraceycgracey Posts: 14,131
    Anyone (Peter?) want to take a stab at an X832 part marking?

    I've got to go to my mom's today and I don't have much time to deal with this, right now.

    I agree a simpler name could be good.
  • kwinn wrote: »
    +1. Only make it 8X32. Makes it $0.05 - no pennies here any more.

    Beware that P1 is labeled P8X32A.
  • Since there is a family of different P2s planned, the mentioning of COGs and Hub makes sense.

    Enjoy

    Mike
  • cgraceycgracey Posts: 14,131
    The Apple ][ was reknowned, even though almost nobody knew what an Apple (One) was.
  • jmgjmg Posts: 15,140
    macca wrote: »
    kwinn wrote: »
    +1. Only make it 8X32. Makes it $0.05 - no pennies here any more.

    Beware that P1 is labeled P8X32A.

    The plus aspect of a label that starts P8X, is you can also hit the existing P1 part.
    The down side, is other vendors have already taken the pathway of STM8, EFM8, STC8 family naming, and for all of those the 8 means 8 bits, not 8 cores.

    Calling something a full 8X32 is too similar to the existing P1, which is rather different, but P8X512 could share the prefix, and tag the memory size, which is also what P1 does.
    Anyone seeing P8X32 and P8X512 part codes, has a natural expectation the P8X512 is a more powerful animal, in the P8X stable.
  • jmgjmg Posts: 15,140
    koehler wrote: »
    Everyone knows, or should know, that the P2 is going to have a hard, uphill battle across the current industry and Maker-verse.
    It is instantly going to be branded a re-hash of the P1, for better or worse. Mostly worse.
    Getting away from the P and Propeller, even if just publicly, should give this new device the chance for a fresh look from many.
    That does not really make sense, as the natural continuation of that argument is to then also remove Parallax, in the quest for 'fresh'.
    If you include Parallax, it becomes quickly clear to even the most ignorant reviewer, that P2 is an enhanced P1.

    Of course, there is a solid argument to call it more than P2, valid since it has had so many iterations. P2 suggests 'just another small increment'..... A higher value than 2 ?
    Or, you just swallow the P8X prefix as established and let the 512 be different enough from 32 to alert chip browsers.


    'Fresh' is over rated, and the venerable 8051 is undergoing a strong resurgence at the moment, especially in Asia.

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