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P2DIP1 Board Design - Page 4 — Parallax Forums

P2DIP1 Board Design

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  • RaymanRayman Posts: 13,850

    Add a 10k pullup resistor to the P2 reset pin

  • ke4pjwke4pjw Posts: 1,073
    edited 2023-12-04 19:53

    I think you need some decoupling caps right at the P2's 1.8V inputs, too.

    Jeri can show you the importance of decoupling caps at the 54 minute mark.

  • jmgjmg Posts: 15,144

    @jlsilicon said:
    Ok.
    I built a 2nd board.

    I was getting Detect every other click.
    And I uploaded Blink to board a few times ;
    -- Wrong Blink though - it used Ext Clk - so I could not see it running successfully.

    I added 1uF and 0.1uF and 10uF caps across both Vdd 1.8V , and Vio 3.3V .

    Now I can't Detect at all.

    -

    I am Confused,
    I added the Caps - now I don't detect the P2 on either board at all.
    Without the Caps, sometimes I could detect the P2 on both boards ...
    -- Does this make sense ???
    Why ??

    Decoupling caps are NOT something you get to “add later, when you feel like it”
    If the regulators oscillate, the voltage swings may be enough to damage a P2

    @jlsilicon said:
    I agree, I am aware of ground plane.
    But I am just aiming right now to get it booting at Low CLK Speed.

    “Low clock speed” does not mean the icc peaks are less, it merely means they are more spaced.
    You do not get to avoid GND planes, just by thinking a clock is slow.

  • RaymanRayman Posts: 13,850

    @jmg is correct about decoupling caps. You can check the datasheet for the regulator and it will say what kind is recommended. But, the regular ones just need ~10uF tantalum caps.

    You might be able to get away with medium frequencies and no ground plane. Somebody showed a homemade PCB like that I believe...

  • jlsiliconjlsilicon Posts: 92
    edited 2023-12-04 22:47

    I forgot :
    The Reset has a 10K pullup at the P2 res Pin also.

  • jlsiliconjlsilicon Posts: 92
    edited 2023-12-04 23:48

    There is also a Reset 10K pullup.

    Thanks, it was already there.
    It was not part of the Plug circuit , but strapped to the chip Reset pin.
    So I forgot to draw it in the Sch.

  • RaymanRayman Posts: 13,850
    edited 2023-12-04 23:35

    So the Parallax edge breadboards are also designed for PropPlug usage, as I recall. Might want to look at that schematic.
    You might also need 10k pullup on P61. I think that selects the boot mode where it first checks serial and then boots from flash...

  • jlsiliconjlsilicon Posts: 92
    edited 2023-12-05 00:32

    I don't know whats left to cause the boot problem now.

    I tied p59 ---- 10K ---- +3.3V

    I tied p61 ---- 10K ---- +3.3V

    I tied p62 ---- 100K ---- +3.3V
    I tied p63 ---- 100K ---- +3.3V

    p61 just connects to the Flash CS

    -

    Still not much result.

    -

    I am using the FTDI32 +5Vout. i believe that this is directly off of the USB +5V , so a limit of 500mA .
    Is this enough for the P2 to Boot and run ?

  • Make sure you are loading RAM (F10) and not EEPROM (F11).

    Also, you can place a pullup on P59 it will ensure a 60 second serial window.

  • RaymanRayman Posts: 13,850

    Assuming I recall correctly, the prop plug leds can help diagnose a bit.

    Think see green when pc interrogates P2 after reset and then red is P2 reply.

    Also since real trouble happpened when you say caps were added , might want to make sure polarized caps aren’t in backwards, causing them to short out.

    Or, use multimeter to verify 1.8 and 3.3 rails are at correct voltage …

  • RaymanRayman Posts: 13,850

    If still broke be aware that even momentarily touching a pin to more than 4 volts will make entire four pin group damaged beyond repair.

    So, it’s easy to damage p2 when getting feet wet…

  • jlsiliconjlsilicon Posts: 92
    edited 2023-12-05 00:58

    Rails 1.8V and 3.3V read correctly on multimeter.
    Yes, p59 is tied high via 10K.
    Caps are not polar - just mica & ceramic - not tantalum / polarized.

    Ftdi32 flickers back and forth. Once in a while (1 out of 20 ?) , I get a Detect P2.

    I Always use Upload-to-Ram(F10) , and Detect device (F7).

  • Is VSS solid between the programming plug and the board?

  • RaymanRayman Posts: 13,850

    all tantalum are polarized...

  • jlsiliconjlsilicon Posts: 92
    edited 2023-12-05 01:09

    Sorry Ceramic and Mica (not Tantalum).

    Vss on Board Gnd Pin to FTDI32 Gnd to Chip base Gnd - seems close to 1 ohm.

    There is one Polar on the Lower Right 10uF - wired correctly.

  • TubularTubular Posts: 4,621
    edited 2023-12-05 01:30

    One other check that doesn't involve any serial is just to watch the Vdd current for a minute. During that minute the P2 is waiting for instructions, running on RCfast and consuming (i forget, maybe ~3mA or ~30mA). After 60 seconds it shuts down and draws next to nothing, ~30uA. (edit: shuts down at least until it gets a reset pulse)

    It may be hard to break the circuit to measure Vdd, but you should see the same current on the supply going in since you have linear regs.

    So this is something you can check without serial at all.

  • jlsiliconjlsilicon Posts: 92
    edited 2023-12-05 01:30

    The P1 DIP chip seems easy to program and use.

    This P2 is like pulling teeth.
    I was going to order more chips for my boards ...
    but so far not much success to follow.

  • Keep going, you'll get there. By now It should be working and identifying at least at low speed. Its true that 'minimum' diagram ought show at least a cap on each rail

    Do you have a scope for looking at the reset pulse shape? I'd try removing that 10k in series with the base of the reset transistor, we don't normally have that for P2 (refer Prop Plug schematic). It might be softening the reset pulse too much

  • I jumped a wire over the 10K to 2n3904 base.
    Still no detect P2.

    I am too tired to use the Scope tonight...

  • @jlsilicon said:
    The P1 DIP chip seems easy to program and use.

    This P2 is like pulling teeth.
    I was going to order more chips for my boards ...
    but so far not much success to follow.

    FWIW, I had one of the Rev A chips, way back when, and you are doing things I have yet to do. That's laying out and having a board produced just for the chip. SMT was just too intimidating. Keep going! You will get it.

  • jlsiliconjlsilicon Posts: 92
    edited 2023-12-05 02:16

    I have Designed and ordered/manufactured boards many times for different Microcontrollers, etc.
    -- I have assorted projects lying around from them.

    I often design / produce boards for Projects for my Robots.

    I remember 20 years ago, I had purchased a case of couple-100 of Fujitsu ARM Microcontrollers, high speed, 32bit I think.
    I also had to write the Assembler & C compiler & Programmer SW. (Fujitsu wanted to charge few $1000 dollars for compiler SW)
    Besides design the boards and order them.
    Then debugged them, and wrote simple IO programs for them.
    It was fun.

  • evanhevanh Posts: 15,170
    edited 2023-12-05 02:32

    Is there caps at the 1v8 regulator as well? It doesn't look like there is.

  • jlsiliconjlsilicon Posts: 92
    edited 2023-12-05 02:48

    Caps 0.1u , 1.0u , 10uF connected to VReg 1.8V underneath to the VReg Pin Tips (easier than trying to mount on the top VReg directly).

    Same for the VReg 3.3V - you can see the Caps for VReg 3.3V sticking out on Right in photo.

  • evanhevanh Posts: 15,170

    You'll want 10 uF Vin to Gnd and 10 uF Vout to Gnd on each regulator.

  • jlsiliconjlsilicon Posts: 92
    edited 2023-12-05 03:11

    You can see , that there is a Cap 10uF in front of the 2 VRegs on the Lower Corner.
    The Cap connects closely to the VReg 3.3V Vin and stems 1cm to the VReg 1.8V VIn.

    Each VReg 3.3V & 1.8V have the 0.1u & 1u & 10uF Caps connected to their VOuts, underneath the Board.

  • evanhevanh Posts: 15,170

    Ah, when using an aluminium can type you'll also want 100 nF across Vin-Gnd at the regulator pins too.

  • jlsiliconjlsilicon Posts: 92
    edited 2023-12-05 15:38

    I have (1) more chip that I can mount on a board.
    It was mounted on a breakout board before I designed these boards (but never used).
    I removed it with minimal effort using a heat-gun. Hopefully it wasn't damaged.

    I just mounted the chip on another P2DIP3 Board this morning.
    I can start from scratch (in case, hopefully not, that these 2 board chips may/were electrically damaged).

    What are the best Caps to mount directly across the chip Vdd pins then ?
    -- I looked over the Spec again, I see the suggested 'Chip Connections' - but I still don't see suggested Caps config/mounting anywhere.

  • RaymanRayman Posts: 13,850

    I would suggest 1 uF ceramic caps for Vdd and Vio. My board has a lot of them, one for each set of four pins. But, one can probably get away with less.

  • Parallax has the schematics for a couple boards available:

    Edge module : https://www.parallax.com/package/p2-edge-module-schematics/
    Eval board : https://www.parallax.com/package/propeller-2-evaluation-board-rev-c-schematics/

    Just thinking they show a couple known working ways of hooking things up, so something to cross-reference with your own design.

  • RaymanRayman Posts: 13,850
    edited 2023-12-05 17:02

    Here's an old 2-layer design of mine with a lot less caps, but still worked:
    https://forums.parallax.com/discussion/173589/simple-low-cost-p2-board-1st-one-seems-to-work#latest

    The Parallax 6-layer designs are better though...

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