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P2-ES Board Support — Parallax Forums

P2-ES Board Support

Jeff MartinJeff Martin Posts: 760
edited 2019-11-07 18:16 in Propeller 2
The limited-run P2-ES Rev B boards are available November 2019.

Visit the P2-ES product page for more information.


History: The P2-ES Rev A boards were built and shipped out in December 2018.

This thread is your official place to receive and give support for this product.

Please keep non-support topics for the P2-ES in the Parallax P2 Eval Board thread.

In addition, you can visit the Propeller 2 product page and also can help curate the Propeller 2 Repository by sharing code examples, documentation, and links to resources you and your fellow community members create.
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Comments

  • PublisonPublison Posts: 12,366
    edited 2018-11-30 22:28
    I am going to remove all above post because they are not pertinent to the thread as Jeff requested. I tried to move them, but that is not possible. This is to keep this thread clean for Jeff.
    For those of you that receive one, this thread is your official place to receive and give support for this product.

    Please keep non-support topics for the P2-ES in the Parallax P2 Eval Board thread.


    http://forums.parallax.com/discussion/169182/parallax-p2-eval-board#latest
  • The people who have been working with the FPGA boards know the tool set needed to work with them. Are they the same for the P2-ES?

    I know that Parallax is diligently working on spin 2 and other language tools are being developed by several of the dedicated customers, I suspect that these will be as easy to set-up and use as everything for the P1 has been, however not having programmed the FPGA 's, I am at a loss for what I will need to start programming the evaluation board.

    I have a board on order that I haven't the faintest idea of what tools are available to program it. I have most of the documentation. I know what's on the board, I've looked at the sample code etc. but I still don't know how I will get code compiled and downloaded into the prototype board.

    Could you provide links to information specific to setting up the software tools I will need to start working with my P2-ES when it arrives?
  • The minimum you need is pnut.exe to write PASM.

    Unlike P1, P2 will run code from HUB or COG. Makes getting started with PASM pretty reasonable. One could load one of the example programs and just add to that. Pnut is really lean. But it does offer the basic, write it, then hit F10 to run flow.

    Then we have the tools Dave Hein and Ersmith have made. My FPGA boards got water damaged. I have not used either yet. Both appear capable ofsubstantial programs.

    I am pretty sure that gets us C, SPIN, BASIC, PASM.

    Peter made Tachyon Forth. A small version if it is contained in the P2 ROM. A fuller featured one is a quick load from sdcard.

  • kwinnkwinn Posts: 8,697
    .
  • Thanks Potatohead,

    I know that I'm missing something that should be obvious, but I've been looking for the past 30 minutes and NONE of the searches in OBEX, Parallax Home, resources, etc. have given me a clue about where I can get pnut.exe.

    Even GOOGLE SEARCH didn't bring up any references to Pnut.exe (other than back to Parallax) which seems pretty odd.

    I know I'm not the big brain that most of the people who have been doing FPGA work are... but I feel pretty stupid not even being able to FIND it. I'll probably be the only one actually purchasing one of the P2-ES who DOESN'T know... but just in case, can you (anyone) help me find where to get it?
  • potatoheadpotatohead Posts: 10,261
    edited 2018-12-03 21:03
    You have to get that from the fpga file distribution currently. I think that needs to be broken out, and packaged for the rev A Chip.

    I would just go ahead and link one, but I'm not sure which one matches the Rev a silicon at this point. My fpga boards got damaged, and I myself am waiting for an evaluation board.

    In those distributions, there is pnut.exe, and a few sample programs to work from, all in pasm.

    Lol, plz try not to feel stupid. Yours are the first of a ton of questions we all are going to ask. No worries just onward!

    I just asked Chip if he would do this, he replied he would. So I think the best thing to do is just stand by.
  • From another forum thread, the following link will give you the latest of Chip's PNut editor/compiler/loader, used to program the FPGA variants of P2. This should work with the P2 Eval board, since I believe it's what Chip is using. Of course, this is a WIN-based solution: https://drive.google.com/file/d/1huxRvHmr07ItoO06rLYGsOKmMQVEOA4R/view

    There are other ways to program the P2 (& appear to be cross-platform supported in source), but the above will give you a start (i.e. read the other P2 threads for info on p2asm, fastspin, etc...)

    dgately


  • WhitWhit Posts: 4,191
    Wish I knew enough about this to play. The P2, the Board and the Box look great!

    Go Team, Go!
  • Whit wrote: »
    Wish I knew enough about this to play. The P2, the Board and the Box look great!

    Go Team, Go!
    And you think the rest of us know enough? We just like fun new toys! :smile:

  • Yup, they are shiny and new. :)
  • kbash wrote: »
    The people who have been working with the FPGA boards know the tool set needed to work with them. Are they the same for the P2-ES?

    I know that Parallax is diligently working on spin 2 and other language tools are being developed by several of the dedicated customers, I suspect that these will be as easy to set-up and use as everything for the P1 has been, however not having programmed the FPGA 's, I am at a loss for what I will need to start programming the evaluation board.

    I've gathered together some tools for programming the P2 FPGA and bundled them with a very simple IDE as "spin2gui". You can find the most recent release at:

    https://github.com/totalspectrum/spin2gui/releases

    This should also work on the P2-ES, but obviously we haven't had a chance to test it yet. In the meantime, it does work on P1 as well, so you can test it out there (under Commands > Configure Commands... hit either "P2 defaults" or "P1 defaults" to switch between the two processors).

    The compiler included with spin2gui is called "fastspin", although someday that name should change, because it now supports not only Spin but also BASIC (see docs/basic.md) and a little bit of C.

    Eric
  • ersmith wrote: »

    I've gathered together some tools for programming the P2 FPGA and bundled them with a very simple IDE as "spin2gui". You can find the most recent release at:

    https://github.com/totalspectrum/spin2gui/releases

    This should also work on the P2-ES, but obviously we haven't had a chance to test it yet. In the meantime, it does work on P1 as well, so you can test it out there (under Commands > Configure Commands... hit either "P2 defaults" or "P1 defaults" to switch between the two processors).

    The compiler included with spin2gui is called "fastspin", although someday that name should change, because it now supports not only Spin but also BASIC (see docs/basic.md) and a little bit of C.

    Eric
    Eric,
    Thanks for the link to "spin2gui". I have downloaded and installed it. I am anxiously awaiting for my P2-ES board.
    Regards, zappman

  • It would be very useful if PNut could be updated to allow for the selection of COM ports above COM9. Because of the way Windows ties COM ports to specific USB devices, my ES board ended up being COM10. There are conflicting instructions for resetting this at the Windows level, some of which involve things like registry editing.

    I was able to override by going into the advanced settings of the FTDI driver in Device Manager and ignoring a warning about possible conflicts, but we should just be able to pick any port.

  • potatoheadpotatohead Posts: 10,261
    edited 2018-12-25 15:55
    Pnut is temporary dev tool. It is super lean so it does not get in the way of other things.

    Once Spin 2 is done, something better will be the target.

    For now, we just need to set a low com port.
  • RaymanRayman Posts: 14,727
    It took me a few minutes to get any kind of serial response from my P2 eval board...

    Was typing in ">" and " " and got nothing... Finally noticed in the Taqoz thread that you have to hit the ESC key to get that prompt.

    Or, from the docs, you can type “> Prop_Chk 0 0 0 0”+CR
    to get the prop version.

    Maybe too late, but my suggestion would be to return something, maybe an underscore or anything when CR is typed after a "> " combo.

    Personally, I'm not a big fan of the "0 0 0 0". I hope somebody is really going to need that one day to make it worth while...
  • RaymanRayman Posts: 14,727
    edited 2018-12-25 11:23
    I saw somebody post about the LEDs... It seems the natural inclination to grab the board by the left side, top and bottom. Unfortunately, fingers tend to touch the P60 header that turns the P60 and P61 leds off.

    I know Chip said some led pins are floating and so sensitive to touch...

    I'm not sure yet why P60 and P61 leds come on at boot.
    Really not sure why touching P60 turns P61 led off...

    Anyway pin headers might be used as an input device :)
  • RaymanRayman Posts: 14,727
    edited 2018-12-25 11:37
    I have to admit it is kinda nice to have the TAQOZ# prompt there, after you figure out how to invoke it (">" then " " then ESC).

    Can do simple things like "60 blink" to make P60 led start blinking...

    Nice when first starting out, to make sure it's alive...
  • Rayman wrote: »
    I'm not sure yet why P60 and P61 leds come on at boot.
    Really not sure why touching P60 turns P61 led off...

    There are a couple of small caps added around P60 and P61 to help with boot pathway. These shouldn't be needed on production silicon. They might have something to do with those leds coming on at boot, or it could be related to boot code checking the flash or uSD
  • Cluso99Cluso99 Posts: 18,069
    P60 & 61 are /CS and CLK to FLASH/SD.
    These should flash on while the boot code is determining if booting from either.
  • RaymanRayman Posts: 14,727
    I'm feeling like having 5V on these I/O headers is an accident waiting to happen...

    Getting ready to connect to VGA, but one small mistake will fry my P2 (at least I think that is what would happen)...
  • Chip previously mentioned here somewhere that the IOs would tolerate 5V for a short time.

    Pros: The 5V enables addons to have their own LDOs for higher current addons, and 5V is needed for USB slaves (for example).

    In the context of this Eval board, the desire was to bring out all possible signals and power rails for user experimentation. Sure, with that people should take care. I think people are used to that though?
  • RaymanRayman Posts: 14,727
    edited 2018-12-25 18:47
    I just noticed that the VGA examples from Chip have to be modified to run on silicon...

    Not just the clockset but also the DAC settings.

    Fortunately, ozpropdev already figured this out and it's in cluso's VGA 1080p example.

    Vsync pin also needs changing from 0 to 4

    Looks like DIRA also needs 4 bits set.

    What is with dacmode? doesn't seem to match documentation...
  • evanhevanh Posts: 16,022
    edited 2018-12-25 21:31
    Rayman wrote: »
    What is with dacmode? doesn't seem to match documentation...

    My summary in the original topic - https://forums.parallax.com/discussion/comment/1450406/#Comment_1450406

    And reposted in tricks&traps - https://forums.parallax.com/discussion/comment/1452036/#Comment_1452036


    EDIT: Oh, I see a typo in the BIT_DAC mode line "%TT = R1x" should be "%TT = %1x" ....

  • RaymanRayman Posts: 14,727
    I meant the %PPP... bits
    Docs say "%101xxDDDDDDDD = DAC mode, %DDDDDDDD: DAC output level"
    but, I think this is wrong as it seems the "xx" bits decide output strength
  • evanhevanh Posts: 16,022
    edited 2018-12-25 21:51
    Yep, my post is the entirety of %PPPP..... and nothing else. Maybe I need to make that clearer somehow ...

    EDIT: There, I've just changed the first line to start with %PPPPPPPPPPPPP

  • RaymanRayman Posts: 14,727
    edited 2018-12-25 22:00
    I see I needed to scroll down in your list...
    That helps, thanks.

    Maybe VGA support needs a thread...
    I think the VGA driver is in this mode:
    for %TT = %01 and %MMMMM = %00000, %101_VV_xxxxSSSS = COG_DAC mode
    			%SSSS = Cog/streamer select: sets DAC level (registered?)
    

    But, can't decipher that...
  • evanhevanh Posts: 16,022
    Rayman wrote: »
    But, can't decipher that...

    It's a pin config without any smartpin mode. If you want to do a SETDACS instruction then that is the needed prep. Streamer output to DACs has same pin config.

    I assume the proper way will be to use a COGID to fill %SSSS with.

  • evanhevanh Posts: 16,022
    Jeff,
    It would be good to have Cluso's tricks and traps topic linked from your opening post - https://forums.parallax.com/discussion/169069/p2-tricks-traps-differences-between-p1-reference-material-only/p1

  • Is there any documentation surrounding how to make the SD bootable? I know there were two options, Cluso's boot code and TACOZ. Is there any documentation ofthe DIP switches?

    Thanks,
    Terry
  • there's a table describing the dip switches in the product guide- search 64000 on the Parallax shop.

    does that solve?
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