Well US Pacific and it is noon thirty here, waiting patiently, where is parallax located what timezone??
Funny enough I just found the propeller a maybe a week and a half ago and am loving everything about it almost... I have a huge project I am planning and the problem is between the ARM and Prop CPU's i can only about 5000MIPS, which is pretty low for the apraoxamite 200 dollar price tag this thing will take to build. The project is all about processing data so I am super excited that the Prop2 will give my board a huge kick in the *** up to 22230MIPS not counting the fpu's im going to use. I just want to make sure my numbers are correct with the data we have. The euqation i am using is mhz*cores/cycles per instruction so for 16 propeller 1 chips i get 100*128/4=3200for the prop2 i get 160*128/1=20480. For a single Prop 1 vs Prop 2 were looking at 160 vs 1024 mips. This is a HUGE Boost. while its still no ARM cortex 12 1.5ghz quad core its damn fast. And the fact that the chip can easily drive a flat panel (which 99% of us probably use) so we can put the crts back in the garage again just sweetens the pot.
My major concern that I havent seen anything about parusing this thread is if the prop2 is going to be within the same price range as the prop1. If the price gets over 15 bucks thats really gonna kill my plan. Im hoping the prop2 will get set at 10 bucks and the prop 1 will stay in manufacturing (even with the prop2 the 1 is a good chip for alot of things and has its place) and get dropped to 6 or lower. If both chips stay and are resonably priced we will all propbably come up with some cool reasons to connects the two togather.
Ok the link posted above my previous post is updated now never saw the old one but those specs are pretty nice and align with hunts dropped in this thread.
Heres what fn sucks Package Type 128 pin SMD, nothing about a DIP on the specs, please tell me there will be a dip!!
rwgast: There is no chance the Prop 1 will stop production. In fact, IMHO I believe the P2 will boost P1 sales. The P1 uses a lot less power and will still have its place. P2 was at one stage anticipated to be ~$10 but I think that has crept up a bit. P1s can be had at near $6 in relatively low volumes from DigiKey. If you use volumes of P1 I am sure you can get to $6.
BTW I no longer own any CRTs. All replaced with LCD VGAs (some have composite in too) and the P1 drives them all nicely
While we are all looking forward to all the P2 features, ATM I/O and hub ram are the most critical to me, followed by speed.
Postedit: No DIP but there will be transition pcbs. (please be careful with language... we have kids on these forums)
Ok the link posted above my previous post is updated now never saw the old one but those specs are pretty nice and align with hunts dropped in this thread.
Heres what fn sucks Package Type 128 pin SMD, nothing about a DIP on the specs, please tell me there will be a dip!!
There was never going to be a DIP package from day one. Not too many 128 pin DIPS out there. We are in the 21st century now. Many ways to deal with it. Eval boards will show up within weeks from the launch, and breakout board are already in the making.
I have mixed emotions about he Propeller II coming out. I'm just starting to feel comfortable programming the Propeller I. I'm still clueless about video drivers and the like (other than using ready made objects).
I fear I'll have a lot of new learning to do to get up to speed on the Propeller II.
On the other hand, like everyone else many forum members I have wanted to do things that were beyond the Propeller I's abilities. I will be very nice to be able to use high speed parallel memory.
My brain is starting to hurt thinking about the possibilities.
If the price gets over 15 bucks thats really gonna kill my plan. Im hoping the prop2 will get set at 10 bucks
I recall mention of ~2x Prop1, which will mean $15-ish, and heading to $10 in volumes.
Of course, such estimates likely do not include accurate testing costs, and a Prop II is going to be a challenge to test fully !!
(Tester time == chip $$ )
Sorry for the language, I just got a little frustrated. It kind of sucks when you first start understanding electronics and you are excited to do all this stuff with but you realize the some of the stuff is not possible to do without using smc, which is a hard skill to learn, and to boot smd components dont work on cheap easy prefboard so you have to learn to etch. Dont get me wrong these are two very achievable goals for a hobbyist who is motivated. But for the beginner who just wants to build and learn more theory spending money and time to learn to surface solider and etch isn't the most productive thing in the world. I have a cheap weller iron from wal-mart (when funds are available this will get upgrated to an adjustable pencil tip, but for now it works) i think and tons of radio shack soldier, plus a pile of unused prefboard and a nice breadboard, when it comes to smc basically nothing I own will work between an etching kit and an iron alone thats 60 (also add in the price of the chips you trash while learning) bucks that could be spent on components of literature, not to mention your going to need access to a cnc or at least a drill press, maybe a vice and dremel would work? Dont get me wrong Im not fighting the future and in time will learnt etching and cnc, its just frustrating that the complete newbies with no fear and a huge motivation to do things get held back from there ideas becuase they cant work with smc.
Anyways I understand it would be a huge DIP and were moving into the future but lets face it folks this is a hobbyist game I mean yes these chips/platforms are used professionally too, no doubt, and the pros want a small size. But in propellers case Im pretty sure this chip is driven by us the people who throw boards together to run robots, turn off lights, experiment with parallel and super computing concepts, and people like me who love to re invent the wheel to gain more knowledge have more projects on a resume. After my proto board is done, i plan to learn how to design a prefboard full of transistors/capacitors and what ever other components I need to make a very simple RAM cell. If im lucky maybe ill be able to build a 16 byte board or something, i believe theres alot to learn by doing this and writing a driver and coming up with a way to address. Once I know the fundementals at an intament level like that I belive I will be proficent enough to handel setting up a good memmory interface, maybe with enough effort I will be able to set up some old 70ns dram out a 486 on a prop board by emulating the x86 memmory adressing controllers with prop chips or an fpga, which is one of my subgoals to a larger goal later that the prop 2 will definitely let me hit.
It just makes me sad as a hobbyist I am going to have to shell out more for a prop 2 chip than a prop 1 in the first place, but I completely understand paying more for a more powerfull chip as long as it within reason . But now Im also going to have to spend an extra 2 to 5 dollars a chip to build a massively multi-core computer becuase each mcu(im pretty sure the prop two breaks into the cpu class) will need a breakout board. Im so impressed with the propeller Big Brain project its awe inspiring and to do the same thing with prop2s will a massively cool project. I wanted to use ARM11 700mhz RaspberryPIs as workload distribution system for a project VERY similar to Big Brain (Im so glad I found that, proving to me the nay sayers of my idea were wrong) and I wanted to use prop2 chips instead of prop1's. My plan was and is buy my time learning the propeller system in depth while waiting on the prop2 to start building the project. These specs change everything though... I mean an arm11v6 700mhz is running at 875MIPs according to the ARM11 numbers posted on wiki. My ARM11 based android is running at 750MIPs following the same math, and it runs a virtualized version of debian seemlessly intergrated with android which allows me to open a terminal and use debian to start a X-Server and a Desktop System(xfce, about as intensive as win-xp) , and basically a RUsing a VNC emote Desktop server which can handel my pc loging into it rendering xfce at 102x768 and my phone running a client to log into it and have it render xfce at 800x600 (The reason for running a vnc server on the phone and then using a vnc client on the same phone to access X Windows probably sounds pretty dumb, unfourtantely the chipset makers will never write display drivers for x-windows so if you need a gui to say... idk run Eclipse this how you have to do it) both in 24bit color. The point Im making is I figured if a phone with the same CPU running 125MIPS slower than a PI could do this much processing plus all the other background stuff, hardware control, and still let me use android and a browser or do whatever I do on my phone then a PI would probably make an awesome Brain for the system a compution breakdown and assignment on the prop chips. But that 875mip is the PI has just been destroyed by the 1280 mips in the prop2. The MIPs for a 128 prop1 cores@100mhz is 3200 which is basically a a few hundred MIPs from an original Athlon 1.2ghz while the prop2 no oc at 128 cores is 20480 oddly the same exact amount of MIPS as two PS3's which I know do the workloads I want to do on props very well. This isnt the best of the best but depending on chip and bb cost may obtain the same to better performance than two ps3s in a cluster for cheaper.
I guess the point is sometimes you have to sacrifice things to get something better? Lol I dont know if that is the point... I do know though for the hobbyist and budget minded person who want nothing to do with premade dev boards not having dips is a real bumber I wouldnt mind working that many pins on a dip, especially since like to blow chips up testing there limits, this is even true of exspensive chips with extreme in there name or at least when i could afford all that. When I blow the chip up now though i cant just through a new one in a dip socket to replace it. So there is no plans at all for a DIP even in the future as far as everyone knows?
@Clusso99, I still dont have my prop up so no vga testing yet but from what I understand I wont be able to hook up to my vga lcd and use its 1280x720 resalution without adding some sram for a buffer. I would like to use that res for colored text, basically like the vga console framebuffer driver. Just nice res txt a color scheme for certain things, maybe even doing enough colors in that res to make syntax highlighting and a PSAM editor. Eventually GUI would be nice at higher widescreen resalutions. Im sure do drive your lcds with the prop but at there native res without sram? If so than way cool I read some wrong info. I wouldnt mind using my lcd with the 1024x768 tile driver but it doesnt Smile when its at 4:3 so thats why Im going to bust out the old crt in the garage.
@Anyone OFFICIAL. As ive stated Im learning to work with the prop and am anticipating the prop2. I may try spin or use it when i have to, but I would much rather do most work with assembly language, or c. Will PASM still work the same way as I understand now where your program has to fit into one cog or something like that. Will we be able to write large assembly programs that can controll all 8 cogs at once and access all the same resources that spin can? Also Im sure most of the work on this project is done and is probably gearing up for production and buisness details maybe a few mast minute tweaks, So if its not to much to ask and doesnt break any rules can you release the the assembly info for the prop2 since the specs say that the P2 isnt going totally backwards compatible with p1. That way those of us just learning can kind of get a feel for what code will work on both chips and what code is chip specific. I really hope there is really good support for doing everything in ASM this time. Every language somehow get converted to machine language so obviously the there are opcodes the spin interpreter produces to do things things the asm programmer cant, why not let the assemblers use those opcodes and access the same memmory in the same way you let the spin language?
Sorry for the language, I just got a little frustrated. It kind of sucks when you first start understanding electronics and you are excited to do all this stuff with but you realize the some of the stuff is not possible to do without using smc, which is a hard skill to learn,
I used to think that, then I tried it. As long as you have a tweezer and a loupe, it's pretty easy, if not easier than PTH.
so you have to learn to etch. Dont get me wrong these are two very achievable goals for a hobbyist who is motivated. But for the beginner who just wants to build and learn more theory spending money and time to learn to surface solider and etch isn't the most productive thing in the world.
I've never etched my own PCBs. All the ones I've done myself have been ordered from SparkFun's BatchPCB service.
I have a cheap weller iron from wal-mart (when funds are available this will get upgrated to an adjustable pencil tip, but for now it works) i think and tons of radio shack soldier, plus a pile of unused prefboard and a nice breadboard, when it comes to smc basically nothing I own will work between an etching kit and an iron alone thats 60 (also add in the price of the chips you trash while learning) bucks that could be spent on components of literature, not to mention your going to need access to a cnc or at least a drill press, maybe a vice and dremel would work? Dont get me wrong Im not fighting the future and in time will learnt etching and cnc, its just frustrating that the complete newbies with no fear and a huge motivation to do things get held back from there ideas becuase they cant work with smc.
Anyways I understand it would be a huge DIP
Yes, it would be 6.5" (165mm) long. That's why there are bound to be multiple break-out boards from multiple people quite quickly.
and were moving into the future but lets face it folks this is a hobbyist game I mean yes these chips/platforms are used professionally too, no doubt, and the pros want a small size. But in propellers case Im pretty sure this chip is driven by us the people who throw boards together to run robots, turn off lights, experiment with parallel and super computing concepts, and people like me who love to re invent the wheel to gain more knowledge have more projects on a resume. After my proto board is done, i plan to learn how to design a prefboard full of transistors/capacitors and what ever other components I need to make a very simple RAM cell. If im lucky maybe ill be able to build a 16 byte board or something, i believe theres alot to learn by doing this and writing a driver and coming up with a way to address. Once I know the fundementals at an intament level like that I belive I will be proficent enough to handel setting up a good memmory interface, maybe with enough effort I will be able to set up some old 70ns dram out a 486 on a prop board by emulating the x86 memmory adressing controllers with prop chips or an fpga, which is one of my subgoals to a larger goal later that the prop 2 will definitely let me hit.
It just makes me sad as a hobbyist I am going to have to shell out more for a prop 2 chip than a prop 1 in the first place
So don't, until you have an actual need for it. Prop 2 is different, and not replacing Prop 1
but I completely understand paying more for a more powerfull chip as long as it within reason . But now Im also going to have to spend an extra 2 to 5 dollars a chip to build a massively multi-core computer becuase each mcu(im pretty sure the prop two breaks into the cpu class) will need a breakout board. Im so impressed with the propeller Big Brain project its awe inspiring.
Are you sure? Nowhere, does he actually lay out what has and hasn't been done.
My plan was and is buy my time learning the propeller system in depth while waiting on the prop2 to start building the project. These specs change everything though... I mean an arm11v6 700mhz is running at 875MIPs according to the ARM11 numbers posted on wiki. My ARM11 based android is running at 750MIPs following the same math, and it runs a virtualized version of debian seemlessly intergrated with android which allows me to open a terminal and use debian to start a X-Server and a Desktop System(xfce, about as intensive as win-xp) , and basically a RUsing a VNC emote Desktop server which can handel my pc loging into it rendering xfce at 102x768 and my phone running a client to log into it and have it render xfce at 800x600 (The reason for running a vnc server on the phone and then using a vnc client on the same phone to access X Windows probably sounds pretty dumb, unfourtantely the chipset makers will never write display drivers for x-windows so if you need a gui to say... idk run Eclipse this how you have to do it) both in 24bit color. The point Im making is I figured if a phone with the same CPU running 125MIPS slower than a PI could do this much processing plus all the other background stuff, hardware control, and still let me use android and a browser or do whatever I do on my phone then a PI would probably make an awesome Brain for the system a compution breakdown and assignment on the prop chips. But that 875mip is the PI has just been destroyed by the 1280 mips in the prop2. The MIPs for a 128 prop1 cores@100mhz is 3200 which is basically a a few hundred MIPs from an original Athlon 1.2ghz while the prop2 no oc at 128 cores is 20480 oddly the same exact amount of MIPS as two PS3's which I know do the workloads I want to do on props very well. This isnt the best of the best but depending on chip and bb cost may obtain the same to better performance than two ps3s in a cluster for cheaper.
PS3 has far more memory and memory bandwidth than a comparable Prop2-based system would. Also, floating point will still be relatively slow on Prop 2, while it'll be native-speed-fast on the PS3.
I guess the point is sometimes you have to sacrifice things to get something better? Lol I dont know if that is the point... I do know though for the hobbyist and budget minded person who want nothing to do with premade dev boards not having dips is a real bumber I wouldnt mind working that many pins on a dip, especially since like to blow chips up testing there limits, this is even true of exspensive chips with extreme in there name or at least when i could afford all that. When I blow the chip up now though i cant just through a new one in a dip socket to replace it. So there is no plans at all for a DIP even in the future as far as everyone knows?
@Clusso99, I still dont have my prop up so no vga testing yet but from what I understand I wont be able to hook up to my vga lcd and use its 1280x720 resalution without adding some sram for a buffer. I would like to use that res for colored text, basically like the vga console framebuffer driver. Just nice res txt a color scheme for certain things, maybe even doing enough colors in that res to make syntax highlighting and a PSAM editor. Eventually GUI would be nice at higher widescreen resalutions. Im sure do drive your lcds with the prop but at there native res without sram? If so than way cool I read some wrong info. I wouldnt mind using my lcd with the 1024x768 tile driver but it doesnt Smile when its at 4:3 so thats why Im going to bust out the old crt in the garage.
You shouldn't have to pull out the CRT. I'd find the 1280x1024 tile driver and strip it down to drive 1280x720. That shouldn't be too hard. For now, put up with your monitor stretching 1024x768, or even 800x600; It doesn't actually look that bad.
@Anyone OFFICIAL. As ive stated Im learning to work with the prop and am anticipating the prop2. I may try spin or use it when i have to, but I would much rather do most work with assembly language, or c. Will PASM still work the same way as I understand now where your program has to fit into one cog or something like that. Will we be able to write large assembly programs that can controll all 8 cogs at once and access all the same resources that spin can? Also Im sure most of the work on this project is done and is probably gearing up for production and buisness details maybe a few mast minute tweaks, So if its not to much to ask and doesnt break any rules can you release the the assembly info for the prop2 since the specs say that the P2 isnt going totally backwards compatible with p1. That way those of us just learning can kind of get a feel for what code will work on both chips and what code is chip specific.
I really hope there is really good support for doing everything in ASM this time. Every language somehow get converted to machine language so obviously the there are opcodes the spin interpreter produces to do things things the asm programmer cant, why not let the assemblers use those opcodes and access the same memmory in the same way you let the spin language?
Assembly can do everything Spin can. Anything that it seems can't be done, is just done by a longer code sequence in assembly. I think the new Spin interpreter will be open source, but don't quote me on that. Either way, there are open source spin implementations by other people on the forum here.
@rwgast_logicdesign,
Yeah, the world has moved on. Pretty much anything cool and new in the way of chips comes in a surface mount package only. There still are some chips that are being provided in DIP packages, but only the smaller packages like 8 and 16 pin, maybe every once in a while 20 pins. SparkFun is a great source of ready-made breakout boards for a variety of new parts.
The Prop2 has too many pins for a DIP package. Once upon a time there was a 64 pin DIP package. You won't find them any more. 40 pin is the biggest they get and those are significantly more expensive to make than the equivalent surface mount package. I think the Prop2 design has 80 pins, way more than 64.
The Prop2's cogs will work very much like the current Prop1 cogs. They'll have some additional instructions, some of them quite powerful. There'll be some additional special purpose memory associated with each cog for use as a color lookup table or small stack, but the cogs' memory will still be 512 words each. There's an updated Prop2 document due to be released today documenting the new instructions and features in more detail. It's a specification document, not a learning tool, so don't be surprised if it's hard to understand. There'll be better documentation in the future.
Keep in mind that the cogs in the Prop2, like the Prop1, are really intended to implement I/O devices and interpreters, like the Spin interpreter. Most other programming will not be in ASM and the other languages, like C and Spin, are converted into some kind of interpretive code, not ASM / machine language. Currently C is compiled into what's called LMM (Large Memory Model) code which is a semi-interpreted PASM with the jump type instructions interpreted and other instructions copied into the cog for direct execution by the hardware. The Prop2 will do this more efficiently than the Prop1, so will have an additional speed advantage.
Yeah, the world has moved on. Pretty much anything cool and new in the way of chips comes in a surface mount package only. There still are some chips that are being provided in DIP packages, but only the smaller packages like 8 and 16 pin, maybe every once in a while 20 pins.
Not true! Microchip has the 32-bit PIC32 in 0.3" DIP28, and NXP has ARM Cortex-M0 chips in 0.6" DIP24.
In other news, I spoke with Chip earlier this afternoon. I think you guys will be excited to hear that we are in the final stages of getting things packaged up for a test run. Parallax is looking at having a test chip in hand within 4 months. Chip also said that if (and that is a big if, as there are an incredible number of details that have to be accounted for) everything goes smoothly, chips can be in your hands in 6 - 9 months from now.
Chip also said that if (and that is a big if, as there are an incredible number of details that have to be accounted for) everything goes smoothly, chips can be in your hands in 6 - 9 months from now.
What is the timeline for a second fab pass, as alpha silicon is nice, but production release matters more...
?
Haha, hey Phil. Ken didn't completely throw me under the bus with this one. However, all of the other Parallax and Parallax Semiconductors duties just happened to leave a strategically placed banana peel in the forum's crosswalk .
What is the timeline for a second fab pass, as alpha silicon is nice, but production release matters more...
?
production release was what I was getting at. Still, I'd like to reiterate that this is an optimistic estimate. Chip and Beau have been working very hard to get it right the first time. This is why Chip made that comment today - because things are looking good.
Can anyone explain what the DECOD2-DECOD5 instructions do? Those are the only listed instructions that don't explain anything to me.
I think there is a typo with those instructions in that pdf.
Here's my understanding of how they work. For DECOD5 if the register passed in contained a value A between 0 and 31, then it would write back into that register a value with the A bit set and the other bits 0. For DECOD4 if the register passed in contained a value A between 0 and 15, then it would write back into that register a value with the lower 16bits having bit A set and the upper 16bits having bit A set (all other bits 0). And so on for the rest with more repeats as the size of the "field" shrinks.
I think there is a typo with those instructions in that pdf.
Here's my understanding of how they work. For DECOD5 if the register passed in contained a value A between 0 and 31, then it would write back into that register a value with the A bit set and the other bits 0. For DECOD4 if the register passed in contained a value A between 0 and 15, then it would write back into that register a value with the lower 16bits having bit A set and the upper 16bits having bit A set (all other bits 0). And so on for the rest with more repeats as the size of the "field" shrinks.
Comments
Well, it's 7am on 7th here in Oz and no news yet that I can see. Any announcements will be swamped by the Apple iPad3 shortly
Funny enough I just found the propeller a maybe a week and a half ago and am loving everything about it almost... I have a huge project I am planning and the problem is between the ARM and Prop CPU's i can only about 5000MIPS, which is pretty low for the apraoxamite 200 dollar price tag this thing will take to build. The project is all about processing data so I am super excited that the Prop2 will give my board a huge kick in the *** up to 22230MIPS not counting the fpu's im going to use. I just want to make sure my numbers are correct with the data we have. The euqation i am using is mhz*cores/cycles per instruction so for 16 propeller 1 chips i get 100*128/4=3200for the prop2 i get 160*128/1=20480. For a single Prop 1 vs Prop 2 were looking at 160 vs 1024 mips. This is a HUGE Boost. while its still no ARM cortex 12 1.5ghz quad core its damn fast. And the fact that the chip can easily drive a flat panel (which 99% of us probably use) so we can put the crts back in the garage again just sweetens the pot.
My major concern that I havent seen anything about parusing this thread is if the prop2 is going to be within the same price range as the prop1. If the price gets over 15 bucks thats really gonna kill my plan. Im hoping the prop2 will get set at 10 bucks and the prop 1 will stay in manufacturing (even with the prop2 the 1 is a good chip for alot of things and has its place) and get dropped to 6 or lower. If both chips stay and are resonably priced we will all propbably come up with some cool reasons to connects the two togather.
Heres what fn sucks Package Type 128 pin SMD, nothing about a DIP on the specs, please tell me there will be a dip!!
BTW I no longer own any CRTs. All replaced with LCD VGAs (some have composite in too) and the P1 drives them all nicely
While we are all looking forward to all the P2 features, ATM I/O and hub ram are the most critical to me, followed by speed.
Postedit: No DIP but there will be transition pcbs. (please be careful with language... we have kids on these forums)
There was never going to be a DIP package from day one. Not too many 128 pin DIPS out there. We are in the 21st century now. Many ways to deal with it. Eval boards will show up within weeks from the launch, and breakout board are already in the making.
Jim
I fear I'll have a lot of new learning to do to get up to speed on the Propeller II.
On the other hand, like everyone else many forum members I have wanted to do things that were beyond the Propeller I's abilities. I will be very nice to be able to use high speed parallel memory.
My brain is starting to hurt thinking about the possibilities.
I recall mention of ~2x Prop1, which will mean $15-ish, and heading to $10 in volumes.
Of course, such estimates likely do not include accurate testing costs, and a Prop II is going to be a challenge to test fully !!
(Tester time == chip $$ )
I will just use the P1 as remote peripherals to a P2
-Phil
Anyways I understand it would be a huge DIP and were moving into the future but lets face it folks this is a hobbyist game I mean yes these chips/platforms are used professionally too, no doubt, and the pros want a small size. But in propellers case Im pretty sure this chip is driven by us the people who throw boards together to run robots, turn off lights, experiment with parallel and super computing concepts, and people like me who love to re invent the wheel to gain more knowledge have more projects on a resume. After my proto board is done, i plan to learn how to design a prefboard full of transistors/capacitors and what ever other components I need to make a very simple RAM cell. If im lucky maybe ill be able to build a 16 byte board or something, i believe theres alot to learn by doing this and writing a driver and coming up with a way to address. Once I know the fundementals at an intament level like that I belive I will be proficent enough to handel setting up a good memmory interface, maybe with enough effort I will be able to set up some old 70ns dram out a 486 on a prop board by emulating the x86 memmory adressing controllers with prop chips or an fpga, which is one of my subgoals to a larger goal later that the prop 2 will definitely let me hit.
It just makes me sad as a hobbyist I am going to have to shell out more for a prop 2 chip than a prop 1 in the first place, but I completely understand paying more for a more powerfull chip as long as it within reason . But now Im also going to have to spend an extra 2 to 5 dollars a chip to build a massively multi-core computer becuase each mcu(im pretty sure the prop two breaks into the cpu class) will need a breakout board. Im so impressed with the propeller Big Brain project its awe inspiring and to do the same thing with prop2s will a massively cool project. I wanted to use ARM11 700mhz RaspberryPIs as workload distribution system for a project VERY similar to Big Brain (Im so glad I found that, proving to me the nay sayers of my idea were wrong) and I wanted to use prop2 chips instead of prop1's. My plan was and is buy my time learning the propeller system in depth while waiting on the prop2 to start building the project. These specs change everything though... I mean an arm11v6 700mhz is running at 875MIPs according to the ARM11 numbers posted on wiki. My ARM11 based android is running at 750MIPs following the same math, and it runs a virtualized version of debian seemlessly intergrated with android which allows me to open a terminal and use debian to start a X-Server and a Desktop System(xfce, about as intensive as win-xp) , and basically a RUsing a VNC emote Desktop server which can handel my pc loging into it rendering xfce at 102x768 and my phone running a client to log into it and have it render xfce at 800x600 (The reason for running a vnc server on the phone and then using a vnc client on the same phone to access X Windows probably sounds pretty dumb, unfourtantely the chipset makers will never write display drivers for x-windows so if you need a gui to say... idk run Eclipse this how you have to do it) both in 24bit color. The point Im making is I figured if a phone with the same CPU running 125MIPS slower than a PI could do this much processing plus all the other background stuff, hardware control, and still let me use android and a browser or do whatever I do on my phone then a PI would probably make an awesome Brain for the system a compution breakdown and assignment on the prop chips. But that 875mip is the PI has just been destroyed by the 1280 mips in the prop2. The MIPs for a 128 prop1 cores@100mhz is 3200 which is basically a a few hundred MIPs from an original Athlon 1.2ghz while the prop2 no oc at 128 cores is 20480 oddly the same exact amount of MIPS as two PS3's which I know do the workloads I want to do on props very well. This isnt the best of the best but depending on chip and bb cost may obtain the same to better performance than two ps3s in a cluster for cheaper.
I guess the point is sometimes you have to sacrifice things to get something better? Lol I dont know if that is the point... I do know though for the hobbyist and budget minded person who want nothing to do with premade dev boards not having dips is a real bumber I wouldnt mind working that many pins on a dip, especially since like to blow chips up testing there limits, this is even true of exspensive chips with extreme in there name or at least when i could afford all that. When I blow the chip up now though i cant just through a new one in a dip socket to replace it. So there is no plans at all for a DIP even in the future as far as everyone knows?
@Clusso99, I still dont have my prop up so no vga testing yet but from what I understand I wont be able to hook up to my vga lcd and use its 1280x720 resalution without adding some sram for a buffer. I would like to use that res for colored text, basically like the vga console framebuffer driver. Just nice res txt a color scheme for certain things, maybe even doing enough colors in that res to make syntax highlighting and a PSAM editor. Eventually GUI would be nice at higher widescreen resalutions. Im sure do drive your lcds with the prop but at there native res without sram? If so than way cool I read some wrong info. I wouldnt mind using my lcd with the 1024x768 tile driver but it doesnt Smile when its at 4:3 so thats why Im going to bust out the old crt in the garage.
@Anyone OFFICIAL. As ive stated Im learning to work with the prop and am anticipating the prop2. I may try spin or use it when i have to, but I would much rather do most work with assembly language, or c. Will PASM still work the same way as I understand now where your program has to fit into one cog or something like that. Will we be able to write large assembly programs that can controll all 8 cogs at once and access all the same resources that spin can? Also Im sure most of the work on this project is done and is probably gearing up for production and buisness details maybe a few mast minute tweaks, So if its not to much to ask and doesnt break any rules can you release the the assembly info for the prop2 since the specs say that the P2 isnt going totally backwards compatible with p1. That way those of us just learning can kind of get a feel for what code will work on both chips and what code is chip specific. I really hope there is really good support for doing everything in ASM this time. Every language somehow get converted to machine language so obviously the there are opcodes the spin interpreter produces to do things things the asm programmer cant, why not let the assemblers use those opcodes and access the same memmory in the same way you let the spin language?
Absolutely not. See above as to why.
You shouldn't have to pull out the CRT. I'd find the 1280x1024 tile driver and strip it down to drive 1280x720. That shouldn't be too hard. For now, put up with your monitor stretching 1024x768, or even 800x600; It doesn't actually look that bad.
It's been out for quite some time. See Assembly can do everything Spin can. Anything that it seems can't be done, is just done by a longer code sequence in assembly. I think the new Spin interpreter will be open source, but don't quote me on that. Either way, there are open source spin implementations by other people on the forum here.
Yeah, the world has moved on. Pretty much anything cool and new in the way of chips comes in a surface mount package only. There still are some chips that are being provided in DIP packages, but only the smaller packages like 8 and 16 pin, maybe every once in a while 20 pins. SparkFun is a great source of ready-made breakout boards for a variety of new parts.
The Prop2 has too many pins for a DIP package. Once upon a time there was a 64 pin DIP package. You won't find them any more. 40 pin is the biggest they get and those are significantly more expensive to make than the equivalent surface mount package. I think the Prop2 design has 80 pins, way more than 64.
The Prop2's cogs will work very much like the current Prop1 cogs. They'll have some additional instructions, some of them quite powerful. There'll be some additional special purpose memory associated with each cog for use as a color lookup table or small stack, but the cogs' memory will still be 512 words each. There's an updated Prop2 document due to be released today documenting the new instructions and features in more detail. It's a specification document, not a learning tool, so don't be surprised if it's hard to understand. There'll be better documentation in the future.
Keep in mind that the cogs in the Prop2, like the Prop1, are really intended to implement I/O devices and interpreters, like the Spin interpreter. Most other programming will not be in ASM and the other languages, like C and Spin, are converted into some kind of interpretive code, not ASM / machine language. Currently C is compiled into what's called LMM (Large Memory Model) code which is a semi-interpreted PASM with the jump type instructions interpreted and other instructions copied into the cog for direct execution by the hardware. The Prop2 will do this more efficiently than the Prop1, so will have an additional speed advantage.
Not true! Microchip has the 32-bit PIC32 in 0.3" DIP28, and NXP has ARM Cortex-M0 chips in 0.6" DIP24.
I missed that - any links ? (Modules do not really count as 'M0 Chips' )
here:
Propeller2DetailedPreliminaryFeatureList-v2.0.pdf
In other news, I spoke with Chip earlier this afternoon. I think you guys will be excited to hear that we are in the final stages of getting things packaged up for a test run. Parallax is looking at having a test chip in hand within 4 months. Chip also said that if (and that is a big if, as there are an incredible number of details that have to be accounted for) everything goes smoothly, chips can be in your hands in 6 - 9 months from now.
Cheers, my friends!
-Phil
What is the timeline for a second fab pass, as alpha silicon is nice, but production release matters more...
?
production release was what I was getting at. Still, I'd like to reiterate that this is an optimistic estimate. Chip and Beau have been working very hard to get it right the first time. This is why Chip made that comment today - because things are looking good.
The PDF file has a date stamp 7 March 2012 5:40 pm, seems they have found time travel, or work on the other side of the date line...
Here's my understanding of how they work. For DECOD5 if the register passed in contained a value A between 0 and 31, then it would write back into that register a value with the A bit set and the other bits 0. For DECOD4 if the register passed in contained a value A between 0 and 15, then it would write back into that register a value with the lower 16bits having bit A set and the upper 16bits having bit A set (all other bits 0). And so on for the rest with more repeats as the size of the "field" shrinks.
That makes more sense. Could be a useful opcode.
Thanks Daniel