Harley, we've had to spend your money wisely in the past and it worked out so you can trust us again, right? You'll want both boards.
I can share our strategy with the subject of board offerings since it seems odd to offer so few choices. After all, one day ago I told you we'd only make one board until somebody reminded us that we need a simple reference design. We've got two reasons for keeping it simple and everybody will appreciate both of them.
First, designing and selling chips is a serious investment in terms of non-recurring engineering costs, fabrication, production setup for testing, characterization and documentation. We're not in this for "the money" but it's absolutely necessary to run it under a self-sustaining and viable business model. Specifically, we must sell lots of chips! Though absolute peanuts in comparison to big semiconductor companies, Parallax must move at least 3-5 million Propellers a year. Still reading? This means our engineering focus will be on customer support and design-in assistance, not producing too many variations of boards.
Second, the most important contribution will be made by others who produce boards. Parallax can make all the boards we want, but when others start producing boards and tools it grows a much stronger business around a vibrant community. We want to support these people.
Hobby and education is in our blood and will clearly remain a top priority in everything we do (it's in the veins). Honestly, we'd be most rewarded if we could make our educational hardware free as a result of commercial success.
We are more excited than ever to be part of what lies ahead. Chip's got a lot in the queue for us this time, as pedward stated above.
An ASC for the 1600 MHz mulitcore P2 with full GCC support (running on any OS) and Arduino-compatible code libraries? Just a little advance drum-beating for ya.
You'll be among the first to have our pre-production chips.
An ASC for the 1600 MHz mulitcore P2 with full GCC support (running on any OS) and Arduino-compatible code libraries? Just a little advance drum-beating for ya.
You'll be among the first to have our pre-production chips.
Ken Gracey
I haven't really been following the development of the Propeller 2, but is this correct that it will be running at 1.6 GHz instead of 120 or 160 MHz?
200MIPS x 8 cogs == 1600MIPS. Last I heard 200Mhz was a pretty solid target; Chip is a mad man!
Perhaps, but simulation numbers, and real-world-numbers have a nasty habit of being like Political polls.
200MHz is a nice round number, but I'd be happy if the counters were just fixed to allow capture & reciprocal Frequency measure.
Precision measure of duty cycle is only a few more FF's.... we can but hope.
It's not hard to see how the counters can be faster. The Prop 1 has an 8 tap PLL, in this mode the NCO counts at 80Mhz, then multiplied through the PLL. I have observed outputs as high as 230Mhz and successfully broadcast audio at 146Mhz. 128Mhz is the "safe" number, but you certainly can push it higher.
The Prop 2 is a lot more advanced than the Prop 1, so you can extrapolate what is possible. The counters also have a lot more modes. The video generator circuitry can do 1920x1080i in component video. One of the secrets to making that work is that the DACs are part of the chip instead of using an external R2R DAC.
I'm excited to see what the final spec sheet will say, I'm crossing my fingers that Chip might've been able to slip DVI in there!
Note that I said "the ability to external clock at above system clock rates would be great", and those numbers are for _internal_ clocking only.
That said, even if they can internally clock at 300MHz from a PLL, that will be impressive.
Capture to 3.3ns granularity would be even more laudable.
Hopefully Prop II also improve the PLL granularity - eg I see the SiLabs PLL has M(12b)/N(12b)
Well, if the Prop II can be the heart of a single board computer that runs Linux and can decode Blu-ray all for $40, Parallax might have an unqualified hit on their hands: raspberry-pi-launch
Prop II does not need to clone that, to help with this problem :
["The project came about when a group of Cambridge-based computer programmers noticed that fewer and less-qualified students were applying for computer science courses at Cambridge University."]
The Prop 1 has an 8 tap PLL, in this mode the NCO counts at 80Mhz, then multiplied through the PLL.
Actually, no. The VCO is divided down by 16 (always, regardless of the output divisor) to sync with the NCO. The specs state a maximum NCO rate of 8 MHz when used with the PLL. At room temperature, the VCO's free-running frequency is around 240 MHz, which divides down to 15 MHz to sync with the NCO. So NCO frequencies could work under certain circumstances up to maybe 14 MHz. or so -- but definitely not at 80 MHz.
Actually, no. The VCO is divided down by 16 (always, regardless of the output divisor) to sync with the NCO. The specs state a maximum NCO rate of 8 MHz when used with the PLL. At room temperature, the VCO's free-running frequency is around 240 MHz, which divides down to 15 MHz to sync with the NCO. So NCO frequencies could work under certain circumstances up to maybe 14 MHz. or so -- but definitely not at 80 MHz.
-Phil
My understanding, and the way I have used it, you have the normal nco that accumulates at 80 mhz, the divisor sets the overflow rate between 4 and 8 mhz. This is multiplied by 16, then divided by the pll divisor settings. What you are describing sound different than what I read in the datasheet.
You're correct as far as the accumulation rate and the overflow rate limits go. But there is no frequency multiplication happening in hardware -- only division of the VCO. Phase comparison and locking take place at the NCO frequency, which is VCO/16. PLLx16 is actually VCO/1; PLLx8 = VCO/2, etc.
I've never seen that recommendation anywhere as a general rule of thumb. When phase-locked, the VCO always runs at NCOx16 or XINFREQx16, regardless of the divider tap chosen. However, the processor itself has its own speed limit, which is lower than that of the VCO. If you're using a high-frequency crystal, say 10 MHz, the processor will not run at 160 MHz, so you have to us PLLx8, even though the VCO itself is comfortable running at 160 MHz. It may be in that context that you've seen the PLLx8 recommendation mentioned.
If you're using a high-frequency crystal, say 10 MHz, the processor will not run at 160 MHz, so you have to us PLLx8, even though the VCO itself is comfortable running at 160 MHz. It may be in that context that you've seen the PLLx8 recommendation mentioned.
Kind of, as in specifying a 16 MHz crystal with PLLx8 instead of an 8 MHz crystal with PLLx16 specifically because the 8 MHz option crashes more readily.
Maybe I've mis-read this - having never tried myself.
Comments
Can you guess what "Morpheus 2" will be based on?
:-)
Surely you meant 1600 MIPS?
1600 mhz would be way more awesome though
Maybe a QFN, too.
I haven't really been following the development of the Propeller 2, but is this correct that it will be running at 1.6 GHz instead of 120 or 160 MHz?
200MIPS x 8 cogs == 1600MIPS. Last I heard 200Mhz was a pretty solid target; Chip is a mad man!
Perhaps, but simulation numbers, and real-world-numbers have a nasty habit of being like Political polls.
200MHz is a nice round number, but I'd be happy if the counters were just fixed to allow capture & reciprocal Frequency measure.
Precision measure of duty cycle is only a few more FF's.... we can but hope.
How do you know this ? Have you seen the simulation results ?
The counters are not ripple, or even toggle, but include a 32 bit adder. That's tougher.
Of course, the ability to external clock at above system clock rates would be great, but I doubt that is planned.
I'm only posting here to stop speculation (also being intentionally vague).
The P1 counters can go up to 128 MHz. The P2 will have similar abilities using a PLL.
Thanks,
The Prop 2 is a lot more advanced than the Prop 1, so you can extrapolate what is possible. The counters also have a lot more modes. The video generator circuitry can do 1920x1080i in component video. One of the secrets to making that work is that the DACs are part of the chip instead of using an external R2R DAC.
I'm excited to see what the final spec sheet will say, I'm crossing my fingers that Chip might've been able to slip DVI in there!
That said, even if they can internally clock at 300MHz from a PLL, that will be impressive.
Capture to 3.3ns granularity would be even more laudable.
Hopefully Prop II also improve the PLL granularity - eg I see the SiLabs PLL has M(12b)/N(12b)
http://www.cnn.com/2012/02/29/tech/raspberry-pi-launch/index.html?c=&page=1
Prop II does not need to clone that, to help with this problem :
["The project came about when a group of Cambridge-based computer programmers noticed that fewer and less-qualified students were applying for computer science courses at Cambridge University."]
-Phil
-Phil
What always puzzled me about this is that overclocking is always recommended (From experience presumable) using PLLx8 rather than x16.
-Phil
I seriously doubt Prop2 could decode Bluray in real time... Maybe though, it'd be fun to try...
Kind of, as in specifying a 16 MHz crystal with PLLx8 instead of an 8 MHz crystal with PLLx16 specifically because the 8 MHz option crashes more readily.
Maybe I've mis-read this - having never tried myself.
Perhaps by the end of the day somewhere in the world? I look forward to seeing the final spec.
Maybe here: