Propeller II update - BLOG
Beau Schwabe
Posts: 6,568
As an ongoing effort to keep our customers in the loop with current updates with Propeller II and other projects, I have decided to start a blog that shows video sections of Propeller II layout that I'm currently working on.
There is no audio... well, some of it may have audio, other than a brief text description of what the layout block is. This method has a minimal impact on productivity, because I can push a record button and forget about it, and besides, there are times you wouldn't want to hear me mumble. :-)
Feel free to ask questions and make comments to the video section.
Propeller II updates:
-> Currently we are scheduled for Early November 2010 tape out for a test chip!! This is a significant milestone and will help us determine from empirical testing if we need to make any changes before the final Chip.
-> So the question begs... "When is the final Chip coming?" ... I know better than to put any numbers here, but a little insight might help. Here is a little bit of a perspective as to why it takes so long for this process to take place.
When I was at National Semiconductor we usually had a layout and design team of 20 or so individuals for any given project and roughly the design would take about a year from start to finish. Compared to Parallax not taking into consideration that the design itself goes through a series of changes (even after layout has been placed <- Yes, this means you just rip it all up and start over in some cases), as far as our layout and design team is concerned we are a 2 man team between Chip (design) and myself (layout).
I've been with Parallax for 5 years and when I started layout at Parallax I had a blank screen, completely black. We had to design our own standard cells ... AND,OR,NOR,NAND,XOR, etc... not only once, but twice one for each voltage level we had in our design (1.8V and 3.3V). The design rule deck also needed to be incorporated into the layout tool that started out as a PDF file (paper version).
So ok, what am I trying to say? ... if it takes roughly 1 year with a design team of 20 (about 41k man hours), we are ahead of schedule at 5 years out with a design team of 2 individuals (about 21k man hours). That's NOT to say that it will take another 5 years by any means, fortunately we have the luxury of not having 'too many cooks in the kitchen', but realistically we could be looking at this time next year.
Hope you enjoy the videos!
Video Project:
Metal slots on corner cell
Modifying an (Input) I/O for the Test Chip
Modifying an (Output) I/O for the Test Chip
General Floor Plan Outline with audio
ECO Change on resistor type from N+Poly to P+Poly with audio
How to find that DRC error with audio
Fuse structure, buried under several layers of metal with audio
Test Die Wiring
Test Die Wiring (some more)
How to swap 32 wires in 5 min
Comments
Fantastic news, that means I can expect a Prop II in my Christmas stocking this year..oh wait..
OK. That is still fantastic news.
However you might have to explain things a bit more.
The second part of your announcement talks about the "layout and design team" and how this will require another year for you two guys.
I have no doubts about the magnitude of the task but what I don't understand is how one gets a test chip out without having done the bulk, or indeed all, of the layout and design.
Is it so that the test chip will not necessarily have all the features you would like in the finished device?
Or is it so that you anticipate the possibility of major re-layout work if any problems arise?
Just curious and can't wait.
Thanks!
David Betz
I'm sure those videos are very nice, but I could not get past the login screen to see them. My forum login credentials do not work there.
-Phil
Our initial test chip will consist of critical blocks that are mostly disengaged from each other, to allow us to individually test components we've designed. It won't be an integrated chip until a later fabrication after we've tested, optimized, and proven those blocks, at which time we can start integrating them together.
It's the same concept as with programming... write a routine or two, test them extensively in isolation, integrate them together and test again, move on to the next function, repeat.
We're working on that right now. It will still contain preliminary information because some designed features may have to be modified or removed, but we'll post a clear list of the designed features as soon as we can bring it all together.
Please try the links again, the first time we didn't have the correct URL posted.
Metal slots are used for wide metal >35 um. They are there to minimize the stress effects during the fabrication process, as well as heat related stress caused by current carried through the wire.
Thanks!
Bill
What I heard about Propeller II's COG internal, it shall be wonderful additions to being a supercomputer-on-chip, such as trying to shoot for over 1 GIPS on C++ operating system kernel (also written under SPIN on some part which is usually required). ^____^ Can't wait...
Nice... Hope all is going to work the first time!
Thanks for those replies, makes sense to me.
It's fascinating to watch you work on those blocks. This must be a first in the history of silicon electronics, that the customers of a future chip product can watch it being designed.
Mondrian would be proud of you:
http://www.lanevatile.com/wp-content/uploads/2010/02/mondrian.jpg
http://paintings.name/images/piet-mondrian/Mondrian-Broadway-boogie-woogie.jpg
I think a petulant hammer would have been my reaction, long ago.
We need to hold our breath to see how it turns out, hence the reason Beau is testing our future toy, propeller II - it could be made on 130 - 65nm, so it's a very tedious task.
I reloaded this page, but I'm still getting the login screen. This is the link that I'm getting it from:
http://video.parallax.com/activate/4478d18041?redirect_to=/medias/182418
-Phil
That's the correct url address ... I tested it on another machine that would have had no "cookie knowledge" that I had previously logged in to the account, and it went to where it is supposed to go.
What browser are you using? I have tried Explorer and Mozilla (FireFox) both on a Fedora Linux and Windows XP and it looks like it should.
FredBlais,
The Test chip consists of completed functional blocks that we want to test, but not a fully functional chip.
I'm using Opera on OS/X. BTW, the Propeller Q&A page doesn't work with this setup either.
-Phil
Very interesting - for about 4 minutes. Since I really have no idea what your are doing it's hard (for me) to follow.
I can at least tell you know what you're doing. Looks like a lot of work.
Thanks for posting these videos.
I know of no other company that would go to such lengths for their customers. Awesome
PLEASE accept my donation into your kudos bucket for this...
Karma + 100
But, this is the first time I've heard Beau say it!
So, I take this as an encouraging sign...
Why are you still hanging on to such a POS?
-Phil
I saw you complaining the other day about the Q&A. Now I see you having problems with the blog videos. You must have your reasons for using what you do. But your own experiences with it convince me to steer clear.
See, I'm recognizing your vast knowledge and assigning great weight to your words!
The thing is, Opera+OS/X works flawlessly for almost everything else, including this forum. Opera is widely recognized for being standards-compliant. Unless the two sites I'm having trouble with use some non-standard Ajax techniques or bleeding-edge HTML5, I would expect it to handle them without issue.
-Phil