Prop-2 Release Date and Price

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  • bruceebrucee Posts: 223
    edited February 2015 Vote Up0Vote Down
    back end FPGA fitters--

    Last I checked and I believe it is still true, whatever open source front end will have to produce something the proprietary fitter will take to generate the configuration file.

    There is a good reason for this, security. While yes you can copy the config file for a board with a Xilinx/Altera FPGA and clone the board, that is usually not very useful. But what might be useful would be the logic cell configuration and routing for someone trying to learn about someone else's design. And for that reason the format and meaning of the config file has been proprietary.

    But I don't think this is really any kind of a show stopper, the front end could provide a generic HDL file compileable by the free tools.

    I believe in some parts they have added encryption on top of that.
  • Heater.Heater. Posts: 20,556
    edited February 2015 Vote Up0Vote Down
    evanh,

    What do you mean by "investment" in Linux? As far as I know there is none worth talking about in a monetary sense.

    What there is is a lot of big companies contributing development effort into Linux. That is to say source code.

    They do this out of their own self interest of course. But they can do it with no friction of cross-licensing deals or NDAs etc. It's good for them. They can get on with their other core business.

    I have no idea about that "Prisoner's Dilemma" thing. It just seems obvious that the basis of your computing infrastructure should not be beholden to a single source of supply. Which for many is in a foreign country and run by a corporation over which you have no control.
  • evanhevanh Posts: 4,766
    edited February 2015 Vote Up0Vote Down
    Heater. wrote: »
    evanh,

    What do you mean by "investment" in Linux? As far as I know there is none worth talking about in a monetary sense.

    What there is is a lot of big companies contributing development effort into Linux. That is to say source code.

    Labour investment of course, source code doesn't need anything else. The best ones even put it on their books as part of R&D presumably.

    I have no idea about that "Prisoner's Dilemma" thing.

    The GPL is where "The Prisoner's Dilemma" kicks in. Without the GPL, Linux would have just languished like the myriad of BSDs before it. Various companies picking over it's bones for isolated needs.

    It just seems obvious that the basis of your computing infrastructure should not be beholden to a single source of supply. Which for many is in a foreign country and run by a corporation over which you have no control.

    Yet, 99% of all companies, and governments alike, turn a blind eye to that very concern.
    “What car did you learn to drive stick shift on?” == “What was the make and model of your first car?” -> Password reset! -- https://krebsonsecurity.com/2018/04/dont-give-away-historic-details-about-yourself/
  • rod1963rod1963 Posts: 751
    edited February 2015 Vote Up0Vote Down
    Arduino didn't succeed just because it used Open Source software - It was a factor but there was more to it than that...

    1) The software was free and modifiable..
    2) Open board design and copying was okay..
    3) The board is dirt cheap to make.
    4) It used a DIP MCU which meant easily hackable to average experimenter.
    5) The Arduino IDE made embedded programming accessible to non-geeks and mere mortals a cinch.- which is a much larger user base than say Prop users or FPGA enthusiasts..
    6) It came around when the only alternative was the very limited and expensive BS2 which sort of guaranteed there was a market anything that could provide a upgrade path in terms of more memory and computation at a equivalent or lower price..
    7) The Arduino model also encouraged experienced programmers to try their hand at porting the system to other micros like the ARM,. PIC32, various TI chips, etc.

    But it doesn't mean that having a totally open source HDL system for FPGA's is going to be as popular nor salable to Arduino users.

    For starters you won't be able to sell FPGA boards as cheap as say a Uno - Maybe JMG can get his Prop/Max10 board down to $30(probably more like $80) which cuts down on interest, unless you plan to sell them at a loss. Secondly most hobbyists lack the talent and interest to mess with FPGA's. CPLD's for glue logic are one thing. But dabbling with SoC implementations on a FPGA is pretty much out of reach by most - even the Prop experts as seen with their lack of interest in the Prop verilog code.

    Besides look at what most Makers are doing, it's nothing that a 8 bit AVR or 28 pin PIC32 can't handle. And if they need lots of resources there's always those $10 ARM boards from NXP and Freescale that are supported by Mbed.

    The market is going to be much smaller no matter what hand waving is done.
  • evanhevanh Posts: 4,766
    edited February 2015 Vote Up0Vote Down
    Rod,
    I assume you're implying that Parallax's turnover has shrunk in recent years. While I certainly can't give numbers, my impression of what has happened is the uC experimenters market as a whole has dramatically grown. So, although that means Parallax's share of the over-all market is now smaller, it may not mean their turnover has shrunk.
    “What car did you learn to drive stick shift on?” == “What was the make and model of your first car?” -> Password reset! -- https://krebsonsecurity.com/2018/04/dont-give-away-historic-details-about-yourself/
  • LawsonLawson Posts: 870
    edited February 2015 Vote Up0Vote Down
    brucee wrote: »
    back end FPGA fitters--

    Last I checked and I believe it is still true, whatever open source front end will have to produce something the proprietary fitter will take to generate the configuration file.

    There is a good reason for this, security. While yes you can copy the config file for a board with a Xilinx/Altera FPGA and clone the board, that is usually not very useful. But what might be useful would be the logic cell configuration and routing for someone trying to learn about someone else's design. And for that reason the format and meaning of the config file has been proprietary.

    *snip*

    I believe in some parts they have added encryption on top of that.

    Seriously? you're arguing security through obscurity is a good thing? That really worked well for DVD's you know. (last I looked people could crack DVD blocks with a 2^8 loop attack, the whole disk with a 2^12 attack, and this with a 40-bit key) At best, security through obscurity can delay an attacker a bit, and if your attacker is well funded "a bit" isn't long at all. (like weeks or less => see software DRM) All the secrecy around the FPGA bit-stream is to protect Xilinx/Altera's profits from programming tools.

    The bit-stream encryption has a different purpose. There, a unique key is burned into the FPGA chip by each manufacturer using the chips in a device. This key is then used to encrypt the contents of the configuration flash. This forces competitors to extract the key from the FPGA die before they can make direct copies of a product. Extracting a key from the FPGA die is difficult enough that it's usually easier to design a competing product from scratch. Hence, encrypted configuration provides useful security to a manufacturer using FPGA chips.

    Marty
    micro-power experiments with the propeller.
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  • TubularTubular Posts: 2,892
    edited February 2015 Vote Up0Vote Down
    Perhaps P3 silicon should just be fpga fabric, so we can load P1V's, P2 or P3 verilog designs onto for now, and Parallax can open it up in the future for another first...
  • jmgjmg Posts: 11,076
    edited February 2015 Vote Up0Vote Down
    Tubular wrote: »
    Perhaps P3 silicon should just be fpga fabric, so we can load P1V's, P2 or P3 verilog designs onto for now, and Parallax can open it up in the future for another first...
    There is a FPGA test platform planned, as Ken is keen to field test a full design Verilog.
    That's an obvious waypoint, but the price of a full-chip? (16 COGS) swallowing FPGA is very high so there is no volume or revenue in those test platforms. Parallax can even give a dozen away to 12 tier 1 testers.
    I believe that situation opens the door to a smaller FPGA, at a much lower price, that can test 1+ COGS and can be used in a wider market. That can generate revenue, and seed design starts, whilst the (far fewer) big FPGA boards prove the larger build-set.

    Of course, the longer all this takes the cheaper FPGAs become... ;)
  • tryittryit Posts: 72
    edited June 2015 Vote Up0Vote Down
    Has the much anticipated spring announcement for Propeller 2 happened yet? Or is the announcement meant for Spring, 2016?
  • Dave HeinDave Hein Posts: 5,380
    edited June 2015 Vote Up0Vote Down
    tryit wrote: »
    Has the much anticipated spring announcement for Propeller 2 happened yet? Or is the announcement meant for Spring, 2016?
    The P2 FPGA image should be available this Spring, but it hasn't been posted yet. The actual P2 chip may not be available until Spring 2016. There are only 18 days left till the end of Spring 2015, so the FPGA image should be coming soon.
  • tryittryit Posts: 72
    edited June 2015 Vote Up0Vote Down
    I imagine Parallax is executing several short term and long term projects as part of the overall business plan. Is the Propeller 2 priority #1 at the moment? Can the business survive without it?

    By now, the Propeller 2 specs must be frozen. What are these specs?
  • evanhevanh Posts: 4,766
    edited June 2015 Vote Up0Vote Down
    tryit wrote: »
    By now, the Propeller 2 specs must be frozen. What are these specs?

    Nope. We'll see it all when that FPGA image lands. Well, maybe not the smartpins, Chip may leave them for a second image.
    “What car did you learn to drive stick shift on?” == “What was the make and model of your first car?” -> Password reset! -- https://krebsonsecurity.com/2018/04/dont-give-away-historic-details-about-yourself/
  • Dave HeinDave Hein Posts: 5,380
    edited June 2015 Vote Up0Vote Down
    I would expect that the P2 is Parallax's top priority. However, businesses prioritize projects based on return-on-investment, and P2 may have a lower ROI compared to other projects. The P2 is a large investment, large risk project, so it's possible that it's not their highest priority. Parallax can probably survive without the P2, but it is unknown how long they can survive without it.

    I would hope that the major features of the P2 are frozen, but it's likely that features will be added and removed just before it is sent out to the silicon foundry. The FPGA image should be available within the next 17 days, and an initial spec should be available along with it.
  • Cluso99Cluso99 Posts: 13,382
    edited June 2015 Vote Up0Vote Down
    I will wait however long it takes for Parallax/Chip to release a P2 image. Meanwhile I am doing other things.
    However, I am not a P1 user waiting or the P2 for my business, and currently I don't have a P2 killer app.

    That said, I regret my response when we were asked if we wanted just a souped up P1B or P2 first :(

    As for not using an FPGA board/chip to implement a P1V/P2 because it is too expensive, well, it totally depends on your end use. There are some cases where this would be totally reasonable. Some products just need the features that a P1V/P2 could provide, and cost is not a problem. In fact, it is being done now (not by me) ;)
    My Prop boards: P8XBlade2, RamBlade, CpuBlade, TriBlade
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  • JDatJDat Posts: 103
    edited June 2015 Vote Up0Vote Down
    Cluso99 wrote: »
    I will wait however long it takes for Parallax/Chip to release a P2 image.

    Wise words!
  • tryittryit Posts: 72
    edited June 2015 Vote Up0Vote Down
    Cluso99 wrote: »
    I will wait however long it takes for Parallax/Chip to release a P2 image.

    Meanwhile, as with many other customers, I'm purchasing Arduino Due and Raspberry Pi boards. That's missed revenue for Parallax and more exposure for the competitors. I hope Parallax keeps its promise with the fall announcement and releases the Prop-2 this year.
  • Dave HeinDave Hein Posts: 5,380
    edited June 2015 Vote Up0Vote Down
    Parallax has quit making promises about the P2. They now express their P2 schedule dates as estimates. Many months ago Ken stated that they were planning on an event at Parallax headquarters in the Fall, and that it would be announced 6 months before when the P2 FPGA image would be available. 6 months from now will be just a few days before the end of Fall, so we are very close to the end of the time-frame expressed in Ken's schedule.

    About 4 months ago Chip did an interview where he said that the FPGA would probably take another 4 months. 2 months ago he posted that it would probably take another 2 months to develop. So based on those two comments from Chip the FPGA image should be coming out any day now. We can only hope that these estimates are accurate this time.
  • tryittryit Posts: 72
    edited June 2015 Vote Up0Vote Down
    Dave Hein wrote: »
    Parallax has quit making promises about the P2. They now express their P2 schedule dates as estimates.

    Parallax can change the goal posts all they want. They can play down their original commitments. The reality is this... if the spring and fall "milestones" are missed, current and future customers, vendors, academia, etc., will, be, disappointed. If hope they make it.

    For the next big product, whatever it may be, will Parallax open the effort to the community, or will it be kept in-house? Was it worth it for the Prop-2? What did you learn?

    Tryit
  • jmgjmg Posts: 11,076
    edited June 2015 Vote Up0Vote Down
    tryit wrote: »
    ... The reality is this... if the spring and fall "milestones" are missed, current and future customers, vendors, academia, etc., will, be, disappointed.

    There are ever-increasing choices out there, I note this one in the recent news

    http://www.analog.com/en/products/landing-pages/001/adsp-sc58x-adsp-2158x-series.html

    Note the table has for $23/1k, a 3 core device with 2 x 300MHz SHARC DSP(2x384k+256k+512k ROM) and 1 x 300MHz Cortex A5 (64k+256k) - and it has HS USB and GigE ethernet, plus DDR memory support.
    (and CAN x 2, QuadSPI, ePWM and various HW accelerators... & other peripherals )

    That's above an expected P2 price, but not by a lot.

    I'll add some eye-watering numbers from the bleeding edge... projections around 10nm FABs and costs..

    ["The capital expenditure required for 10nm, however, is approximately $2 billion for 10,000 WPM, and a facility running 40,000 WPM will cost $8 billion. Also, the minimum cost for a design at 10nm will be $150 million, so if revenues for a chip need to be 10 times higher than design costs to get a good return on the investment, 10nm chips will need to achieve sales of $1.5 billion."]
  • Dave HeinDave Hein Posts: 5,380
    edited June 2015 Vote Up0Vote Down
    tryit wrote: »
    The reality is this... if the spring and fall "milestones" are missed, current and future customers, vendors, academia, etc., will, be, disappointed. If hope they make it.
    There are still 4 days left to the end of Spring. Maybe Parallax will release an FPGA image just at the moment the Earth's axis aligns with the Sun. I'm still holding out hope that it will happen. Everybody should get ready to fire up their FPGA boards and/or order the 1-2-3 FPGA board.

    If Parallax doesn't post an FPGA image soon I think they should at least post an update on where things are. At the very least it will maintain some interest in the P2. Otherwise more and more people will move on to other devices.
  • BaggersBaggers Posts: 2,965
    edited June 2015 Vote Up2Vote Down
    I'm sure Chip isn't twiddling his thumbs just to annoy everyone waiting.

    It'll be done when it's done, the last thing Chip needs is count down pressure, it's probably for the best Chip doesn't post an update on where he is, as that would slow things down, then having to read through the myriad of question replies that he'd have.

    I can wait patiently because I know that Chip isn't rushing, he's taking his time to get it right, the last thing Parallax need is for something to be overlooked last minute due to external pressure, yes, I've done other things whilst waiting, like Dragon's Lair for the ZX81, but I'll definitely be looking forward to when it's available, because I know it'll be a pleasure to program for as is the original Prop, far more enjoyable than any other micro controller or even the Pi etc. yes I know this is my personal preference, and it may not be the same as everyone's but let's face it, the original Prop's ease of programming and fun factor is why we're all here!
  • Heater.Heater. Posts: 20,556
    edited June 2015 Vote Up0Vote Down
    Dave,

    By " Earth's axis" we normally mean the line through the north and south poles. If that aligns with the sun we will have a lot more to worry about that the lack of a Propeller FPGA image :)

    Now, mid-summer solstice would be a great time for the FPGA image to appear for us pagans. That happens when Earth's northern semi-minor axis is most inclined toward the sun. This year that will occur on the 21st June at 16:38. This coming Sunday.

    If Chip fires up the Altera build process now it might just complete in time!
  • Dave HeinDave Hein Posts: 5,380
    edited June 2015 Vote Up0Vote Down
    Heater, thanks for the science lecture. I was referring to the line that runs through the poles, which the Earth rotates around. The Summer solstice is when the projection of this line on the Earth's orbital plane is aligned with the line between the Earth and the Sun. I believe the semi-minor and semi-major axes are used to define the orbit of the Earth around the Sun, and do not define the solstice points. The Wikipedia page on Summer Solstice does refer to the Earth's rotational axis as a "semi-axis", but I'm not sure if that is the correct usage, since a semi-axis refers to an elliptical shape.
  • Heater.Heater. Posts: 20,556
    edited June 2015 Vote Up0Vote Down
    Dave,

    Do you have a link to a diagram showing what you mean? Because the picture you words conjure up in my mind tells me we are saying the same thing. With one major difference, that alignment you mentioned also happens at the winter solstice but the opposite way around.

    Certainly "semi-axis" is a correct description because the Earth is not sherical, it's is an oblate spheroid, i.e. if you cut it in half through the north and south poles you have an ellipse.
  • Dave HeinDave Hein Posts: 5,380
    edited June 2015 Vote Up0Vote Down
    Yes, we are describing the same thing. There are many diagrams on the internet. Use Google. Yes, there is also a winter solstice.

    I've never heard of the rotational axis referred to as a semi-axis before, but maybe that is the preferred term. I doubt it though.
  • potatoheadpotatohead Posts: 9,095
    edited June 2015 Vote Up0Vote Down
    This is the very first time I've heard "semi axis" in use! A quick google shows semi-major and semi-minor definitions which make sense to me. This term as shorthand in this discussion makes sense too, but isn't common use where I am for sure. Neat.

    I'm in waiting too. When it's done, it's done. Good times then. @Jim: Congrats on completing a very cool project. Heard your interview on the retrogaming podcast. Well done! I thought it nice when you asked, "how much time do we have?" lol You told 'em most everything, which made for a nice hour or so entertainment on my drive into work.

    Right now, I've got a nice little P1 industrial project to work on, that I really can't share here, and those FANUC robots to jam on. (they are amazing, and I'll drop a video here as soon as I get 'em to do something worth making a video of)

    I'm happy. And I'm on the hunt for a used broadcast NTSC optionally PAL broadcast monitor too. The prices on those are dropping now, and I had one in the distant past. You have not seen TV signal type graphics, until you've used one. Since we will be doing the TV stuff in software on P2, it's time to get tooled up to produce the awesome. :)

    @Dave: Maybe we will get a nice update, if not an image out of it all.
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  • Heater.Heater. Posts: 20,556
    edited June 2015 Vote Up0Vote Down
    Dave, potatohead,

    Well, am I making this up?

    The Earth's cross-section is an ellipse. An ellipse has a major and minor axis. Conveniently the Earth rotates about the minor axis, the one we are interested in here. The half of an axis from the centre outwards is a "semi-axis", just "half-axis". Hence I talk about "northern semi-axis", as opposed to "southern semi-axis". It's the inclination of that towards the sun that is of concern here.

    I'm not expert, where are you guys seeing mention of this on wikipedia? https://en.wikipedia.org/wiki/Solstice or here https://en.wikipedia.org/wiki/Summer_solstice

    Anyway, never mind all that. Where is my frikken P2 ?:)
  • David BetzDavid Betz Posts: 11,834
    edited June 2015 Vote Up0Vote Down
    Heater. wrote: »
    Anyway, never mind all that. Where is my frikken P2 ?:)
    Back on topic finally! :-)
  • Heater.Heater. Posts: 20,556
    edited June 2015 Vote Up0Vote Down
    Yes, sorry about that.

    Next up, Hubble's Law, the ultimate fate of the universe, and will the P2 arrive first?
  • JDatJDat Posts: 103
    edited June 2015 Vote Up1Vote Down
    Hwy P2 image release dare is so important that some guys are pushing to dates? Are you not satisfied with P1? Does P1 work so bad, that you need P2 ASAP? One of the interesting feature for P2 is code protection. All other needs (including bit bang) are Okay with P1. Probably I need 10 COGs if I am lazy with code optimisation and ASM... So it's if P2 will be released after another 2 or 3 years. So... What is main purpose for P2? Somebody needs new product? Chip and Ken are just humans and can not predict how good P2 development is going. Don't push on them. They have own business and they know better what they want to achieve. Be happy that there are so much of propeller users and be patient for another great satisfaction from parallax.
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