Prop-2 Release Date and Price
tryit
Posts: 72
Given the amount of positive progress to date, can Parallax commit to a release date? Price per chip? Price per development board?
Tryit
Tryit
Comments
I am certain that we will know these things as soon as they are actually know by any one.
Chip said in his interview that he thought the FPGA image would take about 4 more months, so I'm hoping for an FPGA image by June, and the get-together around the end of Fall. Maybe this year we will have a merry Chipmas.
The goal seems to be to give developers a head up start before the chip is produced, and also to find eventual errors/mistakes/whatever.
Mini Maker Fair might describe what will wait for you there. Somehow. I went to Rocklin once, and I did not regret spending the money to go down there for 3 days last year. It was a blast.
Highly recommended.
As for the name - no clue.
Enjoy!
Mike
The verilog need to be field proven before they commit to masks.
Plus there is no harm in also proving Development Software flows, and getting some publicity before signing the big cheques..
I am not sure about the publicity part of it. I wish there will be some. But it will be a quite interesting event. So I am sure that I will run down to Rocklin in the fall, putting some more miles on my 1995 SL500...
Enjoy!
Mike
However, that does not mean that other things don't need attending to, like developing and selling other stuff, to keep the lights on.
As with all Chip Design projects, it is propelled by both internal and external forces.
http://parallax.com/news/2014-09-19/propeller-2-schedule-update-longer-we-work-simpler-our-new-multicore-design-will
You're doing the same thing as I did, but in 2015 instead of 2006.
I got really excited by the first post of that thread : http://forums.parallax.com/showthread.php/90019-What-would-you-want-more-of-cogs-or-RAM
I've been monitoring the Prop 2 forum every day for a couple years. I started to lose interest when they made the bad silicon and when I heard about the thermal issues and the chip redesign from scratch.
Don't get me wrong, I want to be one of the first to test the new chip. But for now, I concentrate a little bit on other stuff like making custom boards for the Intel Edison.
In my opinion, Prop 2 availability is still far way. Even when it's out, it will take a lot of time before having a manual as nice as the one for the Prop 1. Be patient!
My prediction is FPGA images in 2015; real production chips in 2016 at the earliest.
Fair enough.
Since we're on the subject, why did it take so long to get here? Are there lessons to be learned here?
- Ideas for the Prop2 were discussed openly years before first designs even started.
- Some naivety in Fab differences ... other issues beyond my knowledge ... caused a total failure of first shuttle results.
- Time was allotted to adding community ideas and experimentation.
- Belated thermal considerations found design was too hot so was aborted outright.
- Further learning of modern methodologies created new work flows.
And Chip Gracey is kind of a one-man-band so the manpower is somewhat limited.
It is the way it is. We just have to be patient. Parallax could have been doing all the work in secret and made no official statements and the existence of the Prop2 design would be only speculation.
AFIK, that's one of the reasons for the "- Further learning of modern methodologies created new work flows."
Specifically I think they're outsourcing much of the layout work. I.e. the bits that take lots of man-hours and expensive tools to do. Thus saving Chip for what he's best at.
Marty
First of all, there was a mostly finished design for a Prop 1A with the added instructions (MUL, DIV, etc.) originally left out of the Prop 1 plus the additional I/O pins allowed for in the Prop 1 design. The commercial software used to test the final chip layout (and used for the Prop 1) had a bug in it that prevented the design from being completed. This bug was never fixed and started to delay the project too much. The first Prop 2 design had an unfortunate mistake in it that caused the first shuttle run to be useless except for some very basic structure testing.
"naive enough to take input from a bunch of hobbyists" --- a lot of the forum members are hobbyists. A few of them have extensive experience in a variety of areas ( hardware / software / compiler and operating system design & implementation / chip design / processor architecture / ... ). It's a very rich pool of expertise. The P2 design is much improved as a result of this process.
The thermal simulation was never executed previously afaik, even before the failed shuttle run. My understanding is Chip just didn't know how hot it was going to be. There was no implosion due to community input.
As for the so called eight years, a decent amount of that was public talk time before any action was taken.
And as Mike just said, I had almost no knowledge, it would seem there was a Prop1B in a holding pattern for some of that time. It's becoming clear now the old methods that had previously been used had failed them so they had to change tact. That really does take anyone time to reorganise around.
Are you sure about those assertions?
In my experience and from general reading of tech industry news for decades competent teams are quite often running seriously over time and or over budget. Many projects fail and get cancelled or end up not selling and get cancelled. Being in industry where companies hold their cards close to their chests people don't get to hear about many of those failures. They may not take 8 years, but they can burn through a ton of cash before a project is canned.
As evidence I offer two examples: The Inmos T9000. The Intel 432 (And Itanium I think). I'm sure others here can suggest more.
I would hardly consider Chip naive.
Companies may not traditionally be holding open house on an internet forum but they do have an army of sales people and field application engineers who are talking to and working with their customers. For sure they are keeping tabs on what their customers are doing and what they may need in future devices.
Parallax does not have such an army and this is the internet age so what happened on this forum can be seen as a brave new experiment. I would also point you to the developers at the RISC V CPU design project at Berkeley, they are now engaged in exactly a similar process of user input via the net. https://www.youtube.com/channel/UC5gLmcFuvdGbajs4VL-WU3g
"bunch of hobbyists" is rather insulting to the many people on this forum who are professionals and have in some cases decades of experience. They may not be chip designers but they certainly are experienced MCU users.
What actually are you suggesting? Could have been that Parallax hired a bunch of "competent" chip designers and the thing either still didn't work out or ended up nothing like what Chip intends and nobody wants. It would have cost a fortune as well.
This # is only to create a competent team! Not a good product.
What Parallax did with P1 was impossible until then. What Parallax does is impossible until now. I stopped working with chips after the T9000 crash, which turned all my investments to dust and only started over, when Chip's chip gave me an instrument to do for $10 what I could do decades before with an investment of $1000. And what about hobbyists. The American Amateur Radio Relay League pioneered communication, packet radio was promoted by amateurs, the Tamagoshi was invented by an amateur, Carl Benz was a fanatic, ... I was lucky to stand aside when a few persons grouped around Chip and started discussion on how to use a memory block intended as a look-up-table as a stack and what could be done, if two stack pointers use the cells from bottom and top. .... And remember the idea of LMM, originated by Bill. I know what I am talking about when I talk about "competent" engineers. Like specialists in spectrometry of UV from 253-254 nm. ;-)
It assumes the team is a only as strong as it's weakest link. One "dump head" and you are in real trouble.
Which makes me wonder....
Years ago I worked with a hardware engineer on largish embedded project comprising software, hardware and a big custom chip. Over lunch one day we were exchanging career stories and he explained that he had been working for 15 years or so and every one of the dozen or so project he worked on had been cancelled. He then went on to list them all, some quite well known things in that industry at that time.
You now make me think that if "a team is only as strong as it's weakest link" then perhaps he was the "dump head" that had doomed all those projects for so many years. A scary thought.
Needless to say that project was also canned after two years work
As for the market, if it is the hobbyist/educators, then I understand that less, and there it is proper for Parallax to listen to its forums in it design of products. When the P1 was introduced it was such a diversion from the BASICstamp that few of their customers moved over. And many of them probably became more open to looking at alternatives such as Arduino. Now the P1 compared favorably in performance to the BASICstamp, but combined with interpreted SPIN that performance was inferior to Arduino, and look at the price of Arduino products vs Parallax it compared poorly. Add to that another missing feature was 5V tolerance on pins, not 5V operation, but tolerance. A tough thing for the hobbyist market to swallow then and for some even now.
I too have been involved in big projects that have been canceled, but also others that went on to sell millions of units. Projects get canceled for lots of reasons, many times it is just the market changes and what looked like a good idea at the start turned out to be too late or too expensive. Then it makes sense to kill off a project. I can say that no where would an 8 year project be tolerated, especially when it consumes a major portion of the R&D budget. It is one thing to let a small proportion of funding go into some tangent research project. During the last 8 years look at what other things have happened in the hobbyist community, first Arduino has taken over the low end market, other hobbyist aggregaters have grown up, namely SparkFun, AdaFruit, Seedstudios and others. Then cheap ARM alternatives followed by RasbPi and now Edison. In the early days the BASICstamp was quite successful as there were not many alternatives for the hobbyists unless they wanted to do board design and handle ZIF sockets with UV EPROMs and mostly write in ASM. But now there are lots of cheap alternatives. So my question is why is Parallax still chasing the Propeller dream? When you can get cheap ARMs for less than $1, designing a CPU is like saying let's design our own SMT capacitor. It is just a commodity.
How much better off would we be with $5M spent on better tools for micros or integration with WiFi or Tablets or phones?
And to preempt the questions about why I kibitz here, it makes more sense to kibitz on Parallax business practice here than to make suggestions to Radio Shack. And why do I watch, I check it out every 6 months or so to see what is happening, and why even that? I guess I like watch slow motion train wrecks.
So my answer to this forums thread "release date and price" -- too late and too much.
I agree, I disagree, let's see.
Yes PASM and Spin are a no-no for general acceptance. Spin is actually nice and easy but that matters not when you are up against masses of people who expect either BASIC or C.
But then, I find it amazing that the Arduino has taken off so well when it uses that huge and complex, decidedly beginner unfriendly language C++. Who would have guessed that would worked out?
I don't think ARM is the main point for most MCU users. We had embedded products on 68xxx that moved onto PowerPC MCUs. That moved on to ARM. That work on on Intel or even MIPS It's the software stack that matters, if it's available on a new chip who cares what the instruction set is?
I cannot see how P1 performance is inferior to Arduino. Price is an issue, as is 5v tolerance for the hobby market.
It's Chip's dream, it's his company. I'm glad there are people in the world with such dreams. What do you mean "followed by"? As far as I know there were no Raspi like devices as cheap as that prior to the Raspi. The Edison is a sad attempt at grabbing that market. Interestingly the RISC V project exactly wants to do that. They want to be free of Intel and ARM. They are backed by Google, Amazon, FaceBook, MS, the Indian Government. Many big players want that freedom. Chip was ahead of the pack with that dream at least.
Investing in this gives good press-releases, and a chance to play a little FUD.
It may even help talk-down the ARM fees... a little
The real challenge comes long after the press releases, which is the developing of the following generation.