No. It takes me a day to get a working compilation for a particular device/board combination. Then, I must maintain it as we move forward. I don't think it's worth doing for an FPGA that is three generations old. I wish you had some new Cyclone V board like this:
I've used both. I've had one of the Digilent Spartan 3 boards for a few years, and I did quite a lot with the Xilinx CPLDs at one time. The Altera tools seem easier to use, and are a lot faster, but Xilinx seem to be ahead technologically. For the average user, I don't think it really matters.
I have use a few Xilinx parts in designs over the years. To me they seem to be ahead and cheaper comparing LEs. As for the tools, I have not used Altera so cannot comment. I would expect some learning curve even though they both use verilog and vhdl. I have a Spartan 3A board by Avnet and had on my list to get a Spartan 6LX board with a large LE count.
However, I would not suggest you change Chip, as I donvt think the time to learn would be worth the trouble.
I don't have as much experience as Leon but I came to the same conclusion. Xilinx silicon is superior,but their software has grown into a glued together mess compared to Quartus II.
Yes, the Quartus II software feels as if it was designed as a whole, whereas the Xilinx tools seem to consist of lots of different applications linked together by the IDE.
I first came across FPGAs when I worked for Racal, and one of the early ones was incorporated in our new range of military radios. It was a Xilinx device, of course, and I think it took over 24 hours to build the programming file. I was playing with Lattice CPLDs at home, at the time, and I used one for the glue logic required for a simple 68008 controller board. It replaced about six TTL chips.
Xilinx silicon is superior,but their software has grown into a glued together mess compared to Quartus II.
When I was doing VHDL work with Xilinx, I edited the files with Gedit (simple text editor), and just keep a very small corner of the Xilinx software open for the compile process. It worked very well.
... I've read how certain too-big-to-fail banks have massive low-latency connections to the main trading systems at the NYSE and CME. By intercepting asks and bids, they execute meta-trades within milliseconds that front run trades by regular dolts like us, and probably everyone else. That's how they can make money, no matter what the market does. ...
That's how some can ... it is, of course, legalised theft. As in speculation (gambling) is a game of who can outwit (fluke it) to grab the biggest lot. Problem with this is it's being applied to third-party savings, and it's usually done with no real consent or even knowledge that it's happening.
Where I live it's investment brokers and managed funds and the likes that partake in the above activities, not banks. These shady outfits do give some hint that things may not always be a rosy outcome but never let you know it could all vanish in the blink of an eye and certainly don't hand out less than rosy looking graphs. And making enquiries about the market activities just yields "it's all good" with no further help. It all seemed very clubby to me. I got out pretty early on. Though, I suspect some of my saving will be doing the rounds even now.
Banks and governments simply create the money for real - which is another topic altogether.
Yesterday some some forum members discovered a bug in the RDQUAD circuitry which is now fixed.
I hate to be a pain but is there any way the DE0-Nano version could put one or more of the LEDs on Propeller pins so they can be used for debugging? I know you currently use all 8 to indicate which COGs are running but since there is only one COG could one or two be connected to Propeller pins? I guess that would even work on the DE2-115 since it only supports six COGs.
My reading of the data sheet says they are limited to 2mA or 4mA depending on the configuration, so current limiting the LED's to 4mA is probably a good idea
mind you, in the real world I really don't think 5mA would hurt the FPGA, but I won't take that chance with my Nano
My reading of the data sheet says they are limited to 2mA or 4mA depending on the configuration, so current limiting the LED's to 4mA is probably a good idea
mind you, in the real world I really don't think 5mA would hurt the FPGA, but I won't take that chance with my Nano
This is exactly why I requested that one or two of the on-board LEDs be wired to Propeller pins. I was nervous about wiring anything up to the DE0-Nano for fear of frying it.
This is exactly why I requested that one or two of the on-board LEDs be wired to Propeller pins. I was nervous about wiring anything up to the DE0-Nano for fear of frying it.
It is easy to current limit the LED's to 2mA, but a lot of LED's won't light up well enough with that little juice.
I second your request for re-wiring the LED's to some P2 pins.
Right now I've mostly been using the monitor (EXTREMELY useful) and a logic analyzer when needed.
Actually, the monitor is probably what I should be using but I'm used to thinking of LEDs as the perfect debug aids for microcontroller programming. I need to change my mindset for the P2 I guess! :-)
When we all get more cogs, just have your program launch a monitor instance on another set of pins and poke at your program while it is running. I've been doing this and it is damn cool. Just use two Prop Plugs and leave them connected. One is for programming and serial I/O back to the developer, the other is connected to a PUTTY window.
Later, when I've built up some cog drivers, it will be possible to fire off something with the IDE, once it's running, use the monitor to stop a driver cog, edit it's code or parameters, assuming that code is in HUB, then fire it back up! If the code is written to poll and connect, this is a lot like restarting a service or something. Frankly, it would also be possible to recompile the driver, squirt it into the HUB somewhere, then fire it up, completely replacing a portion of a running program!
Comments
http://forums.parallax.com/showthread.php?144478-LMM2-Propeller-2-LMM-experiments-%2850-80-LMM2-MIPS-160MHz%29
Are you working with Xilinx device too? Any chance to see this ported to a newer Xilinx board? We have a lot of new Xilinx stuff at my University.
I've never used Xilinx FPGA's. I wonder which FPGA's, Altera or Xilinx, provide the most function for the money. Do you think we could just ask them?
However, I would not suggest you change Chip, as I donvt think the time to learn would be worth the trouble.
I first came across FPGAs when I worked for Racal, and one of the early ones was incorporated in our new range of military radios. It was a Xilinx device, of course, and I think it took over 24 hours to build the programming file. I was playing with Lattice CPLDs at home, at the time, and I used one for the glue logic required for a simple 68008 controller board. It replaced about six TTL chips.
When I was doing VHDL work with Xilinx, I edited the files with Gedit (simple text editor), and just keep a very small corner of the Xilinx software open for the compile process. It worked very well.
I set it up over lunch, everything went easy peasy which was nice change of pace.
One thing I did see is I need to epoxy a backer board to the Prop-Plug, it likes to bend when standing up unsupported.
Now to come up with some things to try out.
C.W.
That's how some can ... it is, of course, legalised theft. As in speculation (gambling) is a game of who can outwit (fluke it) to grab the biggest lot. Problem with this is it's being applied to third-party savings, and it's usually done with no real consent or even knowledge that it's happening.
Where I live it's investment brokers and managed funds and the likes that partake in the above activities, not banks. These shady outfits do give some hint that things may not always be a rosy outcome but never let you know it could all vanish in the blink of an eye and certainly don't hand out less than rosy looking graphs. And making enquiries about the market activities just yields "it's all good" with no further help. It all seemed very clubby to me. I got out pretty early on. Though, I suspect some of my saving will be doing the rounds even now.
Banks and governments simply create the money for real - which is another topic altogether.
http://forums.parallax.com/showthread.php?144478-LMM2-Propeller-2-LMM-experiments-(50-80-LMM2-MIPS-160MHz)&p=1149263&viewfull=1#post1149263
Can Video circuit be used to send continuous stream of 3-4 DAC's Data instead of Video lines that are separated by H,V synchronization
http://forums.parallax.com/showthread.php?144199-Propeller-II-Emulation-of-the-P2-on-DE0-NANO-amp-DE2-115-FPGA-boards&p=1145603&viewfull=1#post1145603
Yesterday some some forum members discovered a bug in the RDQUAD circuitry which is now fixed.
You bet! You control everything.
Thanks
mind you, in the real world I really don't think 5mA would hurt the FPGA, but I won't take that chance with my Nano
It is easy to current limit the LED's to 2mA, but a lot of LED's won't light up well enough with that little juice.
I second your request for re-wiring the LED's to some P2 pins.
Right now I've mostly been using the monitor (EXTREMELY useful) and a logic analyzer when needed.
Hand waving, incense, and magic words optional
I just tried this and it is *way* better than LEDs!
And it is WAY better, I agree.
I write my results out to the hub at $2000 in longs before booting back to the monitor.
Later, when I've built up some cog drivers, it will be possible to fire off something with the IDE, once it's running, use the monitor to stop a driver cog, edit it's code or parameters, assuming that code is in HUB, then fire it back up! If the code is written to poll and connect, this is a lot like restarting a service or something. Frankly, it would also be possible to recompile the driver, squirt it into the HUB somewhere, then fire it up, completely replacing a portion of a running program!
Damn cool, if you ask me.
Congrats about getting C running!
I look forward to trying it.