Propeller II: Emulation of the P2 on FPGA boards (Prop123-A7/A9, DE0-NANO, DE2-115, etc)

Cluso99 · 2012-11-28 15:08

======================================================================
This is the new P2 info (26 September 2015 onwards) after the P2-Hot...
(for prior discussions, and the old P2-Hot & prior info, see the sections further below)
======================================================================
Info in this thread begins from this posting onwards...
http://forums.parallax.com/discussion/comment/1347832/#Comment_1347832

P2 FPGA release (26 Sept 2015)
http://forums.parallax.com/discussion/162298/prop2-fpga-files/p1

P2 Documentation thread
http://forums.parallax.com/discussion/162409/p2-2015-assembly-instruction-set-document-plus-bugs-section#latest
P2 Addressing and Labelling Syntax (summary thread)
http://forums.parallax.com/discussion/162483/addressing-and-labeling-syntax

Latest DE2-115 loading instructions
http://forums.parallax.com/discussion/comment/1347927/#Comment_1347927

New FPGA Boards supporting the P2 FPGA Emulation
* Propeller 1-2-3 FPGA Board (#60054) "A7"
http://forums.parallax.com/discussion/161545/propeller-1-2-3-fpga-board-60054-available-to-forum-members-375/p1

Please note you will require Quartus II v15 for the Cyclone V based boards.

======================================================================
Below is some info after the P2-HOT, but prior to the 26-Sep-2015 FPGA code release
======================================================================

There has been a lot of discussion following the P2-HOT. Not much of it is referenced here as it was largely in a state of flux.

Chip has released the binary for:
- a 1 cog Propeller II emulation (with restrictions) that runs on a Terasic DE0-NANO FPGA board.
- a 5 cog Propeller II emulation (with restrictions) that runs on a Terasic DE2-115 FPGA board.

19 April 2014:
About a month ago, the P2 hit a considerable snag with power being way too high.

New Proposed Specs (from my recollection)
* 512KB Hub Ram, 128-bit quad access
* 2KB Cog Ram, 128-bit quad access
* 16 Cogs, 2 clock instructions @ 200MHz = 100 MIPs
* Hubexec support (details still being decided)
* Some form of Smart I/O.

There has been quite a lot of discussion (about the changes) here
http://forums.parallax.com/showthread.php/155132-The-New-16-Cog-512KB-64-analog-I-O-Propeller-Chip
The current proposed P2 (sometimes called P1+ or P16+) Proposed Instruction Set is here
http://forums.parallax.com/showthread.php/155132-The-New-16-Cog-512KB-64-analog-I-O-Propeller-Chip?p=1260747&viewfull=1#post1260747
My instruction summary is here
http://forums.parallax.com/showthread.php/155132-The-New-16-Cog-512KB-64-analog-I-O-Propeller-Chip?p=1260872&viewfull=1#post1260872
Chip posted an ALU Timing Diagram
http://forums.parallax.com/showthread.php/155132-The-New-16-Cog-512KB-64-analog-I-O-Propeller-Chip?p=1261426&viewfull=1#post1261426

Prior to this snag, there were two P2 FPGA code postings. These were interim released without full documentation.
Dates 19 Mar and 24 Mar 2014. If you really want to try them, please search the P2 forums.

======================================================================
Below is all the previous info for the older releases up to and including the P2-HOT
======================================================================

The following is now out of date...
Propeller Overview
The Propeller II is a new 8 core 32bit RISC microcontroller to be released shortly by Parallax http://www.parallaxsemiconductor.com/
This follows on from the current 8 core P8X32A propeller microcontroller.
The propeller chips utilise soft (intelligent) peripherals, so that the one chip can have many different peripherals that can even be dynamically changed on the fly. The propeller utilises a large SRAM rather than FLASH making software changes on the fly a reality.

Way to go Chip & Parallax!

This thread is for discussions specific to the P2 emulations on these FPGA boards (Altera Cyclone IV FPGAs).

I try to keep this post updated with the latest information and links, so please let me know if something needs updating here.

Update 28 Jan 2014:
The latest code (FPGA, pnut.exe, sample programs, documents) are all in one zip with info on this post
http://forums.parallax.com/showthread.php/153422-HUB-EXEC-Update-Here?p=1237960&viewfull=1#post1237960
Beware the instruction set has major changes - even better than the last impressive changes - Fantastic work Chip!

Update 26 Nov 2013:
The latest code (FPGA, pnut.exe, sample programs, documents) are all in one zip with info on this post
http://forums.parallax.com/showthread.php/151904-The-Big-Update-is-done!!!?p=1221918&viewfull=1#post1221918
Beware the instruction set has changed - really impressive changes - Congratulations Chip!

Update 1 Oct 2013:
The latest code (FPGA, pnut.exe, documents) are all in one zip with info on this post
http://forums.parallax.com/showthread.php/150588-Big-update-for-DE2-115-and-DE0-Nano-users-w-add-on-boards?p=1210517&viewfull=1#post1210517
The Monitor Entry point now seems to be $700 (was$70C) - thanks ozpropdev
Warning for DE0 Users:
This code only works using the Parallax expansion board.
A shunt/jumper on JP3 pins 3 to 5 on the DE0 board.
The SPI Flash must be removed from the socket on the expansion board.

Downloads...
DE0-NANO & DE2-115 & PNUT.EXE:
The latest (as of 5 Dec 2012) download from Chip for both FPGA boards and pnut.exe is updated in this post (#106)...
http://forums.parallax.com/showthread.php?144199-Propeller-II-Emulation-of-the-P2-on-DE0-NANO-amp-DE2-115-FPGA-boards&p=1146196&viewfull=1#post1146196
The latest reference is from post (#193)...
http://forums.parallax.com/showthread.php?144199-Propeller-II-Emulation-of-the-P2-on-DE0-NANO-amp-DE2-115-FPGA-boards&p=1147388&viewfull=1#post1147388
2013/1/10: Latest DE2 emulation with onboard SD pins connected (see this post and the following 2)
http://forums.parallax.com/showthread.php/144199-Propeller-II-Emulation-of-the-P2-on-DE0-NANO-amp-DE2-115-FPGA-boards?p=1156757&viewfull=1#post1156757
A new FPGA download (10 Apr 2013) for both the DE0 & DE2 for accessing the SDRAM is here (the DE2 is a few posts earlier), together with P2 PASM example code for the SDRAM..
http://forums.parallax.com/showthread.php/147301-SDRAM-Driver?p=1176286&viewfull=1#post1176286

DE0-NANO:
(see post #2)

DE2-115:
(see post #5)

Getting started on your DE0-NANO / DE2-115 board...
Both downloads include an example spin program. This has setup instructions for the FPGA boards at the top of the file.

Edit & Compile...
Both downloads contain the PNUT.exe which is similar to the PropTool - it has an editor and P2 compiler.

P2 Instruction Set & P2 Details (preliminary)...
The latest instruction set details from Chip are available throughout this thread and then following on in this thread (from 9 December 2012) "The unofficial P2 documentation project". Peter Jakaki and Seairth (and others) have converted this information to google docs, including nice formatting and a web-page version...
The web-page version of the document is viewable without any signing in required
If you want to contribute then go to the Google document and request sharing.
I have an Excel Spreadsheet summary of the P2 instruction set. For now, scan from the end of the thread backwards for the latest post (it is a zip file due to forum restrictions).

P2 Monitor Rom...
Doug (potatohead) has documented using the Monitor ROM present in the P2...
http://forums.parallax.com/entry.php/1446-Using-The-P2-Monitor-Document-Complete-(for-now)

P2loader by David Betz
This is a Propeller II binary downloader and is available here...
http://forums.parallax.com/showthread.php?144384-p2load-A-Loader-for-the-Propeller-II

P2 PropTerminal by Andy
Andy has a P2 version of his PropTerminal program available here...
http://forums.parallax.com/showthread.php?144199-Propeller-II-Emulation-of-the-P2-on-DE0-NANO-amp-DE2-115-FPGA-boards&p=1150859&viewfull=1#post1150859

PFTH (P2 FORTH) by Dave Hein
Dave Hein has ported PFTH 1.03 (Prop FORTH) to run on the P2. It has been tested on the DE2-115 but not the DE0-nano yet. It is available here...
http://forums.parallax.com/showthread.php/144199-Propeller-II-Emulation-of-the-P2-on-DE0-NANO-amp-DE2-115-FPGA-boards?p=1239915&viewfull=1#post1239915

Altera Quartus FPGA Software
Only the downloader is required.
https://www.altera.com/download/software/prog-software
Here is a later discussion and drivers about this
http://forums.parallax.com/showthread.php?144199-Propeller-II-Emulation-of-the-P2-on-DE0-NANO-amp-DE2-115-FPGA-boards&p=1148613&viewfull=1#post1148613
Here is some more info and drivers (thanks D.P.)...
http://forums.parallax.com/showthread.php?144643-Propeller-II-emulation-for-Idiots&p=1150972&viewfull=1#post1150972

Update 21Dec2012:
My DE0-Nano has arrived...
I downloaded the Quartus II Stand-Alone Programmer (Windows exe 128MB = 12.1_177_program_windows.exe and is !142MB).
Next I plugged in the DE0-NANO (via the miniUSB port). Windows could not locate a driver.
I downloaded the Driver.rar (see D.P.'s thread above for this) and unzipped it.
Next I opened Start/Control Panel/USB_Blaster/Hardware/Properties/Update Driver (hope I wrote this down correctly after a few attempts)
and Browsed to the unzipped Driver folder and clicked on something like manually look in this folder and sub-folders. The driver was located and installed.
Download the Emulator & Pnut.exe and view the pictures (.png files) in the download for the setup.
Start the Quartus II Standalone Programmer
* Click the Hardware Setup, and select the USB-Blaster (USB-0)
* Click File/Open and locate and select the downloaded DE0_Nano_Prop2.jic file
* Click on the Program/Configure and the Verify boxes for this file (note the Program/Config also selects for the default image too).
* Click Start and your FPGA will be programmed/verified with the P2 emulation. Check the progress bar to ensure success.
* Close Quartus II program.
* Disconnect power to the DE0 and the USB connection.
* Connect your PropPlug to the DE0 (or expansion board if using this).
* Re-apply power.
* Launch PST and hit <space> and you should see the Propeller II Monitor prompt returned.

You can also find info in Doug's (potatohead) P2 Monitor document located here
http://forums.parallax.com/showthread.php?144643-Propeller-II-emulation-for-Idiots&p=1150974&viewfull=1#post1150974

Some suggestions...

No doubt there will be a lot of suggestions for changes to the emulation.
- Suggest by all means to reach a consensus, but don't interrupt Chip from his work in getting the P2 documented and out.
Post your test programs here by all means
Please keep this thread for discussions on the DE0-NANO and DE2-115 and the P2 emulation
There is also some discussion about the instructions and how they execute
There is some preliminary info on P2 pcbs too

Add-on boards for DE0 & DE2...
Update 14 Mar 2013:
These pcbs are now available. Here is the thread where they are being discussed...
http://forums.parallax.com/showthread.php/146197-DE0-Nano-and-DE2-115-add-on-boards-for-Prop2-emulation-are-ready!

Here is the original thread about the P2. The emulation discussion starts around page 40.
http://forums.parallax.com/showthread.php?125543-Propeller-II-update-BLOG/page44

The Emulation Boards...

DE0-Nano Development and Education Board by Terasic
WARNING: There are two DE0 FPGA boards. The IS the one you want.
It has a Cyclone® IV EP4CE22F17C6N FPGA
http://www.terasic.com.tw/cgi-bin/page/archive.pl?Language=English&CategoryNo=139&No=593&PartNo=1
Cost US$79 or US$59 academic
Digikey and Element14 both carry these boards

Altera DE2-115 Development and Education Board by Terasic
http://www.terasic.com.tw/cgi-bin/page/archive.pl?Language=English&CategoryNo=139&No=502
Cost US$595 or US$299 academic

cgracey · 2012-11-28 15:18

UPDATED ZIP FILE BELOW - NEW DE0_NANO and DE2_115 CONFIGURATIONS

I got the Terasic DE0-Nano board working!

It runs one cog at 60MHz (takes 85% of the FPGA). It doesn't need any special wiring - just plug a PropPlug into part of a header and give it power:

You get 32 I/O pins, plus the serial connection:

Also, the Terasic DE2_115 board runs six cogs at 60MHz (takes 99% of the FPGA):

Here's a zip with everything you need, minus the Altera configuration software:

Terasic_Prop2.zip

Cluso99 · 2012-11-28 16:16

Chip: This is absolutely brilliant and revolutionary. No other vendor is this open! What a way to get a head start on getting software (and hardware) ready for the ultimate P2 release.

Chip: Do you think we need a separate thread for the DE2-115 or do you think we should just use this one?
(I do not want to clog this thread with everyone's opinion - I will update the title if this thread will do both)

cgracey · 2012-11-28 17:42

Cluso99 wrote: »

Chip: This is absolutely brilliant and revolutionary. No other vendor is this open! What a way to get a head start on getting software (and hardware) ready for the ultimate P2 release.

Chip: Do you think we need a separate thread for the DE2-115 or do you think we should just use this one?
(I do not want to clog this thread with everyone's opinion - I will update the title if this thread will do both)

This thread should be fine, since I'm making them behave the same way.

cgracey · 2012-11-28 20:05

Here is what anyone needs to run the DE2_115 board as a 6-cog/full-memory 60MHz Prop2 emulator:

DE2_115_Prop2.zip

I haven't been able to test this, since my DE2-115 board died, but I'm fairly confident that it will work okay. If not, I'll fix it after I get a new DE2-115 board tomorrow.

David Betz · 2012-11-28 20:10

cgracey wrote: »

Here is what anyone needs to run the DE2_115 board as a 6-cog/full-memory 60MHz Prop2 emulator:

DE2_115_Prop2.zip

I haven't been able to test this, since my DE2-115 board died, but I'm fairly confident that it will work okay. If not, I'll fix it after I get a new DE2-115 board tomorrow.

That's great! Does that mean that the PCB you've been designing for the DE2-115 board isn't actually needed? Just the stock DE2 board is enough?

cgracey · 2012-11-28 20:18

David Betz wrote: »

That's great! Does that mean that the PCB you've been designing for the DE2-115 board isn't actually needed? Just the stock DE2 board is enough?

Yes, if you don't care about having a nice SPI Flash hookup. Bill Henning was pointing out that we could map Prop2 pins to many of the DE2-115 peripherals and get our DACs that way, for example, via their VGA circuit. Both the DE0-Nano and the DE2-115 boards have big SDRAMs, as well, that can be connected.

Sapieha · 2012-11-28 20:23

Hi Chip.

If it is possible -- Can You map even SPI on DE0-NANO that handle Analogue-IN ?

cgracey wrote: »

Yes, if you don't care about having a nice SPI Flash hookup. Bill Henning was pointing out that we could map Prop2 pins to many of the DE2-115 peripherals and get our DACs that way, for example, via their VGA circuit. Both the DE0-Nano and the DE2-115 boards have big SDRAMs, as well, that can be connected.

Peter Jakacki · 2012-11-28 20:24

cgracey wrote: »

Here is what anyone needs to run the DE2_115 board as a 6-cog/full-memory 60MHz Prop2 emulator:

DE2_115_Prop2.zip

I haven't been able to test this, since my DE2-115 board died, but I'm fairly confident that it will work okay. If not, I'll fix it after I get a new DE2-115 board tomorrow.

I'm sitting here with a very big smile on my face. Now, to load this onto the board and try not to let any of that magic smoke out!
Thanks heaps Chip. Once again, this is a fantastic company, if you guys had come up with the Arduino (but Prop based) then Parallax would totally smite the rest. But we are going to work on that.

Sapieha · 2012-11-28 20:30

Hi Chip.

Now I think I have all parts in correct place.

Some of them connected to !

cgracey · 2012-11-28 20:30

Sapieha wrote: »

Hi Chip.

If it is possible -- Can You map even SPI on DE0-NANO that handle Analogue-IN ?

Sure! The first thing we need to standardize across the two boards is the open pins 31..0, the serial pins 91..90, the SPI flash pins 89..86, the SDRAM pins, and then we'll have about 16 left for other stuff.

cgracey · 2012-11-28 20:34

Sapieha wrote: »

Hi Chip.

Now I think I have all parts in correct place.

Some of them connected to !

Wow! It looks really good. Boards laid out by hand always have a nice flow to them. That's an awful lot of stuff for one cog, though. That is more worthy of the DE2-115 board.

Peter Jakacki · 2012-11-28 20:48

cgracey wrote: »

Here is what anyone needs to run the DE2_115 board as a 6-cog/full-memory 60MHz Prop2 emulator:

DE2_115_Prop2.zip

I haven't been able to test this, since my DE2-115 board died, but I'm fairly confident that it will work okay. If not, I'll fix it after I get a new DE2-115 board tomorrow.

I'm getting the corrupted message just like Bill did. It's the standard software that comes with it.

Sapieha · 2012-11-28 20:48

Hi Chip.

On PCB I show in previous post I used

JP1 GPIO_0_IN0 = RESn
JP1 GPIO_0_0-31 = IO 0 - 31
JP1 GPIO_0_32-33 and entire JP2 GPIO_1_0-33 as DAC 0-3

JP3 GPIO_2_0-12 as long I have named as IO_79-91 (Yours name convention for Ports)

As Long.
IO 91 - 90 = Serial
IO 89 - 86 = Flash
IO 85 - 82 = uSD
IO 81 - 80 = PS2

IO 79 = Maybe one LED (free)

To that 4 buttons on right side will use 3 GPIO_2_IN0-2 and 1 GPIO_1_IN0

cgracey wrote: »

Sure! The first thing we need to standardize across the two boards is the open pins 31..0, the serial pins 91..90, the SPI flash pins 89..86, the SDRAM pins, and then we'll have about 16 left for other stuff.

Sapieha · 2012-11-28 20:53

Hi Chip.

For one Propeller 1 Logic analyser and one PCB after Parallax made that PCB --->
Entire work belong to Parallax.

cgracey wrote: »

Wow! It looks really good. Boards laid out by hand always have a nice flow to them. That's an awful lot of stuff for one cog, though. That is more worthy of the DE2-115 board.

Peter Jakacki · 2012-11-28 21:07

Peter Jakacki wrote: »

I'm getting the corrupted message just like Bill did. It's the standard software that comes with it.

The Quartus web help is circular, if your file is corrupted then replace it with one that is not -- or -- convert the sof file from a later version. So I either need an sof file or download and install the multi gigabyte Quartus monster.

cgracey · 2012-11-28 21:09

Peter Jakacki wrote: »

I'm getting the corrupted message just like Bill did. It's the standard software that comes with it.

Any luck yet? I can't remember what all you have to do, but I know you need the USB plugged into the DE2-115 with it powered up and SW19 set to 'PROG'. Then you need to get into the Altera Programmer software and select Active Serial Programming. Then you load that .pof file I put in the .zip. You might need to Add Device and select an EPC64 (or something 'EP64'). Once it's all set up and the Programmer software sees your USB hookup (which you might have to monkey with the menus regarding), you're ready to click Start and get the board programmed. After that, disconnect the USB, put SW19 into 'RUN' position, and cycle the power. The board should wake up thinking it's a Prop2.

cgracey · 2012-11-28 21:19

Peter Jakacki wrote: »

The Quartus web help is circular, if your file is corrupted then replace it with one that is not -- or -- convert the sof file from a later version. So I either need an sof file or download and install the multi gigabyte Quartus monster.

You might need to download the big Quartus mess. That file should be fine. I renamed it from top.pof to what it's called now. Maybe the name is embedded and causing a problem. Try renaming the file to top.pof.

Peter Jakacki · 2012-11-28 21:21

cgracey wrote: »

You might need to download the big Quartus mess. That file should be fine. I renamed it from top.pof to what it's called now. Maybe the name is embedded and causing a problem. Try renaming the file to top.pof.

Okay, I'm wrangling with the software, trying different things. I had been able to download and run demos that came with it. I'll keep on plugging away and let you know as soon as I have had success.

nutson · 2012-11-28 21:41

I initially had the "JIC file corrupted" message trying to program the DE0-nano using Quartus 11.sp1. Then downloaded the standalone programmer from Quartus12.1 ( https://www.altera.com/download/software/prog-software ) and that worked fine. So you don't need to download and install the complete Quartus web edition. Don't forget to powercycle the board after programming, that was my initial error. The FPGA configuration is loaded from the EPCS16 device into the FPGA on poweron.

I will start working with the DE2-115 board now.

Regards

Nico Hattink

Peter Jakacki · 2012-11-28 21:49

nutson wrote: »

I initially had the "JIC file corrupted" message trying to program the DE0-nano using Quartus 11.sp1. Then downloaded the standalone programmer from Quartus12.1 ( https://www.altera.com/download/software/prog-software ) and that worked fine. So you don't need to download and install the complete Quartus web edition. Don't forget to powercycle the board after programming, that was my initial error. The FPGA configuration is loaded from the EPCS16 device into the FPGA on poweron.

I will start working with the DE2-115 board now.

Regards

Nico Hattink

Thanks, I had already done that and just downloaded the 12.1 programmer but I'm still doing some wrangling.

Peter Jakacki · 2012-11-28 21:56

Okay, looks like I needed to tick the tiny little program box, it's loading in slowly now, it should be right.

Tubular · 2012-11-28 21:59

Just noticed while downloading, that Altera warn their website will be down for ~6 hours on Friday evening.

(In case anyone will be tearing into this as soon as they are home Friday evening... you might want to download the stand alone .POF programmer, or complete 4GB package, in advance)

nutson · 2012-11-28 22:19

GOT THE DE2-115 BOARD WORKING!!! Talking with the ROM monitor now !! Set the board programming switch, in the programmer select "" active serial" , selct the EPCS64 device and feed it the .POF file. Amazing

Nico Hattink

nutson · 2012-11-28 22:37

And I can work with Pnut.exe, running the example Chip gave in the Spin file now.

Too bad I have other duties today,will try more later this evening.

Nico Hattink

PS the signals on the DE2-115 connector are cleaner on the oscilloscope than those from the DE0-nano. Must be the series resistor and protection diodes on the DE2-115 board.

Peter Jakacki · 2012-11-28 23:04

Okay, I've started coding my Tachyon by starting with the serial transmit routine. I am gleaning some information from examining the PNUT.exe binary and the detailed preliminary features list. Is there more information elsewhere or is that the stuff that's still coming?

EDIT: I'm wondering about the default clock modes etc. I just tried transmitting which works but I need to get the timing right.

Peter Jakacki · 2012-11-28 23:43

I have my very first HELLO WORLD code, it's rough but it's functional. I manually tuned the baudrate and it comes out at 460,800 baud at present, nothing fancy.

CON


baud            = 615_000       ' actually it's 460800  


' Standard Port assignments
_scl             = 28
_sda             = 29
txd             = 90-64
rxd             = 31

' Stack sizes
datsz           = 12            'NOTE: Doesn't need to be deep (nor should it be) - augmented by loop stack and registers
retsz           = 18
loopsz          = 8


DAT
        org

        mov    dirc,txmask
        
MAINLP
        mov    tos,#$0D
        call    #TRANSMIT
        mov    tos,#$0A
        call    #TRANSMIT
        mov    tos,#"H"
        call    #TRANSMIT
        mov    tos,#"E"
        call    #TRANSMIT
        mov    tos,#"L"
        call    #TRANSMIT
        mov    tos,#"L"
        call    #TRANSMIT
        mov    tos,#"O"
        call    #TRANSMIT
        mov    tos,#$20
        call    #TRANSMIT
        mov    tos,#"W"
        call    #TRANSMIT
        mov    tos,#"O"
        call    #TRANSMIT
        mov    tos,#"R"
        call    #TRANSMIT
        mov    tos,#"L"
        call    #TRANSMIT
        mov    tos,#"D"
        call    #TRANSMIT
        mov    tos,#" "
        call    #TRANSMIT
        jmp    #MAINLP

{ ****** CONSOLE SERIAL OUTPUT ******  }
' Transmit the character that is in the tos register
'
TRANSMIT
            or    tos,#$100
            shl    tos,#1
                        mov     R1,#10  ' 8 data bits + 1 start + stop bits
txdat                   getcnt  R0
                        add     R0,txticks
txbit                   shr     tos,#1 wc       ' lsb first
                        muxc    pinc,txmask     ' output bit
                        waitcnt R0,txticks
                        djnz    R1,#txbit       'another bit to transmit?
TRANSMIT_ret            ret
'            jmp     #DROP

'****************** COG VARIABLES *****************
'

IP              long 0  ' Instruction pointer
ACC             long 0  ' Accumulator for inline byte-aligned literals
deltaR          long 0
target          long 0  ' WAITCNT target
R0              long 0
R1              long 0
R2              long 0
X               long 0  'primary internal working registers


tos
datastk         long 0[datsz]
retstk          long 0[retsz]
loopstk         long 0[loopsz]


REG0            long 0
REG1            long 0
REG2            long 0
REG3            long 0
REG4            long 0
txticks         long (80_000_000 / baud )       ' set baud rate
txmask          long |<txd

John A. Zoidberg · 2012-11-28 23:49

Peter, have you experimented with the Multiply and Divide instructions? I guessed everyone are curious on these as well.

Peter Jakacki · 2012-11-28 23:52

John A. Zoidberg wrote: »

Peter, have you experimented with the Multiply and Divide instructions? I guessed everyone are curious on these as well.

Hey, this is testing the Terasic P2 PNUT waters at the moment. I'm building my Forth up so I can just talk to it and ask it if I want to

I need to check out the clock modes to make sure I have it set right and then I might check the maths.

jmg · 2012-11-28 23:53

Peter Jakacki wrote: »

I have my very first HELLO WORLD code

It is still not 24 hours from the first 'Yipeee", and many more are 'coming alive', all around the world...

Sapieha · 2012-11-29 00:08

Hi Peter.

Why You place Stack in COG -- If You can use CLUT for that ?

Peter Jakacki wrote: »

I have my very first HELLO WORLD code, it's rough but it's functional. I manually tuned the baudrate and it comes out at 460,800 baud at present, nothing fancy.

CON


baud            = 615_000       ' actually it's 460800  


' Standard Port assignments
_scl             = 28
_sda             = 29
txd             = 90-64
rxd             = 31

' Stack sizes
datsz           = 12            'NOTE: Doesn't need to be deep (nor should it be) - augmented by loop stack and registers
retsz           = 18
loopsz          = 8


DAT
        org

        mov    dirc,txmask
        
MAINLP
        mov    tos,#$0D
        call    #TRANSMIT
        mov    tos,#$0A
        call    #TRANSMIT
        mov    tos,#"H"
        call    #TRANSMIT
        mov    tos,#"E"
        call    #TRANSMIT
        mov    tos,#"L"
        call    #TRANSMIT
        mov    tos,#"L"
        call    #TRANSMIT
        mov    tos,#"O"
        call    #TRANSMIT
        mov    tos,#$20
        call    #TRANSMIT
        mov    tos,#"W"
        call    #TRANSMIT
        mov    tos,#"O"
        call    #TRANSMIT
        mov    tos,#"R"
        call    #TRANSMIT
        mov    tos,#"L"
        call    #TRANSMIT
        mov    tos,#"D"
        call    #TRANSMIT
        mov    tos,#" "
        call    #TRANSMIT
        jmp    #MAINLP

{ ****** CONSOLE SERIAL OUTPUT ******  }
' Transmit the character that is in the tos register
'
TRANSMIT
            or    tos,#$100
            shl    tos,#1
                        mov     R1,#10  ' 8 data bits + 1 start + stop bits
txdat                   getcnt  R0
                        add     R0,txticks
txbit                   shr     tos,#1 wc       ' lsb first
                        muxc    pinc,txmask     ' output bit
                        waitcnt R0,txticks
                        djnz    R1,#txbit       'another bit to transmit?
TRANSMIT_ret            ret
'            jmp     #DROP

'****************** COG VARIABLES *****************
'

IP              long 0  ' Instruction pointer
ACC             long 0  ' Accumulator for inline byte-aligned literals
deltaR          long 0
target          long 0  ' WAITCNT target
R0              long 0
R1              long 0
R2              long 0
X               long 0  'primary internal working registers


tos
datastk         long 0[datsz]
retstk          long 0[retsz]
loopstk         long 0[loopsz]


REG0            long 0
REG1            long 0
REG2            long 0
REG3            long 0
REG4            long 0
txticks         long (80_000_000 / baud )       ' set baud rate
txmask          long |<txd

Propeller II: Emulation of the P2 on FPGA boards (Prop123-A7/A9, DE0-NANO, DE2-115, etc)

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