Propeller GUI touchscreen and full color display

Igor_Rast · 2013-02-28 18:26

ok , I also agree . It does look pretty cool, sexy and slick , 3 propellers.

Just having a hard time justifiing the cost of the 3 props verses the other ic.
think it would not be the cheapest solution ,. but may work indeed pretty nice, with the pcb layout its gonna make a difference for sure. .
this can bu build on a breadbord like Dr_A was sugesting , test it out .
but I still want to make to other board with the counters and stuff. the 12pin bus system sounded great to me , want to strat testing with that one ,
but im also still waiting on that lcd to arrive

so Now I splited it in 3 ,.
1 = adres counter + logic to use 12 pins for the databus . Dual Prop V2 COUNTER.pdf
2 = SRAM that is stackable . (stack on top of the conter board . 5 Banks max ) ( 5 x a PCB )Dual Prop V2 SRAM_STACKABLE.pdf
3 = the propeller board , with 2 propellers ,. 1 for the lcd . the other one to run the wiznet webserver and read some sensors

So hopefully I can easily change things around still.if it works better somehow else.
any strange things noticed in the schematics ? hope this one is coud enough to start prototyping soon
fryday aint gonna be the magic day for me anymore too bad . lcd not here. pcb schematic not ready .

@ Dr_Acula & @ average joe
Realy apriciate your help and opennes. hope we get it all done . think time is all that needed
Thanks again

average joe · 2013-02-28 21:03

If a picture is worth a thousand words...

*edit*
Just finished working on BMP loop. desktop is now about 7 seconds... not 12. here's the new

BMPtoILIformat          ' takes a .bmp 3 byte BBBBBBBB GGGGGGGG RRRRRRRR and converts to 2 byte RRRRRGGG GGGBBBBB
                        ' same as E above but BGR instead of RGB
                        ' pass hubaddr, ramaddr and len
                        ' hubaddr is source location, len is number of pixels
                        ' ramaddr is destination in hub (messy naming) and length is 2/3 of blocklength
                        'call    #get_values ' gets hubaddress, ramaddress and len (ignores ramaddress)
bmploop
                        rdbyte blue,hubaddr                                     '1-2
                        add hubaddr,#1                                          '3
                        shr     blue,#3                 ' blue = 000BBBBB       '4
                        rdbyte green,hubaddr                                    '1-2
                        add hubaddr,#1                                          '3
                        shr     green,#2                ' 00GGGGGG              '4
                        rdbyte red,hubaddr                                      '1-2
                        add hubaddr,#1                                          '1
                        shr     red,#3                  ' 000RRRRR              '2
                        shl     red,#3                  ' RRRRR000              '3
                        mov     ilihigh,green           ' ilihigh = 00GGGGGG    '4
                        shr     ilihigh,#3              ' ilihigh = 00000GGG    '1
                        and     green,#%00000111        ' 00000GGG              '2
                        shl     green,#5                ' GGG00000              '3
                        or      green,blue             ' ililow = GGGBBBBB      '4
                        wrbyte green,ramaddr                                    '1-2
                        add ramaddr,#1                                          '3
                        or      ilihigh,red             ' ilihigh = RRRRRGGG    '4
                        wrbyte ilihigh,ramaddr                                  '1-2
                        add ramaddr,#1                                          '3
                        djnz    len,#bmploop            ' loop until done       '4
                        jmp     #done                   ' set pins to tristate

Here's BMP to RAM. not sure it's much faster than convert-store...

BMPtoRAM                ' takes a .bmp 3 byte BBBBBBBB GGGGGGGG RRRRRRRR and converts to 2 byte RRRRRGGG GGGBBBBB    7 hub windows
                        ' same as E above but BGR instead of RGB
                        ' pass hubaddr, ramaddr and len
                        ' hubaddr is source location, len is number of pixels
                        ' ramaddr is destination in hub (messy naming) and length is 2/3 of blocklength

                        call    #set161and373           ' set up the 161 counter and then change to group 2
                        or      dira,maskP0P15          ' %00000000_00000000_11111111_11111111         ' data bus outputs

:bmploop                rdbyte blue,hubaddr                                     '1-2
                        add hubaddr,#1                                          '3
                        shr     blue,#3                 ' blue = 000BBBBB       '4
                        rdbyte green,hubaddr                                    '1-2
                        add hubaddr,#1                                          '3
                        shr     green,#2                ' 00GGGGGG              '4
                        rdbyte  red,hubaddr                                     '1-2
                        add     hubaddr,#1                                      '3
                        shr     red,#3                  ' 000RRRRR              '4
                        shl     red,#3                  ' RRRRR000              '1
                        mov     ilihigh,green           ' ilihigh = 00GGGGGG    '2
                        shr     ilihigh,#3              ' ilihigh = 00000GGG    '3
                        and     green,#%00000111        ' 00000GGG              '4
                        shl     green,#5                ' GGG00000              '1
                        or      green,blue             ' ililow = GGGBBBBB      '2
                        or      ilihigh,red             ' ilihigh = RRRRRGGG    '3
                        shl     ilihigh, #8                                     '4
                        mov     data_16, green                                  '1
                        or      data_16, ilihigh                                '2
:hubtoram_loop          andn    outa,maskP0P15          '%11111111_11111111_00000000_00000000       ' clear for output  3                 
                        or      outa,data_16            ' send out the byte to P0-P15                     4
                        andn    outa,maskP17P20         ' set mem write low                               1
                        or      outa,maskP17            ' mem write high                                  2
                        or      outa,maskP20            ' clock 161 high                                  3
                        djnz    len,#:bmploop           ' loop until done                                 4
                        jmp     #done                   ' tristate pins and listen for command

average joe · 2013-03-02 00:35

Seems calibrating the touch on the new displays is going to be more complex. I think there's a small rotational error that needs to be compensated for now. Looks like a job for C... So I guess I'll give it another go...

@Igor.
I've been working with the FLASH drive and noticed one huge mistake. I'm using P16 for clock.... I THINK if I had wired up to P20 *or count* DMA from ram to flash and flash to ram would be possible. Something to think about. Now I must build a new one!

Igor_Rast · 2013-03-02 07:07

@joe .
The spi flash drive . totaly forgot about it when making the scematic with the Dr_A 12 pin counter system .
the groups were no longer there/exhausted .So I added them back to the couter pcb. Just not sure if it will work wired that way .or it will interfear with other things going on
But it does give me back groups . cause I need the group 3 for the Prop 2 prop communication
and the group 4 would be the SPI_FLASH . forsee any problems with this shematic ??

1
Stackable SRAM PCB Dual Prop V2 SRAM_STACKABLE.pdf
SRAM on a pcb , with a jumper socket to select wich bank the SRAM is suppose to be . Easy stacking
these are going to get stacked ontop of the counter pcb (going to make 5 x this pcb to get 5 SRAM banks stacked )

2
the SPI_Flash Dual Prop V2 SPI.pdf
I changed the pin 16 to pin 20. But here is where I realized the groups were not there anymore. So im not sure if its connected inappropriate

the large jumper header is so I can connect it on top of the input header of the counter pcb. ( detachable )

3
Dual Prop V2 COUNTER.pdf
The counter schematic wich I hope is wired ok now , so I can start the layout of the pcb , to go build the pcb this monday.
LCD still not here

4
(have to finish the schematic still )
pcb thats going to have the 2 propellers (1 for LCD + 1 for Wiznet and other sensors), and logic to communicate to each other with the 8 pin system , Hope it stil wired correctly . (group3 right ?)

Those logic analyzer images sure looks like allot is happening there , cant wait to start the coding myself .

average joe · 2013-03-02 15:01

@ Igor. I work tonight so not much time to digest the schematics. Should have time tomorrow.
What I was trying to demonstrate with the LA screenshots is how the pins are being used. These were taken from one capture, loading the desktop on large display. Although the first capture look like the pins are very busy, if you look closely you can see they are only used for small bursts of time. Reading 20 words only takes about 12us. Writing 20 words takes slightly over 15us. *I think writing can be optimized to take the same time as read, I'll work on that soon!* Writing 480 words takes about .3ms. Draw in spin takes over 3ms *needs to be ported to PASM, soon..* Then the interesting one.. A fullscreen draw directly from ram takes about 60ms... This gives a max fullscreen refresh rate of 16fps... Something to think about.. Smaller resolution displays will have much better refresh rate..

Now, in theory... A cache read of 128 longs *I think this is the standard cache page size* would take about 160us. If we needed to write the current cache page, it should take about 200us. This means a write-read should take about 360us... I think... now if we were displaying 16fps.... and had to write-read the cache, we could do 1 write-read per second and never break into the 16fps... of course this is just theory, I could be wrong.

*edit
Getting close to a new release of touch.spin. The newest optimization is hub2ram. The loop is now the same number of instruction cycles as ram2hum. *8*

' command S
pasmhubtoram            call    #set161and373           ' set up the 161 counter and then change to group 
                        or      dira,maskP0P15          ' %00000000_00000000_11111111_11111111         ' data bus outputs
                        
hubtoram_loop           andn    outa,maskP0P15          '%11111111_11111111_00000000_00000000       ' clear 4  for output                   
                        rdword  data_16,hubaddr         ' get the word from hub                            1-2
                        or      outa,data_16            ' send out the byte to P0-P15                       3
                        andn    outa,maskP17P20         ' set mem write low                                 4
                        add     hubaddr,#2              ' increment by 2 bytes = 1 word. Put this here for  1 small delay while writes   
                        or      outa,maskP17P20         ' mem write high                                    2
                        'andn    outa,maskP20            ' clock 161 low                               3
                        'or      outa,maskP20            ' clock 161 high                              4
                        djnz    len,#hubtoram_loop      ' loop this many times                              3
                        jmp     #done

*edit*
I've been working on bringing the drivers for all three screens together. I'm close, but it's not perfect. The 7" touch calibration does not exist quite yet...
Just wanted to share a handy program I just wrote for the desktop. It allows you to eject the SD card from desktop, while the system is running. Makes updating the SD card much easier *for testing*

CON
  _clkmode      = xtal1 + pll16x                        ' use crystal x 16
  _xinfreq      = 5_000_000
   
OBJ
  tch:           "Touch_v1_0_1963d"                                 ' touchscreen driver

PUB Main | touchtest  ' debug value
  tch.BeginProgram
  Eject
  tch.SetWarmBoot                                           ' clears screen, sets a warm boot and reboots
  reboot
  
PUB Eject | d
  tch.text(string("ejecting card"))
   
  if d:= tch.EjectSD
    tch.text(string("there was an error"))
  else
     tch.text(string("you may remove the SD card"))
     tch.text(string("touch anywhere to continue"))

  tch.TouchXPercent      
  repeat
    d:= tch.TouchYPercent
  while d == 0 or d == 255

Igor_Rast · 2013-03-05 13:48

Ok , So I have the 4.3 inch LCD at last .
Now its up to the schematic to be ok, then etch the pcb´s
order the ic needed and hopefully by the weekend I can join the party coding

isnt a googl code reprository an good idea to get all the codes used together so fixes and updates are easaly seen ?

Mabe handy to understand all the changing in the code ,frequently cant realy understand the hole thing yet.working on that part still

average joe · 2013-03-06 00:47

Google Code is a good idea. Just have not gotten around to it...

The parts of code that have been changing are mostly low-level stuffs. The touch.spin driver needs quite a bit of commenting. I started on this task and never had time to complete. I'm currently trying to re-join all the different versions and optimizations I've collected along the way. The 3.2" display is fully tested, now I need to test the 7"

I'd recommend reading through the datasheet for your LCD and controller. The ebay merchandiser should have all that information available and it is VERY helpful, even if you don't understand it all right away. From the brief glance at the schematic, it looks like removing a resistor and filling the solder jumper will enable you to have dynamic backlight... If I were you, I'd look into that

I'll check the schematics in a bit, sorry I've been super-busy!

*edit*
I think those schematics should work. I did my best, there may be errors. Dr.A should be able to confirm. I take it he's already played with the 12 pin bus.

Igor_Rast · 2013-03-07 15:29

average joe wrote: »

Google Code is a good idea. Just have not gotten around to it...

The parts of code that have been changing are mostly low-level stuffs. The touch.spin driver needs quite a bit of commenting. I started on this task and never had time to complete. I'm currently trying to re-join all the different versions and optimizations I've collected along the way. The 3.2" display is fully tested, now I need to test the 7"

the google code sould be pretty easy , anyway
Mind linking me to the latest drivers that are available to get the LCD working , ?

I have contacted the vendor of the lcd for the datasheet, havent recived a reply yet for the datasheet, the schematic is indeed verry handy i figured . coulded find it online
. the SSD1963 datasheet is indeed a bit chinees still.
Didnt get the time to get to that still. allot to do :frown:.

Thanks for thaking a look at my schematic , an I absolutley uderstand if your bussy ,
eventualy we all try to do the impossible in the impossible time window , sow time will always be a scars thing

average joe wrote: »

From the brief glance at the schematic, it looks like removing a resistor and filling the solder jumper will enable you to have dynamic backlight... If I were you, I'd look into that

That is something i deffinitly want to be able to control , yes

mind telling me wich ( a resistor ) you mean , and what schematic you were looking at ? , mine ?

Still got to finish the layout for the pcb,s to get them made , Time like you said again not realy at my side

@Dr_A

Did you already make this 12 pin system work, or are you still waiting to be able to build the schematic ?
would you be so kind to share the driver to drive it
Mind giving my counter schematic with the 12 pin bus a look >?. so I be sure that when i finish layout i can etch the bord without mistakes that we know of now

Thanks

shimniok · 2013-03-07 15:32

I use Google Code for everything.I use SVN so I like RabbitVCS (Linux) or TurtleSVN which makes hte whole SVN thing much less painful. There's github which I've not used, but is hugely popular and probably painless too.

I've been lurking on the thread for a long time, fascinated by the development. Truly amazing work!

Dr_Acula · 2013-03-07 19:12

@Dr_A

Did you already make this 12 pin system work, or are you still waiting to be able to build the schematic ?
would you be so kind to share the driver to drive it
Mind giving my counter schematic with the 12 pin bus a look >?. so I be sure that when i finish layout i can etch the bord without mistakes that we know of now

No sorry, no spare time at the moment so no there isn't a driver. In general terms, to write such a driver, write it in spin first, then translate the spin into pasm. I may not be able to do it though, sorry.

average joe · 2013-03-08 03:23

@Igor:
I had schematic and datasheets from the supplier of your display, but it appears I have deleted them from my email without saving a copy. My notes state: Remove *R4* and solder a bridge on J1-CON2, might want to double check with a multimeter.

Dr.A is correct about starting in spin. My current version has a bug that I've been unable to trace for the moment. I have the 3.2" working correctly, but the 7" is displaying incorrectly right now *and this is the display controller for your display* I believe the last stable release is here http://forums.parallax.com/showthread.php/137266-Propeller-GUI-touchscreen-and-full-color-display?p=1165091&viewfull=1#post1165091

You will need to make quite a few changes. The first ones to tackle are getting the display working:

PRI Displaycmd(c,d) ' instruction in one method
    Lcd_Write_Com(c) ' send out a word
    Lcd_Write_Data(d)

PRI Lcd_Write_Com(LCDlong)
    LCD_RS_low                               ' can do rs first then cs - better for latch board
    'LCD_CS_Low                               ' not needed for the ILI9325 but the SSD1289 needs this
    LCD_Writ_Bus(LCDlong)
    'LCD_CS_High                              ' not needed for the ILI9325 but the SSD1289 needs this
 
PRI Lcd_Write_Data(LCDlong)
    LCD_RS_High                              ' can do rs first then cs
    'LCD_CS_Low                               ' not needed for the ILI9325 but the SSD1289 needs this  
    LCD_Writ_Bus(LCDlong)
    'LCD_CS_High                              ' not needed for the ILI9325 but the SSD1289 needs this

PRI Lcd_Write_Fast_Data(LCDlong)            ' write RS elsewhere then skip the RS above as this is a latch output and takes longer
    'LCD_CS__Low                               ' not needed for the ILI9325 but the SSD1289 needs this  
    LCD_Writ_Bus(LCDlong)
    'LCD_CS_High                              ' not needed for the ILI9325 but the SSD1289 needs this 

PRI LCD_Writ_Bus(LCDLong)
    'LCDLong &= %00000000_00000000_11111111_11111111    ' mask to a word. Not needed if care taken always to send a word value
    OUTA &= %11111111_11111111_00000000_00000000        ' set P0-P15 to zero ready to OR
    OUTA |= LCDLong                                     ' merge with the word to output
    LCD_WR_CS_Low                                          ' send out the data
    LCD_WR_CS_High

PRI LCD_WR_CS_Low
   OUTA &= %11111111_11110011_11111111_11111111         ' p18 low

PRI LCD_WR_CS_High
   OUTA |= %00000000_00001100_00000000_00000000         ' p18 high


PRI LCD_WR_High
   OUTA |= %00000000_00000100_00000000_00000000         ' p18 high


PRI LCD_CS_High                                         
   OUTA |= %00000000_00001000_00000000_00000000         ' p19 high  

PRI LCD_RESET_Low                                       ' reset low
   RAM.Latch_ResetLow

PRI LCD_RESET_High
   RAM.Latch_ResetHigh

PRI LCD_RS_Low                                          ' for historical reasons this subroutine calls another
   RAM.Latch_RS_Low

PRI LCD_RS_High
   RAM.Latch_RS_High      


{
PRI LCD_CS_Low
   OUTA &= %11111111_11110111_11111111_11111111         ' p19 low    
}
{
PRI LCD_WR_Low
   OUTA &= %11111111_11111011_11111111_11111111         ' p18 low
}

I'm toggling /WR and /CS at the same time. The SSD1963 seems to like this best. Write bus will probably be the biggest change.
After you figure this out, then it's on to the memory bus. Write these in SPIN and I can help port to ASM when working:

PRI SpinHubToRam(hubaddress, ramaddress, number)        ' move data from hub to ram
   RAM.CogCmd("S",hubaddress,ramaddress,number)             ' pasm block move

PRI SpinRamToHub(hubaddress,ramaddress,number)          ' move data from ram to hub
   RAM.CogCmd("T",hubaddress,ramaddress,number)             ' pasm block move   

PRI SpinRamToDisplay(ramaddress,number)                 ' ramaddress, number of words (pixels)
   RAM.CogCmd("U",0,ramaddress,number)                      ' pasm alternative to code below, much faster

PRI SpinHubToDisplay(hubaddress,number)|i
   RAM.CogCmd("V",hubaddress,0,number)                      ' pasm version of code below

In fact, the whole RAM cog will need to be changed. All these commands are part of Touch.Spin TbASM_1963 contains the low-level memory functions that will need to be re-written.

PUB LatchGroup4
    CogCmd("D",%00001111,%11110111,0)                            ' set all group pins high

PUB LatchGroup4High
    CogCmd("D",%00001111,%11111111,0)                            ' set all group pins high    

PUB Latch_DisplayL               ' display on the left
    CogCmd("D",%01001111,%11011101,0)                            ' set all group pins high

PUB Latch_DisplayR              ' display on the right
    CogCmd("D",%00101111,%10111101,0)                            ' set all group pins high

PUB Latch_DisplayB              ' both displays  for debugging
    CogCmd("D",%00001111,%10011101,0)                            ' set all group pins high
   
PUB LatchGroup1
    CogCmd("D",%00001111,%11111110,0)                            ' set all group pins high

PUB LatchGroup2
    CogCmd("D",%00001111,%11111101,0)                            ' set all group pins high
 
PUB LatchGroup3
    CogCmd("D",%00001111,%11111011,0)                            ' set all group pins high

PUB Latch_ResetLow
    CogCmd("A",%11101111,0,0)                           'set this one low    

PUB Latch_ResetHigh
    CogCmd("O",%00010000,0,0)          ' set this pin high
            
PUB Latch_RS_Low
    CogCmd("A",%01111111,0,0)                            'set this one low    

PUB Latch_RS_High
    CogCmd("O",%10000000,0,0)          ' set this pin high 

''
''
'' ************ RAM cog driver ***************
PUB start : err_
' Initialise the Drac Ram driver. No actual changes to ram as the read/write routines handle this
  command := "I"
  cog := 1 + cognew(@tbp2_start, @command)
  if cog == 0
    err_ := $FF                 ' error = no cog
  else
    repeat while command        ' driver cog sets =0 when done
    err_ := errx                ' driver cog sets =0 if no error, else xx = error code

PUB stop
   if cog
      cogstop(cog~ - 1)      

PUB CogCmd(command_, hub_address, ram_address, block_length) : err_| a,b
' Do the command: A-Z (I is reserved for Initialise)
  'dira := 0                     ' tristate all pins with the spin dira
  a := dira                     ' store the state of these and restore at the end 
'  b := outa
  DIRA &= %11111111_11100000_00000000_00000000 ' tristate all common pins that cog can change so no conflicts
  hubaddrs := hub_address       ' hub address start
  ramaddrs := ram_address       ' ram address start
  blocklen := block_length      ' block length
  command  := command_          ' must be last !!
' Wait for command to complete and get status
  repeat while command          ' driver cog sets =0 when done
  err_ := errx                  ' driver cog sets =0 if no error, else xx = error code
  dira := a                     ' restore dira and outa
'  outa := b

CON
'' Modified code from Cluso's triblade
'' commands to move blocks of data to the ILI9325 touchscreen display
' DoCmd(command_, hub_address, ram_address, block_length)
' I - initialise     
' S - Move data from hub to ram
' T - Move data from ram to hub
' U - Move data from ram to display
' V - Hub to display
' E - convert from .raw RGB to two byte ILI format RRRRRGGG_GGG_BBBBB
' F - convert from .bmp BGR format to two byte ILI format
' X - merge icon and background based on a mask
' Z - Set 161 pins. Returns in group 1
' O - logic Or with latchvalue
' A - logic And with latchvalue

' D  -logic Or hubaddrs with latchvalue logic And ramaddrs with latchvalue 


VAR

' communication params(5) between cog driver code - only "command" and "errx" are modified by the driver
   long  command, hubaddrs, ramaddrs, blocklen, errx, cog ' rendezvous between spin and assembly (can be used cog to cog)
'        command  = A to Z etc =0 when operation completed by cog
'        hubaddrs = hub address for data buffer
'        ramaddrs = ram address for data
'        blocklen = ram buffer length for data transfer
'        errx     = returns =0 (false=good), else <>0 (true & error code)
'        cog      = cog no of driver (set by spin start routine

The rest is in PASM, fairly well documented. It does not have all the recent optimizations. I'll release that now. *the Touch.Spin is the broken part. there's also no SSD1963 draw in PASM.*
I am removing commands A and O in favor of D.

I've been meaning to abstract the display commands, as I have the RAM commands. Just have not started that yet.

I have a midterm on Monday so no time to code until that's over. Then Spring break.. GL

PS... hold off on worrying about the FLASH... I have some things that need to be tested before any postulations can be made..

Igor_Rast · 2013-03-10 07:49

@ Average Joe & Dr_A

Thanks allot for the explinations , codes and the efforts . do appriciate it allot .
I guess ill have to build my own driver then. Starting in SPIN, wich I understand fairly like you guys mentiond. the ASM is going to take some time , one step at a time

I am super bussy myself these days ,So dont need to excuse the time not beeing at your side , Kinda the problem we all have

But hopefully this week ill have my pcbs etched , and the parts orderd So I can start the coding at least by fryday for sure

Its going to be FUNNN

Ill post some pictures as soon as I have the boards assembled

Igor

EDIT

A Question !

About the choosing between the banks of SRAM .

in Dr_a 12-pin system , we can load only 1 ram at a time (first bank probably), or both SRAM of a bank at the same time Because each of the SRAM , has its own 245 transiever to serve it its data

at the other end
the 245 transievers get there data 1 before the other , because they use the same adres pins.so simultaiuns loading to the 245 is not possible .
loading both SRAM of a bank is possible because they have seperate transievers , and the banks can be wired so both SRAM of 1 bank is active at a time .

Why not use only both SRAM at a time . whats the cath at using only one of the SRAM of a bank at a time (first bank)??? Do we realy need the seperate banks ?

Wich brings me to the next question ..

We now have a 138 demux that choses wich of the stacked memory banks are active .
in my schematic i have OR ed the /CS_RAM_LOW and the /CS_RAM_HIGH together , to activate the demux that chooses banks
/CS_RAM_LOW and /CS_RAM_HIGH are used to activate only one bank , If I OR them together to toggle the 138 , then <I assume the demux wil always be active regardles .

if we would want to set the data to only the first SRAM (/CS_RAM_LOW) it would still . toggle the bank that is connected to output 0 of the demux because A19 and A20 are 0 selecting it
activating Bank 0 and also the single SRAM connted to CS_RAM_LOW. Not what we want happening.

So I think somthing got to change here , just not sure how

option 1

Forget about the hole High and Low selecting ( if we dont realy need it ) , and only go with selecting both SRAM of a banks at a time. ( remove the OR gate and wire it directly ) . Or is this an extra pin to control it ?
but then we wil have only 4 bank, because A2 is wired high , Or we will need an extra pin to control it , so we can use 8 banks . A21- P21 i think is not going to work because of de SD_select . or am I wrong ? Could use the Groups pins, Probably only using 1 group for the prop 2 prop communication so the rest is still free. Not sure if that will work

Or

Option 2

Leave the High Low SRAM selecting intact , But just dont use the first output of the demux ,
and I would need some other ping (maybe a group pin ) to activate the demux , leaving the /CS_RAM_LOW and /CS_RAM_HIGH only for the first bank.

Hope my explination is understandable , And I can get some good advice to fix it before its too late and ill be cutting my pcb again . Thanks

Dual Prop V2 COUNTER.pdf

edit:update

in the datasheet of the SSD1963

7.1.3
Register Pin Mapping
When user access the registers via the parallel MCU interface, only D[7:0] will be used regardless the width
of the pixel data is. Therefore, D[23:8] will only be used to address the display data only.

So I already kinda found out why it would be handy to be able to use just one SRAM at a time. Just starting to dig in here

Bank SRAM (16bit ) = pixel data
single SRAM(8bit) = commands and settings

Dr_Acula · 2013-03-10 16:40

Why not use only both SRAM at a time . whats the cath at using only one of the SRAM of a bank at a time (first bank)??? Do we realy need the seperate banks ?

The way the displays work, the fastest way to get a picture from ram to the display is with a 16 bit wide bus. So the starting point for any schematic is to have 16 pins connecting a ram chip to the memory. Then to move the data, just toggle the write pin.

Then add the propeller. Which is different to most circuits where you would probably start with the propeller and then add peripherals.

Moving data from the propeller to the ram chip does not need to be as fast, because ultimately the data comes from am SD card, which is one bit at a time. So even an 8 bit bus to the ram chips is still much faster than the SD clock speed.

The idea with the 12 pin schematic is to save some propeller pins, and in particular, to save 4 pins so that an external serial ram chip can be added for C programs. IMHO I think it is simpler to have the parallel ram and C cache ram separate, rather than using the same ram and having locks.

I am sure there are other clever schematics we can build.

Igor_Rast · 2013-03-10 17:11

Thanks again for the explination , I do understand the system and why now .
Just started to realy dig in the schematics and datasheet. to understand how it is controled

o , I got the link for the 4,3 schematic , Maybe somebody needs it ( schematic of the 4,3 inch display module included). 4_3TFT_JINGYAO.rar

@joe , I think your instructions about removing the resistor were right
think ill leave it to start with getting the display showing something , after that ill go for the dynamic backlight . Sweeett. Looks like it can also set itself to a lower resolution if noting happening ( screensaver) . hihi , gotta have that too

@Dr_A
About the separete memorieś . All I can say at this point in time that I also belive the concept that it will work better , thats why I want the 12pin system to work , So the C could be added later , (ill keep the pins on a header free ). But why exactly , To be honest I aint got a clue , But thats for later worries , havent done C in about 6 years. dont need jpeg for now

Ill be going for the slow start to realy understand it , making the display , turn on /initilaize . beeing number 1 ting now. so got to understand it fist. then start with the spin driver .

Ill try not to ask too many (stupid)questions

Edit .

Attachment not found.

average joe · 2013-03-14 00:01

I don't think that 373/138 is going to work like you mean it to. I wish I could help more with the 12-pin design, but don't have time to support it at the moment. I decided early on the optimum design for my uses and I'm getting close! I think in a few months I should have some programs to demo. Just need to get touch-calibration on the 7" display working.

I'm taking the next week to work on another project so will be busy with that. Just though I'd drop an EARLY alpha build of the latest driver. This has support for all 3 displays built into one. PASM is taking shape, although I broke something in the latest PASM driver, so had to roll-back to previous version. Not fully tested, so there may be a few bugs still.

Igor_Rast · 2013-03-14 03:41

Ammm. O thats not good. I just see that I have used 2 diffent schematics in the last post .
Now I dont know which of the 373/138 schematic you think wont work .

Here the last one ,mind taking a verry small look if its that one you mean or the schematic attached in the picture ??

Thanks for the code , i Wil be making my boards these days , hopefully I can start with some coding by the weekend .

Dual Prop V2 COUNTER.pdf

Did you change from the last working schematic ? you were talking about doing a few mods.
not sure wich scematic your using now with your code , so I can understand the hole thing

Thanks

average joe · 2013-03-14 05:01

Sorry, I was in a hurry when posting. I'm referring to U8 - U10 from last post. The problem is memory bank will change with group selection! OH NO.. I would recommend getting 1 bank working. Then figure out where to hook that up. I'm thinking it will be quite difficult otherwise... And I seriously doubt you will need more than 2Mb for your display...

I'm using the XMM board, *or stacked ram* No other mods are done yet...
Gotta run

Igor_Rast · 2013-03-16 04:41

FOTO Update

So after not knowing anymore how the SRAM bank are going to be selected , I decided to take Dr_A advice anyway
Get some DIP components and build the schematic on a breadbord

Spent the hole day yesterdat wiring . Just to get to the propeller and to realize that some pins were broken off , So the last propeller chip I had was solderd to a pcb . more work to breakout the prop to solder to a third board.

Looks like the its working , DIdnt see any blue some yet .

So now the coding party is going to start

Dr_Acula · 2013-03-16 05:22

Looking good! And a great idea putting in diagnostic leds. Let us know if any problems with the code.

Igor_Rast · 2013-03-17 16:34

@Dr_A Thanks , Those leds are more than needey.
about the only way I can think off to realy understand all thats going on .

So In my effort to start with it in spin . I am stubeling on my first questions

I managed to build a spin driver for the counter , This sets the counter adress a0..a18 at the SRAM . and after that toggle away to increase it
I figured out , I had to load the last couter a16..19 first and work my way to the LSB , or it would increase the count when its beeing set

this code seems to work fine now . 1 thing LOad . P8 is puled high in schematic but should be pulled low . so all output high

CON                                              
  _clkmode      = xtal1 + pll16x                        ' use crystal x 16
  _xinfreq      = 5_000_000        

CON

    load_pin = 8
    clock_pin = 9 

PUB Main
    dira[0..9]~~ 

    waitcnt(clkfreq + cnt)
    SetCounter (0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0)        
    
    repeat 
      !outa[clock_pin]
      waitcnt(clkfreq/2000 + cnt)
    
     
PUB SetCounter (a19,a18,a17,a16,a15,a14,a13,a12,a11,a10,a9,a8,a7,  a6,a5,a4,a3,a2,a1,a0)    
 
    set161 (0,0,1,a16,a17,a18,a19)
    set161 (1,1,0,a12,a13,a14,a15)
    set161 (0,1,0,a8,a9,a10,a11)
    set161 (1,0,0,a4,a5,a6,a7)
    set161 (0,0,0,a0,a1,a2,a3)                
     
PUB set161 (a0,a1,a2,d0,d1,d2,d3)  
  
    Selector138 (a0,a1,a2)
    outa[load_pin]~~    

    CounterA (d0,d1,d2,d3) 
    outa[clock_pin]~
    outa[clock_pin]~~
    outa[load_pin]~   

PUB CounterA (a,b,c,d)
    outa[0]:= a    
    outa[1]:= b
    outa[2]:= c                        
    outa[3]:= d             
        
PUB Selector138 (e,f,g)
    outa[4]:= e    
    outa[5]:= f
    outa[6]:= g

DEMO

After this , Next stop HUB2BUS +BUS TO RAM to get data inside the

the first part getting 1byte from HUB into the BUS 245 and putting it at the output . seems to be going fine
but getting them in the SRAM seems tricky .

UpperHUB2RAM_ACTIVE or LowerHUB2RAM_ACTIVE takes the CE input low Of the SRAM .
and a toggle of the RW low to high should get the data inside .
we can only load 1 of the SRAM at a time because of the 245BUS cant hold to the data (p0..p7).
So the best way I think Is to put all data on 1 SRAM first , and them go for the second SRAM .

TO access them , its no problem to get all 16 bits at a time .

but somethings funny . Iff i put data , clock it in ram then toggle to the next adres . So first 0000000000000000000 then 0000000000000000001
then I seem to have the same data from the first adress , on the second adress too , and the second adress gets skipped .

Iff i toggle it twice (2x)
So first 0000000000000000000 then 2x toggel to 0000000000000000010 . then it does save it all ok .
But it then seems to mee that Im not using half the space right ??

do we need to count 2 adresses before we put the next 8 bits of data on SRAM ??. 1 count should do it right ?? cant find what im doing wrong here ..

So I made 2 video about that .

at the right 2 banks of 8 leds , to see the 245 getting data
after getting the data and passing it to the ram , we let the ram , put it back on the bus in 16ibt mode .

the leds to the left are the counter ,. (running out of leds

)

CON                                              
  _clkmode      = xtal1 + pll16x                        ' use crystal x 16
  _xinfreq      = 5_000_000        

CON

    load_pin = 8
    clock_pin = 9 
    RD_pin = 10
    WR_pin = 11
    

PUB Main
    dira[0..11]~~     
    outa[RD_pin]~~   
    outa[WR_pin]~~
    
    
    set245allhigh
    
    UpperHUB2RAM_ACTIVE            {data8..data15}
    waitcnt(clkfreq + cnt)    
    SetCounter (0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0)                        
    trowdata2RAM                       
    waitcnt(clkfreq*3 + cnt)  
    
    LowerHUB2RAM_ACTIVE              {data0..data7}
    waitcnt(clkfreq + cnt)        
    SetCounter (0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0)   
    trowdata2RAM
    waitcnt(clkfreq *3+ cnt)   
       
     
    SetCounter (0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0)  
    RAM2LCD_ACTIVE               {both ram active }     
 
 repeat 8 
     outa[RD_pin]~
     waitcnt(clkfreq + cnt)
      repeat 1 
        outa[clock_pin]~
        outa[clock_pin]~~
  
   
PUB trowdata2RAM    {demo  to see the data get stored in ram}    

    Hub8bit (1,1,1,1,1,1,1,1)     { 8 bits a data }
    outa[WR_pin]~
    waitcnt(clkfreq + cnt)
    outa[WR_pin]~~
  repeat  1
    outa[clock_pin]~
    outa[clock_pin]~~
    

    Hub8bit (0,0,0,0,0,0,0,1)    { 8 bits a data }
    outa[WR_pin]~
    waitcnt(clkfreq + cnt)
    outa[WR_pin]~~
  repeat 1
    outa[clock_pin]~
    outa[clock_pin]~~
    

    Hub8bit (0,0,0,0,0,0,1,0)  { 8 bits a data }
    waitcnt(clkfreq + cnt)
    outa[WR_pin]~
    outa[WR_pin]~~
  repeat 1
    outa[clock_pin]~
    outa[clock_pin]~~
    
    
    Hub8bit (0,0,0,0,0,1,0,0)  { 8 bits a data }
    outa[WR_pin]~
    waitcnt(clkfreq + cnt)
    outa[WR_pin]~~
  repeat 1
    outa[clock_pin]~
    outa[clock_pin]~~      
      
    
    Hub8bit (0,0,0,0,1,0,0,0)  { 8 bits a data }
    outa[WR_pin]~
    waitcnt(clkfreq + cnt)
    outa[WR_pin]~~
  repeat 1
    outa[clock_pin]~
    outa[clock_pin]~~
    
    
    Hub8bit (0,0,0,1,0,0,0,0)  { 8 bits a data }   
    outa[WR_pin]~
    waitcnt(clkfreq + cnt)
    outa[WR_pin]~~
  repeat 1
    outa[clock_pin]~
    outa[clock_pin]~~
    
       
    Hub8bit (0,0,1,0,0,0,0,0)  { 8 bits a data }
    outa[WR_pin]~
    waitcnt(clkfreq + cnt)
    outa[WR_pin]~~
  repeat 1
    outa[clock_pin]~
    outa[clock_pin]~~
    

    Hub8bit (0,1,0,0,0,0,0,0)  { 8 bits a data }
    outa[WR_pin]~
    waitcnt(clkfreq + cnt)
    outa[WR_pin]~~
  repeat 1
    outa[clock_pin]~
    outa[clock_pin]~~
    
   
    Hub8bit (1,0,0,0,0,0,0,0)   { 8 bits a data }
    outa[WR_pin]~
    waitcnt(clkfreq + cnt)
    outa[WR_pin]~~
  repeat 1
    outa[clock_pin]~
    outa[clock_pin]~~
    waitcnt(clkfreq/4 + cnt) 
    
PUB UpperHUB2RAM_ACTIVE   {set 245L (D0..D7)  LOW }
    
    Hub4bit (1,0,1,0)
    Selector138 (0,1,1)
    outa[load_pin]~~
    outa[load_pin]~
    
PUB LowerHUB2RAM_ACTIVE   {set 245H (D08..D15)  LOW }
  
    Hub4bit (0,1,0,1)
    Selector138 (0,1,1)
    outa[load_pin]~~
    outa[load_pin]~           

PUB UpperRAM2LCD_ACTIVE   {8Bit Mode }
    
    Hub4bit (1,0,1,1)
    Selector138 (0,1,1)
    outa[load_pin]~~
    outa[load_pin]~
    
PUB LowerRAM2LCD_ACTIVE   {8Bit Mode }
  
    Hub4bit (0,1,1,1)
    Selector138 (0,1,1)
    outa[load_pin]~~
    outa[load_pin]~       
    
PUB RAM2LCD_ACTIVE   {16Bit Mode}
  
    Hub4bit (0,0,1,1)
    Selector138 (0,1,1)
    outa[load_pin]~~
    outa[load_pin]~         
    
PUB set245allhigh   {set 245H (D08..D15)  LOW }
  
    Hub4bit (1,1,1,1)
    Selector138 (0,1,1)
    outa[load_pin]~~
    outa[load_pin]~

Ill go 1 step at a time with the code , couse im a bit far from understanding exactly what is going on in the code , espesialy essembly . But thaks allot Joe for it , ill start with that I know for sure , after that ill try to get it working wiith yours somehow (hopefully

)

Leds to the left 4x a0..A3 of the couters
Video 1 . Counter counting 1 time after echa byte of data get stored . get doble data , and the second one gets skiped orso

Video 2 . Counter counting 2 times after echa byte of data get stored . all works fine this way . But I think im missing half my memory ?

average joe · 2013-03-18 03:27

@Igor,
Still hectic around here so not much time for reply. Glad to hear you're making progress. RE setcounter / load161. Right now you're addressing bits individually. Later on, when in PASM it will need to be decimal or hex. IE *set161(245) or setcounter($FF) *

RE: loading SRAM. I would interleave SRAM transfers, although it would be up to you to decide which SRAM to transfer to first. I would start with LSB, then MSB. Remember, when SRAM to display, display will be expecting 16 bits defining each pixel, in one transfer...

Not sure where the aliasing issue is coming from. I'll need more time to analyze.

ALSO.. on schematic...
U2 *138* load needs to go P4 or P5, active low. That's why you think load needs pulled low.
For U10, /LOAD AND P22 goes to LE..P22 to OE.. Connections backwards. 373 could be 374. Functionally equivilant, but there's something about using a `374 that reminds me it latches on a TRANSITION..
CNT5 - Q3 selects /CS_RAM_LOW or HIGH. I drive "a" on 138, *P1* Then E2 is /CS. It gets more complex since you need to access 1 chip at a time. I'll think about this one...

*edit*
I think I have a solution in mind, need to draw up schematic... Do you have 74hc137?

I'll keep looking and see what I find. These should help. *good thing bread-boarding*

*EDIT*
First bit of code, this is how I would start it..

PUB SetCounter (address)    

    repeat i from 4 to 0        
      Selector138 (i)
      outa[load_pin]~~    

      outa[3..0]:= address >> (4 * i) 
      outa[clock_pin]~
      outa[clock_pin]~~

    outa[load_pin]~
      
PUB Selector138 (load_n)
    outa[6..4]:= load_n

'also... I like to pre-set pins when possible before making outputs

PUB Main
    outa[RD_pin]~~   
    outa[WR_pin]~~
    dira[11..0]~~     ' range is always from high to low

Second bit of code, still messy.

CON                                              
  _clkmode      = xtal1 + pll16x                        ' use crystal x 16
  _xinfreq      = 5_000_000        

CON

    load_pin = 8
    clock_pin = 9 
    RD_pin = 10
    WR_pin = 11
    

PUB Main
    dira[0..11]~~     
    outa[RD_pin]~~   
    outa[WR_pin]~~
    
    
    set245allhigh
    
    UpperHUB2RAM_ACTIVE            {data8..data15}
    waitcnt(clkfreq + cnt)    
    SetCounter (0)                        
    trowdata2RAM                       
    waitcnt(clkfreq*3 + cnt)  
    
    LowerHUB2RAM_ACTIVE              {data0..data7}
    waitcnt(clkfreq + cnt)        
    SetCounter (0)   
    trowdata2RAM
    waitcnt(clkfreq *3+ cnt)   
       
     
    SetCounter (0)  
    RAM2LCD_ACTIVE               {both ram active }     
 
 repeat 8 
     outa[RD_pin]~
     waitcnt(clkfreq + cnt)
      repeat 1 
        outa[clock_pin]~
        outa[clock_pin]~~
  
   
PUB trowdata2RAM    {demo  to see the data get stored in ram}    

    Bus8bit ($FF)     { 8 bits a data }
    outa[WR_pin]~
    waitcnt(clkfreq + cnt)
    outa[WR_pin]~~
  repeat  1
    outa[clock_pin]~
    outa[clock_pin]~~
    

    Bus8bit ($80)    { 8 bits a data }
    outa[WR_pin]~
    waitcnt(clkfreq + cnt)
    outa[WR_pin]~~
  repeat 1
    outa[clock_pin]~
    outa[clock_pin]~~
    

    Bus8bit ($40)  { 8 bits a data }
    waitcnt(clkfreq + cnt)
    outa[WR_pin]~
    outa[WR_pin]~~
  repeat 1
    outa[clock_pin]~
    outa[clock_pin]~~
    
    
    Bus8bit ($20)  { 8 bits a data }
    outa[WR_pin]~
    waitcnt(clkfreq + cnt)
    outa[WR_pin]~~
  repeat 1
    outa[clock_pin]~
    outa[clock_pin]~~      
      
    
    Bus8bit ($10)  { 8 bits a data }
    outa[WR_pin]~
    waitcnt(clkfreq + cnt)
    outa[WR_pin]~~
  repeat 1
    outa[clock_pin]~
    outa[clock_pin]~~
    
    
    Bus8bit ($08)  { 8 bits a data }   
    outa[WR_pin]~
    waitcnt(clkfreq + cnt)
    outa[WR_pin]~~
  repeat 1
    outa[clock_pin]~
    outa[clock_pin]~~
    
       
    Bus8bit ($04)  { 8 bits a data }
    outa[WR_pin]~
    waitcnt(clkfreq + cnt)
    outa[WR_pin]~~
  repeat 1
    outa[clock_pin]~
    outa[clock_pin]~~
    

    Bus8bit ($02)  { 8 bits a data }
    outa[WR_pin]~
    waitcnt(clkfreq + cnt)
    outa[WR_pin]~~
  repeat 1
    outa[clock_pin]~
    outa[clock_pin]~~
    
   
    Bus8bit ($01)   { 8 bits a data }
    outa[WR_pin]~
    waitcnt(clkfreq + cnt)
    outa[WR_pin]~~
  repeat 1
    outa[clock_pin]~
    outa[clock_pin]~~
    waitcnt(clkfreq/4 + cnt) 
    
PUB UpperHUB2RAM_ACTIVE   {set 245L (D0..D7)  LOW }
    
    Bus4bit (5)
    Selector138 (6)
    outa[load_pin]~~
    outa[load_pin]~
    
PUB LowerHUB2RAM_ACTIVE   {set 245H (D08..D15)  LOW }
  
    Bus4bit (9)
    Selector138 (6)
    outa[load_pin]~~
    outa[load_pin]~           

PUB UpperRAM2LCD_ACTIVE   {8Bit Mode }
    
    Bus4bit (13)
    Selector138 (6)
    outa[load_pin]~~
    outa[load_pin]~
    
PUB LowerRAM2LCD_ACTIVE   {8Bit Mode }
  
    Bus4bit (14)
    Selector138 (6)
    outa[load_pin]~~
    outa[load_pin]~       
    
PUB RAM2LCD_ACTIVE   {16Bit Mode}
  
    Bus4bit (12)
    Selector138 (6)
    outa[load_pin]~~
    outa[load_pin]~         
    
PUB set245allhigh   {set 245H (D08..D15)  LOW }
  
    Bus4bit (15)
    Selector138 (6)
    outa[load_pin]~~
    outa[load_pin]~



PUB SetCounter (address)   | i 

    repeat i from 4 to 0        
      Selector138 (i)
      outa[load_pin]~~    

      outa[3..0]:= address >> (4 * i) 
      outa[clock_pin]~
      outa[clock_pin]~~

    outa[load_pin]~
      
PUB Selector138 (load_n)
    outa[6..4]:= load_n

PUB Bus8bit(data)
  outa[7..0] := data    

PUB Bus4bit(data)
  outa[3..0] := data

Igor_Rast · 2013-03-18 06:07

average joe wrote: »

RE: loading SRAM. I would interleave SRAM transfers, although it would be up to you to decide which SRAM to transfer to first. I would start with LSB, then MSB. Remember, when SRAM to display, display will be expecting 16 bits defining each pixel, in one transfer...

Interleaving ? setting the 245 to get the data i see is taking some steps , If I have one set ( e.g MSB) then clock it to ram , then go the the LSB and clock it to RAM . then I need to keep switching between the 245bus(setup time) ,. to get the data to the RAM, i thout of setting the MSB ,then store all data , .then go to the other one and do the same. no switching between , should be faster . and seems that I can just trow the next byte of data to the same SRAM without reselecting it . Indeed Ill have to figure out a way to seperate the data that way , (later worries i thinkk )

the hex, bin nummers , I had in mind , just started in a way i dont need to think to much decoding the numbers just to see if its working , Thaks for the help there

average joe wrote: »

U2 *138* load needs to go P4 or P5, active low. That's why you think load needs pulled low.

Pulling it high means it wil have a chanel selected , and doing other things on the pins is going to interfear with the rest .
thats why I pulled E3 of 138 low .

Hu ?/ P4. P5 ?? these are already used to set the adres A0.a2 at the 138. The selecting seems to be working fine .

average joe wrote: »

For U10, /LOAD AND P22 goes to LE..P22 to OE.. Connections backwards. 373 could be 374. Functionally equivilant, but there's something about using a `374 that reminds me it latches on a TRANSITION..

I have left the 373 that selects the SRAM bank out , Just started with 2 SRAM . 1 bank , So its connected to the 75 CS_RAM_LOW and CS_RAM_High
adding them later when the rest is working ( 1 bank should be enoug to get it working right ?)

average joe wrote: »

CNT5 - Q3 selects /CS_RAM_LOW or HIGH. I drive "a" on 138, *P1* Then E2 is /CS. It gets more complex since you need to access 1 chip at a time. I'll think about this one...

the code below selected it just fine I thouth, or not ?. can select one ram or both

PUB UpperRAM2LCD_ACTIVE   {8Bit Mode }
    
    Hub4bit (1,0,1,1)
    Selector138 (0,1,1)
    outa[load_pin]~~
    outa[load_pin]~
    
PUB LowerRAM2LCD_ACTIVE   {8Bit Mode }
  
    Hub4bit (0,1,1,1)
    Selector138 (0,1,1)
    outa[load_pin]~~
    outa[load_pin]~       
    
PUB RAM2LCD_ACTIVE   {16Bit Mode}
  
    Hub4bit (0,0,1,1)
    Selector138 (0,1,1)
    outa[load_pin]~~
    outa[load_pin]~

average joe wrote: »

I think I have a solution in mind, need to draw up schematic... Do you have 74hc137?

No I dont have it in house ,only the (74hc138) But if I need it ill get it :P

Going to Day #3 of coding

Igor_Rast · 2013-03-18 17:55

ok I think I have the first part working ,
Just filled up the ram with ini data and trow them to the display . Aint got a clue if the display is taking the data.
leds shows me that the data gets presented

.

after the ini , whats the simplest thing I could do to get something < anything displayed on the lcd , Just to feel the life out of it .

I removed the R4 resistor for dynamic backlight , But now the screen is like sensitive to my fingers , if I dont toch it it completly black , and if i press a little at the corners it glows the light inside . Not sure if this has to do with the lcd not powerd en driven yet. or me breaking something along the way. Or de display already broken , or just a loose wire .

CON                                              
  _clkmode      = xtal1 + pll16x                        ' use crystal x 16
  _xinfreq      = 5_000_000                             ' 5Mhz crystal
  _1ms      = 1_000_000 /     1_000                     ' Divisor for 1 ms     
CON
    load_pin = 8
    clock_pin = 9 
    RD_pin = 10
    WR_pin = 11
    
PUB Main
    dira[0..11]~~     
    outa[RD_pin]~~   
    outa[WR_pin]~~
        
    set245allhigh    
    LCD_RS_CS_RESET_ALL_High
    
    
    GET_ALL_INNI_DATA_TO_SRAM         ' at the moment the first 50 adresse with inni data
    outa[RD_pin]~
    Start_SSD1963                         ' Initilaize 
    
  
PUB UpperHUB2RAM_ACTIVE   {set 245L (D0..D7)  LOW }
    
    Bus4bit (5)
    Selector138 (6)
    outa[load_pin]~~
    outa[load_pin]~
    
PUB LowerHUB2RAM_ACTIVE   {set 245H (D08..D15)  LOW }
  
    Bus4bit (10)
    Selector138 (6)
    outa[load_pin]~~
    outa[load_pin]~           

PUB UpperRAM2LCD_ACTIVE   {}
    
    Bus4bit (13)
    Selector138 (6)
    outa[load_pin]~~
    outa[load_pin]~
    
PUB LowerRAM2LCD_ACTIVE   {8Bit Mode }
  
    Bus4bit (14)
    Selector138 (6)
    outa[load_pin]~~
    outa[load_pin]~       
    
PUB RAM2LCD_ACTIVE   {16Bit Mode}
  
    Bus4bit (12)
    Selector138 (6)
    outa[load_pin]~~
    outa[load_pin]~         
    
PUB set245allhigh   {set 245H (D08..D15)  LOW }
  
    Bus4bit (15)
    Selector138 (6)
    outa[load_pin]~~
    outa[load_pin]~  

PUB set245high   {Display }
  
    Bus4bit (15)    { Display_RS , Display_/CS , Displaay_/Reset, Notused output}
    Selector138 (5)
    outa[load_pin]~~
    outa[load_pin]~  


PUB SetCounter (address)   | i 

    repeat i from 4 to 0        
      Selector138 (i)
      outa[load_pin]~~    

      outa[3..0]:= address >> (4 * i) 
      outa[clock_pin]~
      outa[clock_pin]~~

    outa[load_pin]~
      
PUB Selector138 (load_n)
    outa[6..4]:= load_n

PUB Bus8bit(data)
  outa[7..0] := data    

PUB Bus4bit(data)
  outa[3..0] := data
  
PRI LCD_RS_Low  
    Bus4bit (12)    { 0.1.1.1: Display_RS , Display_/CS , Displaay_/Reset, Notused output}
    Selector138 (5)
    outa[load_pin]~~
    outa[load_pin]~  

PRI LCD_CS_Low  
    Bus4bit (13)    { 1.0.1.1: Display_RS , Display_/CS , Displaay_/Reset, Notused output}
    Selector138 (5)
    outa[load_pin]~~
    outa[load_pin]~ 
    
PRI LCD_RS_CS_Low  
    Bus4bit (12)    { 0.0.1.1: Display_RS , Display_/CS , Displaay_/Reset, Notused output}
    Selector138 (5)
    outa[load_pin]~~
    outa[load_pin]~ 

PRI LCD_RESET_Low  
    Bus4bit (11)    { 1.1.0.1: Display_RS , Display_/CS , Displaay_/Reset, Notused output}
    Selector138 (5)
    outa[load_pin]~~
    outa[load_pin]~ 

PRI LCD_RS_CS_RESET_ALL_High  {replacing LCD_RESET_High + LCD_CS_HIGH + LCD_RS_HIGH, all 74hc75 outputs high}
    Bus4bit (15)    { 1.1.1.1: Display_RS , Display_/CS , Displaay_/Reset, Notused output}
    Selector138 (5)
    outa[load_pin]~~
    outa[load_pin]~    
       
PUB pause1ms(period) | clkcycles
'' Pause execution for period (in units of 1 ms).
  clkcycles := ((clkfreq / _1ms * period) - 4296) #> 381     ' Calculate 1 ms time unit
  waitcnt(clkcycles + cnt)                                   ' Wait for designated time
    
PRI LCD_WR_Low
    outa[WR_pin]~

PRI LCD_WR_High
    outa[WR_pin]~~
    
PRI LCD_WR_CS_Low
    LCD_CS_Low    
    LCD_WR_Low
    
PRI LCD_WR_CS_High
    LCD_RS_CS_RESET_ALL_High            'LCD_CS_High    
    LCD_WR_High    


PRI LCD_WR_CS_RS_Low
    LCD_RS_CS_Low 
    LCD_WR_Low

PRI LCD_WR_CS_Low_RS_HIGH
    LCD_RS_CS_Low 
    LCD_WR_Low

PRI LCD_WR_CS_RS_High
    LCD_RS_CS_RESET_ALL_High 
    LCD_WR_High
         
'PRI LCD_Writ_Bus(adress)
' 
'    {put data on bus ,8 or 16 bit . out of sram . couter adres , and enable ram }        ' set P0-P15 to zero ready to OR
'    GET_WORD_FROM_SRAM_ON_BUS(adress)
'    LCD_WR_CS_Low                                          ' send out the data
'    LCD_WR_CS_High 


PRI Lcd_Write_Com(adresslong)                     
    GET_WORD_FROM_SRAM_ON_BUS(adresslong)
    LCD_WR_CS_RS_Low                             'CS & RS are beeing set at the same time , problem ?
    pause1ms(5)
    LCD_WR_CS_RS_High 
    'RD_High
 
PRI Lcd_Write_Data(adresslong)
    GET_WORD_FROM_SRAM_ON_BUS(adresslong)
    LCD_WR_CS_Low_RS_HIGH                                          ' send out the data
    pause1ms(5)
    LCD_WR_CS_RS_High 
    'RD_High
     
    
PRI Displaycmd(c,d) ' instruction in one method
    Lcd_Write_Com(c) ' send out a word
    Lcd_Write_Data(d)    
    
PRI GET_WORD_FROM_SRAM_ON_BUS (adress)           { 16bit interface }
    SetCounter (adress)  
    RAM2LCD_ACTIVE               {both sram active }     
    RD_LOW                      { data is now on bus , dont forget to turn RD back high }
    
PRI GET_BYTE_HIGH_FROM_SRAM_ON_BUS (adress)
    SetCounter (adress)  
    UpperRAM2LCD_ACTIVE             {Upper sram active }     
    RD_LOW                      { data is now on bus , dont forget to turn RD back high }  
      
PRI GET_BYTE_LOW_FROM_SRAM_ON_BUS (adress)   { 8 bitinter face }
    SetCounter (adress)  
    LowerRAM2LCD_ACTIVE             {lower sram active }     
    RD_LOW                      { data is now on bus , dont forget to turn RD back high }   
    
PRI RD_LOW
  outa[RD_pin]~

PRI RD_High
  outa[RD_pin]~~        
  
'' DISPLAY SETTINGS
DAT
   VDP        long  479
   HDP        long  799
   HT         long  928
   HPS        long  46
   LPS        long  15
   VT         long  525
   VPS        long  16
   FPS        long  8
   HPW        long  48
   VPW        long  16

PRI Start_SSD1963
'   DisplayEnable                                       ' enable one or both displays
    LCD_RS_CS_RESET_ALL_High        'LCD_Reset_High
    pause1ms(5)
    LCD_Reset_Low
    pause1ms(5)
    LCD_RS_CS_RESET_ALL_High        'LCD_Reset_High
                                    'LCD_CS_High - removed because already pulld high in line before
    LCD_WR_High
    pause1ms(5)
    RD_Low
    Lcd_Write_Com (0)       '($00E2)                             ' //PLL multiplier, set PLL clock to 120M
    Lcd_Write_Data(2)       '($0023)                             ' //N=0x36 for 6.5M, 0x23 for 10M crystal ' $21??
    Lcd_Write_Data(4)       '($0002)                             '
    Lcd_Write_Data(6)       '($0054)                             ' dummy byte?
    Lcd_Write_Com (8)       '($00E0)                             ' // PLL enable
    Lcd_Write_Data(10)       '($0001)                             ' set pll             '
    pause1ms(1)                                      '
    Lcd_Write_Com (12)       '($00E0)                             ' pll                         '
    Lcd_Write_Data(14)       '($0003)                             ' lock
    pause1ms(5)
    Lcd_Write_Com (16)       '($0001)                             ' // software reset
    pause1ms(5)
    Lcd_Write_Com (18)       '($00E6)                             ' //PLL setting for PCLK, depends on resolution
    Lcd_Write_Data(20)       '($0003)                             '
    Lcd_Write_Data(22)       '($00ff)                             '
    Lcd_Write_Data(24)       '($00ff)                             '
    
    Lcd_Write_Com (26)       '($00B0)                              ' //LCD SPECIFICATION
    Lcd_Write_Data(28)       '($0000)                             '
    Lcd_Write_Data(30)       '($0000)                             '
    Lcd_Write_Data(32)       '((HDP>>8)&$00FF)                    ' //Set HDP 'hps??
    Lcd_Write_Data(34)       '(HDP&$00FF)
    Lcd_Write_Data(36)       '((VDP>>8)&$00FF)                    ' //Set VDP 'vps??
    Lcd_Write_Data(38)       '(VDP&$00FF)
    Lcd_Write_Data(40)       '($0000)
    
    Lcd_Write_Com (42)       '($00B4)                             ' //HSYNC
    Lcd_Write_Data(44)       '((HT>>8)&$00FF)                     ' //Set HT
    Lcd_Write_Data(46)       '(HT&$00FF)
    Lcd_Write_Data(48)       '((HPS>>8)&$00FF)                    ' //Set HPS
    Lcd_Write_Data(50)       '(HPS&$00FF)
    Lcd_Write_Data(52)       '(HPW)                               ' //Set HPW
    Lcd_Write_Data(54)       '((LPS>>8)&$00FF)                    ' //Set HPS
    Lcd_Write_Data(56)       '(LPS&$00FF)                         '
    Lcd_Write_Data(58)       '($0000)                             '
    Lcd_Write_Com (60)       '($00B6)                             ' //VSYNC
    Lcd_Write_Data(62)       '((VT>>8)&$00FF)                     ' //Set VT
    Lcd_Write_Data(64)       '(VT&$00FF)
    Lcd_Write_Data(66)       '((VPS>>8)&$00FF)                    ' //Set VPS
    Lcd_Write_Data(68)       '(VPS&$00FF)
    Lcd_Write_Data(70)       '(VPW)                               ' //Set VPW
    Lcd_Write_Data(72)       '((FPS>>8)&$00FF)                    ' //Set FPS
    Lcd_Write_Data(74)       '(FPS&$00FF)                         '
    Lcd_Write_Com (76)       '($00BA)                             '
    Lcd_Write_Data(78)       '($0005)                             ' //GPIO[3:0] out 1
    Lcd_Write_Com (80)       '($00B8)                             '
    Lcd_Write_Data(82)       '($0007)                             ' //GPIO3=input, GPIO[2:0]=output
    Lcd_Write_Data(84)       '($0001)                             ' //GPIO0 normal
    Lcd_Write_Com (86)       '($0036)                              ' //rotation
    Lcd_Write_Data(88)       '($0021)                              ' 3 is 180
    Lcd_Write_Com (90)       '($00F0)                             ' //pixel data interface
    Lcd_Write_Data(92)       '($0003)                             ' 16 bit / 565
    pause1ms(5)
    Lcd_Write_Com (94)       '($0029)                              ' //display on
    Lcd_Write_Com (96)       '($00d0)                              ' //dynamic backlight
    Lcd_Write_Data(98)       '($000d)
    Lcd_Write_Com (100)       '($002c)
    LCD_RS_CS_RESET_ALL_High        ' LCD_RS_High  
    RD_High
    
    
    
    
PUB HUB2RAM(data)    {demo  to see the data get stored in ram}    

    Bus8bit (data)     { 8 bits a data }
    outa[WR_pin]~
    pause1ms(5)
    outa[WR_pin]~~
  repeat  2
    outa[clock_pin]~
    outa[clock_pin]~~    
  
   

PUB  GET_ALL_INNI_DATA_TO_SRAM
    
    UpperHUB2RAM_ACTIVE            {data8..data15} 
    waitcnt(clkfreq + cnt)  
    SetCounter (0)                        
    Fill_SRAM_1                       
    waitcnt(clkfreq*3 + cnt)  
    
    LowerHUB2RAM_ACTIVE              {data0..data7}
    waitcnt(clkfreq + cnt)        
    SetCounter (0)   
    Fill_SRAM_0
    waitcnt(clkfreq *3+ cnt)       
    
PUB Fill_SRAM_1  
  repeat 50 
      HUB2RAM($00)
      
PUB Fill_SRAM_0 { adress auto increasing with 2 automatic }           
  
      HUB2RAM($E2)             ' adres 0                ' //PLL multiplier, set PLL clock to 120M
      HUB2RAM($23)             ' adres 2                 ' //N=0x36 for 6.5M, 0x23 for 10M crystal ' $21??
      HUB2RAM($02)             ' adres 4                 '
      HUB2RAM($54)             ' adres 6                 ' dummy byte?
      HUB2RAM($E0)             ' adres 8                 ' // PLL enable
      HUB2RAM($01)             ' adres 10                 ' set pll           '
      HUB2RAM($E0)             ' adres 12                 ' pll                         '
      HUB2RAM($03)             ' adres 14                 ' lock  
      HUB2RAM($01)             ' adres 16                 ' // software reset    
      HUB2RAM($E6)             ' adres 18                 ' //PLL setting for PCLK, depends on resolution
      HUB2RAM($03)             ' adres 20                 '
      HUB2RAM($FF)             ' adres 22                 '
      HUB2RAM($FF)             ' adres 24                 '
      HUB2RAM($B0)             ' adres 26                  ' //LCD SPECIFICATION      
      HUB2RAM($00)             ' adres 28                 '
      HUB2RAM($00)             ' adres 30                 '
      HUB2RAM($03)             ' adres 32                 '((HDP>>8)&$00FF)                    ' //Set HDP 'hps??
      HUB2RAM($31)       '(HDP&$00FF)
      HUB2RAM($01)       '((VDP>>8)&$00FF)                    ' //Set VDP 'vps??
      HUB2RAM($DF)       '(VDP&$00FF)      
      HUB2RAM($00)
      HUB2RAM($B4)                             ' //HSYNC
      HUB2RAM($03)       '((HT>>8)&$00FF)                     ' //Set HT
      HUB2RAM($A0)       '(HT&$00FF)
      HUB2RAM($00)       '((HPS>>8)&$00FF)                    ' //Set HPS
      HUB2RAM($2E)       '(HPS&$00FF)
      HUB2RAM($30)       '(HPW)                               ' //Set HPW
      HUB2RAM($00)       '((LPS>>8)&$00FF)                    ' //Set HPS
      HUB2RAM($0F)       '(LPS&$00FF)                         '
      HUB2RAM($00)                             '
      HUB2RAM($B6)                             ' //VSYNC
      HUB2RAM($02)       '((VT>>8)&$00FF)                     ' //Set VT
      HUB2RAM($0D)       '(VT&$00FF)
      HUB2RAM($00)       '((VPS>>8)&$00FF)                    ' //Set VPS
      HUB2RAM($10)       '(VPS&$00FF)
      HUB2RAM($10)       '(VPW)                               ' //Set VPW
      HUB2RAM($00)       '((FPS>>8)&$00FF)                    ' //Set FPS
      HUB2RAM($08)       '(FPS&$00FF)                         '
      HUB2RAM($BA)                             '
      HUB2RAM($05)                             ' //GPIO[3:0] out 1
      HUB2RAM($B8)                             '
      HUB2RAM($07)                             ' //GPIO3=input, GPIO[2:0]=output
      HUB2RAM($01)                             ' //GPIO0 normal
      HUB2RAM($36)                              ' //rotation
      HUB2RAM($21)                              ' 3 is 180
      HUB2RAM($F0)                             ' //pixel data interface
      HUB2RAM($03)                             ' 16 bit / 565
      HUB2RAM($29)                              ' //display on
      HUB2RAM($d0)                              ' //dynamic backlight
      HUB2RAM($0d)
      HUB2RAM($2c)

average joe · 2013-03-18 18:14

RE: 138... I meant use enable1 instead of enable3. Drive active low, not active high. Otherwise group selection won't work * the current schematic won't work as intended anyway*

RE: Backlight, have you made solder jumper1? This is needed to connect controller to backlight Vreg. This could be the problem?

No need to send INI data to RAM, then display. Send directly to display. Need to look at schematic, but I think there may be some changes for LCD. The thing to note is the displays like to have /CS and /WR switched at the same time. Otherwise some issues...

I think display /WR needs separate line from RAM /WR.

Code needs some abstraction. I'll see if I can get some work done on that soon. I'll look over current code and schematic, then report back.

Also, if using binary do this;

PUB main

SomeMethod(%0000_1110) ' binary is MSB to LSB

PUB SomeMethod(n)
..
 outa[7..4] := n

Sending each bit as a parameter will it harder to re-write later.

If INI data is properly sent, display will have random data that shows up. See photo 5 in from this post:
http://forums.parallax.com/showthread.php/137266-Propeller-GUI-touchscreen-and-full-color-display?p=1165091&viewfull=1#post1165091
Note, there is a black box.. we'll get to drawing that in a few

Here's what I'd do. Use /Clock to drive /DisplayWR. Then need to de-select display before loading address. My current hardware has separate clock and display /WR but I toggle both together. Works fine. Perhaps better to use P12 for now??

Igor_Rast · 2013-03-18 19:34

@ Joe . Thanks for taking the time to look tru the code ,realy appriciate it

Ill look into the 138 . and the solder bridge may be the problem , going to redo that now .
UPDATE : have you seen the schematic of the lcd 4,3 . are you sure its j1 that needs to be solders , not j3 ? I solderd back a 10k resistor at r4 and the flickering stoped , the bride j1 didnt seem to stop blinking , even it seems to be solderd right , dont want to bother it too much else I aint going to have any pads left

INI data directly to lcd , Makes sense to me

. Ill change that back . was more of a proof thing .

displays like to have /CS and /WR switched at the same time. . I could connect the display WR to the Q3 of the 74hc75 . still got 1 output left ,
thisway they are both toggled at the same time right ??

Here's what I'd do. Use /Clock to drive /DisplayWR.. or is this still a better solution .

Just to be sure , By selecting the display we mean driving the LCD_CS line LOW right ??

P12 may also work fine , thinking the 75 is the best

On the SRAM stacking , was wondering , Now im only using 2 sram chips to get a bank , but the stacking and the group selecting is not present yet , to select the banks .
what about , adding another 74hc161 couter to the row , the 138 still has 1 output left , I can use it to load this extra #6 counter , that is going to select wich SRAM bank is active , or add some logic behind the #6 counter thats gonna pull the right bank low , when the counter number reached .
I thinking in progress,.

EDIT : Now i remember, Why I have to load the data to the ram first , and cant send it directly,
the cs,wr,rs,reset are controlled by the same pins as the bus , and the 245 dont hold the bus data , so Ill have to put it all in ram first , then call it only by adress numver , preset , and then toggle tru them , with the dedicated clock pin. or the shifting in will interfear with the data on the bus . Or ill have to move all those controle lines elsewhere A19 A20 maybe (unused now , wanting a different solution for the stacked ram anyway)

Still no Inni gone right , Tommorrow a new day

average joe · 2013-03-18 21:55

I've got some schematics to draw up but I think I've got it figured out. Display /CS from latch1 is OR'd with CLOCK for display /CS. Clock drives /WR directly. TE-PE for counter1 is Q3 of latch1. This lets us use CLOCK to write to display and run counters. If write to display from propeller, disable count *probably not needed* and set latch1. RamToDisplay is count enabled/display enabled.

I think we need to get the basic 2 SRAM version going before we worry about memory banks. Still need to get display going.
Need to do some testing, since we can send data to display in 8 OR 16 bit mode. Also, display REGISTERS are set using only byte-wide data. Might be able to leave display in 16-bit mode and still set draw directly from propeller.

We need to be able to send data from the prop to display directly. I'll try to write some code for that in a few.

*edit*
Here's what I'm thinking. Use a byte to store values for latches. Then just choose which latch to set.

PUB RAM2LCD_ACTIVE   {16Bit Mode}                   
                                'latch1{Notused output, Display_/Reset, Display_/CS, Display_RS  }  
                                'latch2 {High 245, Low 245, RamCShigh, RamCSlow}
    latch &= %1100_1101
    SetLatch(2)    
                
PUB LatchAllHigh | i   {Display }
    latch := $FF
    repeat i from 1 to 2
      SetLatch(i)

PUB SetLatch(n) ' n is latch 1 or 2, value is new nibble to set
   if n == 1
     Send(latch &$F , Latch1)
   else
     Send(((latch >> 4) &$F), Latch2)
      
PUB Send(s,d)

    Bus4bit (d)
    Selector138 (s)
    outa[load_pin]~~
    outa[load_pin]~

Igor_Rast · 2013-03-19 07:54

average joe wrote: »

I've got some schematics to draw up but I think I've got it figured out. Display /CS from latch1 is OR'd with CLOCK for display /CS. Clock drives /WR directly. TE-PE for counter1 is Q3 of latch1. This lets us use CLOCK to write to display and run counters. If write to display from propeller, disable count *probably not needed* and set latch1. RamToDisplay is count enabled/display enabled.

Should look something like this then right ?
Dual Prop V3 COUNTER.pdf
rewiring and trying some things out here , time not realy on my side today

souds good.

average joe wrote: »

I think we need to get the basic 2 SRAM version going before we worry about memory banks. Still need to get display going.

Exactly my plan, get it going first yes, was meaning I was thinking about a different solution for the bank selecting , so we dont have to write code for it , but just a bigger adress. ( an add some logic to select ). anyway , it saves the pins A19 A20 (p12 +p13) so we can use them for something else . Ill leave it at that for now Just a thouth .

Also focusing on getting data 8bits from HUM2LCD.
was wondering , from the ini data .
there were some parametes that get loaded as ini data .

'' DISPLAY SETTINGS
DAT
   VDP        long  479
   HDP        long  799
   HT         long  928
   HPS        long  46
   LPS        long  15
   VT         long  525
   VPS        long  16
   FPS        long  8
   HPW        long  48
   VPW        long  16

I was wondering what exactly I have to change , or none at all for my 4.3 inch 480 * 272 pixel

the VDP 479 , and HDP 799 . Look like te 480*800 pixel display -1 pixel . but not sure . Should i change it to my specs . VDP 271 and HDP 479 for my 272*480 pixel display??
the other values not sure about them , now i just tring with them as they are

average joe · 2013-03-19 08:16

That schematic should work. Probably don't need COUNT_ENABLE. Just leave it for now though. I should have more code for you later today.

TBH, we need the C code for your display to make sure we do the init right. I have a feeling ALL of that DAT block will change. In the test code LCD\lcd.c

u16  HDP=799;
u16  HT=928;
u16  HPS=46;
u16  LPS=15;
u8   HPW=48;

u16  VDP=479;
u16  VT=525;
u16  VPS=16;
u16  FPS=8;
u8   VPW=16;
..
..
void Lcd_Init(void)
{

//µ÷ÓÃÒ»´ÎÕâÐ©º¯Êý£¬ÃâµÃ±àÒëµÄÊ±ºòÌáÊ¾¾¯¸æ
   	LCD_CS =1;
	if(LCD_CS==0)
	{
	   LCD_WR_REG_DATA(0,0);
	   LCD_ShowString(0,0," ");
	   LCD_ShowNum(0,0,0,0);
	   LCD_Show2Num(0,0,0,0);
	   LCD_DrawPoint_big(0,0);
	   LCD_DrawRectangle(0,0,0,0);
	   Draw_Circle(0,0,0);
    }


    LCD_REST=1;
    delayms(5);	
	LCD_REST=0;
	delayms(5);
	LCD_REST=1;
	LCD_CS=1;
	LCD_RD=1;
	LCD_WR=1;
	delayms(5);
	LCD_CS =0;  //´ò¿ªÆ¬Ñ¡Ê¹ÄÜ

	LCD_WR_REG(0x00E2);	//PLL multiplier, set PLL clock to 120M
	LCD_WR_DATA(0x0023);	    //N=0x36 for 6.5M, 0x23 for 10M crystal
	LCD_WR_DATA(0x0002);
	LCD_WR_DATA(0x0004);
	LCD_WR_REG(0x00E0);  // PLL enable
	LCD_WR_DATA(0x0001);
	delayms(1);
	LCD_WR_REG(0x00E0);
	LCD_WR_DATA(0x0003);
	delayms(5);
	LCD_WR_REG(0x0001);  // software reset
	delayms(5);
	LCD_WR_REG(0x00E6);	//PLL setting for PCLK, depends on resolution
	LCD_WR_DATA(0x0003);
	LCD_WR_DATA(0x00ff);
	LCD_WR_DATA(0x00ff);

	LCD_WR_REG(0x00B0);	//LCD SPECIFICATION
	LCD_WR_DATA(0x0000);
	LCD_WR_DATA(0x0000);
	LCD_WR_DATA((HDP>>8)&0X00FF);  //Set HDP
	LCD_WR_DATA(HDP&0X00FF);
    LCD_WR_DATA((VDP>>8)&0X00FF);  //Set VDP
	LCD_WR_DATA(VDP&0X00FF);
    LCD_WR_DATA(0x0000);

	LCD_WR_REG(0x00B4);	//HSYNC
	LCD_WR_DATA((HT>>8)&0X00FF);  //Set HT
	LCD_WR_DATA(HT&0X00FF);
	LCD_WR_DATA((HPS>>8)&0X00FF);  //Set HPS
	LCD_WR_DATA(HPS&0X00FF);
	LCD_WR_DATA(HPW);			   //Set HPW
	LCD_WR_DATA((LPS>>8)&0X00FF);  //Set HPS
	LCD_WR_DATA(LPS&0X00FF);
	LCD_WR_DATA(0x0000);

	LCD_WR_REG(0x00B6);	//VSYNC
	LCD_WR_DATA((VT>>8)&0X00FF);   //Set VT
	LCD_WR_DATA(VT&0X00FF);
	LCD_WR_DATA((VPS>>8)&0X00FF);  //Set VPS
	LCD_WR_DATA(VPS&0X00FF);
	LCD_WR_DATA(VPW);			   //Set VPW
	LCD_WR_DATA((FPS>>8)&0X00FF);  //Set FPS
	LCD_WR_DATA(FPS&0X00FF);

	LCD_WR_REG(0x00BA);
	LCD_WR_DATA(0x0005);    //GPIO[3:0] out 1

	LCD_WR_REG(0x00B8);
	LCD_WR_DATA(0x0007);    //GPIO3=input, GPIO[2:0]=output
	LCD_WR_DATA(0x0001);    //GPIO0 normal

	LCD_WR_REG(0x0036); //rotation
	LCD_WR_DATA(0x0000);

	LCD_WR_REG(0x00F0); //pixel data interface
	LCD_WR_DATA(0x0003);


	delayms(5);

	LCD_WR_REG(0x0029); //display on



	LCD_WR_REG(0x00d0); 
	LCD_WR_DATA(0x000d);


}

I'll keep thinking about bank selecting. Gotta run for now!

Igor_Rast · 2013-03-19 08:41

Just had that feeling . Your right
Found it , Gonna change that to start with :P . Thanks man
Ill keep you posted on the progress

[code]#include <reg51.h>
#include <intrins.h>
#include <font\font.h>
#include <sys\sys.h>
#include <lcd\lcd.h>
/* http://ttmcu.taobao.com

average joe · 2013-03-20 06:24

Sorry, have not been feeling good. Try this out:

CON                                              
  _clkmode      = xtal1 + pll16x                        ' use crystal x 16
  _xinfreq      = 5_000_000                             ' 5Mhz crystal
  _1ms      = 1_000_000 /     1_000                     ' Divisor for 1 ms    
   
CON
    load_pin = 8
    clock_pin = 9 
    RD_pin = 10
    WR_pin = 11

    ' Selector   
  LATCH1 = 5
  LATCH2 = 6
  

  'latch 1
  DispRS  = 0
  DispCS  = 1
  DispRST = 2

  'latch 2
  RamCSlow  = 0
  RamCShigh = 1
  Low245    = 2
  High245   = 3

  

VAR byte latchvalue             'latch1 {Count, Display_/Reset, Display_/CS, Display_RS  }  
                                'latch2 {/High 245, /Low 245, Ram/CShigh, Ram/CSlow}

       
PUB Main |i
    outa[RD_pin]~~   
    outa[WR_pin]~~
    outa[WR_pin]~~
    'outa[LOAD_pin]~~      ' connect load to enable 1 or 2, active low!!
   dira[11..0]~~     
       
    latchALLhigh
    waitcnt(clkfreq*5 + cnt) 
    
    Start_SSD1963

    repeat
    

PUB UpperHUB2RAM_ACTIVE   {set 245L (D0..D7)  LOW }
latchvalue |= 0101_0000
latchvalue &= 0101_1111

                                'latch1{CLOCK_EN, Display_/Reset, Display_/CS, Display_RS  }  
                                'latch2 {High 245, Low 245, RamCShigh, RamCSlow}

PUB LowerHUB2RAM_ACTIVE   {set 245H (D08..D15)  LOW }  
latchvalue |= 1010_0000
latchvalue &= 1010_1111

                                'latch1 {CLOCK_EN, Display_/Reset, Display_/CS, Display_RS  }  
                                'latch2 {High 245, Low 245, RamCShigh, RamCSlow}

PUB RAM2LCD_ACTIVE   {8Bit Mode}
latchvalue |= 1100_0000
latchvalue &= 1100_1101
'RD_LOW                                
                                'latch1 {CLOCK_EN, Display_/Reset, Display_/CS, Display_RS  }  
                                'latch2 {High 245, Low 245, RamCShigh, RamCSlow}
    
PUB HUB2LCD_ACTIVE   {8Bit Mode}     
latchvalue |= 1011_0000
latchvalue &= 1011_0101
RD_HIGH
                                'latch1 {CLOCK_EN, Display_/Reset, Display_/CS, Display_RS  }  
                                'latch2 {High 245, Low 245, RamCShigh, RamCSlow}

PUB pause1ms(period) | clkcycles
'' Pause execution for period (in units of 1 ms).
  clkcycles := ((clkfreq / _1ms * period) - 4296) #> 381     ' Calculate 1 ms time unit
  waitcnt(clkcycles + cnt)                                   ' Wait for designated time
    
PRI SetCounter (address)   | i 
    repeat i from 4 to 0        
      outa[6..4] := i
      outa[load_pin]~~    
      outa[3..0]:= address >> (4 * i) 
      outa[clock_pin]~
      outa[clock_pin]~~
    outa[load_pin]~

PRI LatchAllHigh | i   {Display }
    latchvalue := $FF
    SetLatch(3)

PRI SetLatch(n) ' n is latch 1 or 2, value is new nibble to set
   if n == 1
     SendLatch(latchvalue &$F , Latch1)
   elseif n== 2
     SendLatch(((latchvalue >> 4) &$F), Latch2)
   elseif n==3
     SendLatch(latchvalue &$F , Latch1)
     SendLatch(((latchvalue >> 4) &$F), Latch2)     
      
PRI SendLatch(s,d)

    outa[3..0] := d
    outa[6..4] := s
    outa[load_pin]~~
    outa[load_pin]~

PRI RD_LOW
  outa[RD_pin]~

PRI RD_High
  outa[RD_pin]~~        

PRI Bus8bit(data)
  outa[7..0] := data    
    
PRI LCD_RS_High  
  latchvalue |= %0001_0000

PRI LCD_RS_Low  
  latchvalue &= %1110_1111

PRI LCD_CS_High  
  latchvalue |= %0010_0000
  
PRI LCD_CS_Low  
  latchvalue &= %1101_1111

PRI LCD_RESET_High
  latchvalue |= %0100_0000

PRI LCD_RESET_Low
  latchvalue &= %1011_1111

PRI LCD_WR_Low
    outa[clock_pin]~

PRI LCD_WR_High
    outa[clock_pin]~~
       
PRI Lcd_Write_Com(adresslong)                     
    LCD_RS_Low   
    LCD_write_bus(adresslong)
    LCD_RS_High
 
PRI Lcd_Write_Data(adresslong)
    LCD_CS_Low   
    LCD_write_bus(adresslong)                               ' send out the data
    
PRI Displaycmd(c,d) ' instruction in one method
    Lcd_Write_Com(c) ' send out a word
    Lcd_Write_Data(d)    

PRI LCD_write_bus(lcdbyte)
    bus8bit(lcdbyte)            
    LCD_WR_Low   
    waitcnt(clkfreq /4 + cnt)'   pause1ms(5)
    LCD_WR_High                  

'' DISPLAY SETTINGS
DAT
   VDP        long  271
   HDP        long  479
   HT         long  531
   HPS        long  43
   LPS        long  8
   VT         long  288
   VPS        long  12
   FPS        long  4
   HPW        long  10
   VPW        long  10

PRI Start_SSD1963
    HUB2LCD_ACTIVE
    LCD_Reset_High
    pause1ms(5)
    LCD_Reset_Low
    pause1ms(5)
    LCD_Reset_High
    LCD_CS_High
    LCD_WR_High
    pause1ms(5)

    waitcnt(clkfreq /4 + cnt)'  pause1ms(5)
    
    LCD_CS_Low

    Lcd_Write_Com ($E2)       '($00E2)                             ' //PLL multiplier, set PLL clock to 120M
    Lcd_Write_Data($2d)       '($0023)                             ' //N=0x36 for 6.5M, 0x23 for 10M crystal ' $21??
    Lcd_Write_Data($02)       '($0002)                             '
    Lcd_Write_Data($04)       '($0054)                             ' dummy byte?
    Lcd_Write_Com ($E0)       '($00E0)                             ' // PLL enable
    Lcd_Write_Data($01)       '($0001)                             ' set pll             '
   waitcnt(clkfreq /4 + cnt)'  pause1ms(1)                                      '
    Lcd_Write_Com ($E0)       '($00E0)                             ' pll                         '
    Lcd_Write_Data($03)       '($0003)                             ' lock
   waitcnt(clkfreq /4 + cnt)'   pause1ms(5)
    Lcd_Write_Com ($01)       '($0001)                             ' // software reset
   waitcnt(clkfreq /4 + cnt)'  pause1ms(5)
    Lcd_Write_Com ($E6)       '($00E6)                             ' //PLL setting for PCLK, depends on resolution
    Lcd_Write_Data($00)       '($0003)                             '
    Lcd_Write_Data($FF)       '($00ff)                             '
    Lcd_Write_Data($BE)       '($00ff)                             '
    
    Lcd_Write_Com ($B0)       '($00B0)                              ' //LCD SPECIFICATION
    Lcd_Write_Data($20)       '($0000)                             '
    Lcd_Write_Data($00)       '($0000)                             '
    Lcd_Write_Data((HDP>>8)&$00FF)      '((HDP>>8)&$00FF)                    ' //Set HDP 'hps??
    Lcd_Write_Data(HDP&$00FF)       '(HDP&$00FF)
    Lcd_Write_Data((VDP>>8)&$00FF)      '((VDP>>8)&$00FF)                    ' //Set VDP 'vps??
    Lcd_Write_Data(VDP&$00FF)       '(VDP&$00FF)
    Lcd_Write_Data($00)       '($0000)
    
    waitcnt(clkfreq /4 + cnt)' pause1ms(5)
        
    Lcd_Write_Com ($B4)                 '($00B4)                             ' //HSYNC
    Lcd_Write_Data((HT>>8)&$00FF)       '((HT>>8)&$00FF)                     ' //Set HT
    Lcd_Write_Data(HT&$00FF)            '(HT&$00FF)
    Lcd_Write_Data((HPS>>8)&$00FF)      '((HPS>>8)&$00FF)                    ' //Set HPS
    Lcd_Write_Data(HPS&$00FF)           '(HPS&$00FF)
    Lcd_Write_Data(HPW)                 '(HPW)                               ' //Set HPW
    Lcd_Write_Data((LPS>>8)&$00FF)      '((LPS>>8)&$00FF)                    ' //Set HPS
    Lcd_Write_Data(LPS&$00FF)           '(LPS&$00FF)                         '
    Lcd_Write_Data($00)                 '($0000)                             '
    Lcd_Write_Com ($B6)                 '($00B6)                             ' //VSYNC
    Lcd_Write_Data((VT>>8)&$00FF)       '((VT>>8)&$00FF)                     ' //Set VT
    Lcd_Write_Data(VT&$00FF)            '(VT&$00FF)
    Lcd_Write_Data((VPS>>8)&$00FF)      '((VPS>>8)&$00FF)                    ' //Set VPS
    Lcd_Write_Data(VPS&$00FF)           '(VPS&$00FF)
    Lcd_Write_Data(VPW)                 '(VPW)                               ' //Set VPW
    Lcd_Write_Data((FPS>>8)&$00FF)      '((FPS>>8)&$00FF)                    ' //Set FPS
    Lcd_Write_Data(FPS&$00FF)           '(FPS&$00FF)                         '

    Lcd_Write_Com ($36)       '($0036)                              ' //rotation
    Lcd_Write_Data($00)       '($0021)                              ' 3 is 180

    Lcd_Write_Com ($F0)       '($00F0)                             ' //pixel data interface
    Lcd_Write_Data($03)       '($0003)                             ' 16 bit / 565
    
   waitcnt(clkfreq /4 + cnt)'  pause1ms(5)
    
    Lcd_Write_Com ($29)       '($0029)                              ' //display on      
    Lcd_Write_Com ($BE)       '($00BE)                              ' //SET PWM FOR B/L        
    Lcd_Write_Data($06)       '         
    Lcd_Write_Data($F0)       '
    Lcd_Write_Data($01)       '
    Lcd_Write_Data($F0)       '
    Lcd_Write_Data($00)       '       
    Lcd_Write_Data($00)       '     

    Lcd_Write_Com ($D0)       '($00d0)                              ' //dynamic backlight
    Lcd_Write_Data($0D)       '($000d)           
    
'''''''''''''''''''''LCD RESET ---- GPIO0-----------------------------------------------------       
   waitcnt(clkfreq /4 + cnt)'  pause1ms(50)
    Lcd_Write_Com ($B8)       '($00B8)                             '
    Lcd_Write_Data($00)       '($0000)                             ' //GPIO3=input, GPIO[2:0]=output
    Lcd_Write_Data($01)       '($00B8)                             '//GPIO0 normal
    
    Lcd_Write_Com ($BA)       '($0007)                             ' //
    Lcd_Write_Data(00)       '($0001)                             ' //

   waitcnt(clkfreq /4 + cnt)'  pause1ms(5)


    Lcd_Write_Com (100)       '($002c)
    LCD_RS_High               ' LCD_RS_High  
    LCD_CS_High

The reason I preference load connected to enable 1 or 2 of 138 is this makes active low. Everything else *well not count enable* is active low. Then you can use resistor networks instead of single resistors? Also, think word 8-15 could use pull-ups. I believe the datasheet for the display states unused inputs pulled up. Should be fine. Have a few more details to knock out and get working before porting to PASM, but it's close. Once the PASM driver is done, there should only be a few mods to touch.spin and everything should work. Fingers crossed.

Propeller GUI touchscreen and full color display

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