And we should thank jazzed for helping us understand the importance of making the Propeller 2 instruction set available. He's been an important link to the forums for us lately, with PropGCC being a very key example. Thanks Steve!
Without further adieu, the Propeller II Preliminary Feature List (which contains the Propeller II's instruction set).
Great! Thanks, Daniel. A few people had been wondering what happened to the "open and inclusive" Parallax we all used to know and love. But now all is good again
Well, the first think I looked for was the multiply instructions (because I've been waiting a long time to do MP3 decoding...).
Took me a minute to figure it out, but I see a 16-bit multiply, so I'm happy!
I think they can leave off the "(0-511)" everywhere for D and S though. Isn't this understood?
I really don't see how "waitpeq" can be the same as Prop1...
RossH,
"...A few people had been wondering what happened to the "open and inclusive" Parallax we all used to know and love. But now all is good again..." - We've been sort of busy. :-)
Cogs now have the ability to remap their internal memory to help facilitate context switching between register banks. Instead of having to save a bunch of internal register to switch running programs all references to a set of register can be changed instantaneously.
Fun! It sounds like a tactic I learned in my OS class...
It's interesting how the terminology has changed from the Propeller 1. It seems that the Parallax employees have been reading up on datapath creation, and started using new (for the Propeller) terms such as "register", "FSM", etc.
Quite a beast indeed! It will take quite a while to get my head wrapped around this one..... in fact at first blush it all looks a bit daunting, but I suspect that with time it will become manageable.
Has anyone else had problems opening the file? Acrobat reports an error in the file and refuses to open it. I have tried updating Acrobat, but it still reports an error.
Has anyone else had problems opening the file? Acrobat reports an error in the file and refuses to open it. I have tried updating Acrobat, but it still reports an error.
Yes, there does seem to be an issue. I can open it, but it has crashed my Adobe reader once already. One trick with pdf readers (especially Adobe) is never to open a pdf in a browser - always download them and open them locally.
Just some free proof-reading for those at Parallax:
Page 1 - Introduction
Each cog has 512 longs (2 KB) of memory from which it executes instructions from.
Page 11 - Table 1
When written changes the state of the I/O pin attached to port B. When read, returns the state of the I/O
port attached to PINC.
When written changes the state of the I/O pin attached to port B. When read, returns the state of the I/O
port attached to PIND.
That's for PINC & PIND.
Also:
Page 12 - Table 15
Assign PORTC to physical I/O ports (0-2) or
internal I/O port 3 given register “D (0-511)” or
number “n (0-3)”.
on SETPORD (our old friend copy & paste strikes again!)
Lastly:
Page 13 - Table 18
Sets up the serial port I/O pins to use for SO, SI,
and CLK given D or “n (0-63)
Not sure if this is a typo or not - chip-to-chip comms may not be available on port C?
Nice instruction set with a lot of great features. Just a couple of things I noticed...
The instruction to toggle a pin on or off...
The mnemonic OFFP seemed obscure/incorrect. I wonder if NOTP, XORP or TOGP may be more intuitive ???
There did not seem to be any hardware assist for receiving bitstreams within the counters. Did I miss something, has it just not made the specs, or is it not going to be possible ???
A few instructions will require better explanations later because I could not determine what they actually do, and their use.
There are a few really powerful instructions that will minimise code. For example the NOPX instruction will be great for timing data streams etc. The REP instruction (we knew about this) will be fantastic. The hub instructions with incrementing and caching options will remove a bottleneck, as will quad and 1in8 rather than 1in16 clock accesses too. And the ability to use the CLUT when Video is not used will also be a great addition.
All-in-all, it will be the great chip we are expecting
Some of them still need some extra explanation but in first stage it is OK.
I have one more question to You/Chip -- as it is not clear from this List to find answer!
How many pins VGA will use ? 4-5 else more(and need them some predefined pin places else any of pins) . Next what type of Boot device is planed to be used and how many pins need be reserved for that?
Without further adieu, the Propeller II Preliminary Feature List (which contains the Propeller II's instruction set).
This document will be posted here for the evening. Tomorrow morning, the document will be posted on the Parallax Semiconductor website and a link to the appropriate page will replace the link to the file.
Good information.
a) I think I can see a 32*32 -> 64, but the divide is a little unclear, is that
a complementary 64/32 -> 32Q.32R
or a simpler 32/32 -> 32Q.32R
Q.R is great, as that allows fast modulus moths.
b) The Counter has Quadrature mode, which is great.
- but I can see no mention of any HW CAPTURE, and even external Divide from a Pin, is not clear ?
Why does this matter ? : You can get much better precision, and dynamic range, and lower power, if software tight polling is not needed.
With two 32 bit counters with capture ability, and atomic On.off control of the pair of flags (in same SFR)
and one counter clocked from High speed timebase and the other from any pin, you can build a very high precision,
and wide dynamic range counter.
One gives time, the other Cycles, and then Cycles/Time is Frequency. \
Precision is very high : At 180MHz and an (appx) 100ms refresh time, you resolve to 55ppb, 10ms refresh resolves to 0.55ppm, and 1ms refresh resolves to 5.5ppm. (1s resolves to 5.5ppb, and 10s can give 0.55ppb)
Sounds like this would have a very low added silicon cost ?
[about the IND registers] Isn't self modifying code one of the good unique features of the Propeller?
I wouldn't call it "good".. to me it's a necessary hack due to missing indirection handling via registers and this improvement is one I wished for in Propeller II, so I'm happy. :-)
- I like the 'Cog Memory Remapping' although I'm curious about where it maps to and from.. it doesn't say more about it, from a quick look at the document.
- The Cog-To-Cog and Chip-To-Chip communication features look useful.
The biggest constraining problem with the Propeller compared to other architectures is of course memory.. it looks constrained even when compared to old 8-bit micros. Propeller II has more hub memory, but it's still very limited to someone used to be able to just address the memory you need, and then only look to VM methods for truly large stuff. So Propeller II is better, but still constrained - it goes with the architecture I guess. The streaming external RAM handling will probably be essential in a lot of projects..
Tor, the constrain is for code, as for data you have access to full 128K . Not bad. As you probably have some cogs dedicated to do some kind of IO, they (at least some), as it has been proved time and again fit in 2kBytes. Large programs, well they are something that Spin partially takes care of. If you divide and conquer, this "limitation" goes partially away. Of course fully shared HUB memory from where opcodes are also fetched is the realm of some other multi-core processors (for instance cortex A9). Those need more power, resources and do not come in DIP packages (talking about Prop I here).
I love the chip-2-chip communication, but it should also support sending/receiving 8 and 16 bit values - which would allow it to be used for very easy, super-fast SPI to/from peripherals!
Cogs talking to each other? Excellent news. I have a very limited understanding of Assembly (still working on learning it), and from what I can see, indeed. "Beastly" is the only word that comes to mind when reading up on this.
My hat is off to Beau and Chip. Very impressive work guys.
Comments
Thanks Ken - I look forward to it!
Ross.
Ken Gracey
Without further ado, the Propeller II Preliminary Feature List (which contains the Propeller II's instruction set).
Enjoy!!!
========================================
http://www.parallaxsemiconductor.com/Products/propeller2specs
========================================
Great! Thanks, Daniel. A few people had been wondering what happened to the "open and inclusive" Parallax we all used to know and love. But now all is good again
Ross.
Took me a minute to figure it out, but I see a 16-bit multiply, so I'm happy!
I think they can leave off the "(0-511)" everywhere for D and S though. Isn't this understood?
I really don't see how "waitpeq" can be the same as Prop1...
I like the external ram instruction!
Don't see the point of chip-chip comms...
"...A few people had been wondering what happened to the "open and inclusive" Parallax we all used to know and love. But now all is good again..." - We've been sort of busy. :-)
So, the counter should be able to run for 1.3 million days at 160MHz before rollover...
Isn't self modifying code one of the good unique features of the Propeller?
Fun! It sounds like a tactic I learned in my OS class...
It's interesting how the terminology has changed from the Propeller 1. It seems that the Parallax employees have been reading up on datapath creation, and started using new (for the Propeller) terms such as "register", "FSM", etc.
Thanks !!
Quite a beast indeed! It will take quite a while to get my head wrapped around this one..... in fact at first blush it all looks a bit daunting, but I suspect that with time it will become manageable.
Sure will be fun to mess with though.
Cheers,
Peter (pjv)
Yes, there does seem to be an issue. I can open it, but it has crashed my Adobe reader once already. One trick with pdf readers (especially Adobe) is never to open a pdf in a browser - always download them and open them locally.
Ross.
Ross.
That's for PINC & PIND.
Also:
on SETPORD (our old friend copy & paste strikes again!)
Lastly:
Not sure if this is a typo or not - chip-to-chip comms may not be available on port C?
I used Adobe 10.1.1 in Google Chrome 14.0.835.202 for MS Windows 7. No problems so far.
Amazing Specs for Prop 2.
Propeller2DetailedPreliminaryFeatureList.pdf
ps: and really, I didn't change a bit here and a bit there. I take out a whole byte when I munch...
SRLM: Success - thankyou
The instruction to toggle a pin on or off...
The mnemonic OFFP seemed obscure/incorrect. I wonder if NOTP, XORP or TOGP may be more intuitive ???
There did not seem to be any hardware assist for receiving bitstreams within the counters. Did I miss something, has it just not made the specs, or is it not going to be possible ???
A few instructions will require better explanations later because I could not determine what they actually do, and their use.
There are a few really powerful instructions that will minimise code. For example the NOPX instruction will be great for timing data streams etc. The REP instruction (we knew about this) will be fantastic. The hub instructions with incrementing and caching options will remove a bottleneck, as will quad and 1in8 rather than 1in16 clock accesses too. And the ability to use the CLUT when Video is not used will also be a great addition.
All-in-all, it will be the great chip we are expecting
Thanks for posting this List of instructions.
Some of them still need some extra explanation but in first stage it is OK.
I have one more question to You/Chip -- as it is not clear from this List to find answer!
How many pins VGA will use ? 4-5 else more(and need them some predefined pin places else any of pins) . Next what type of Boot device is planed to be used and how many pins need be reserved for that?
http://www.rayslogic.com/Propeller/Prop2/Propeller2DetailedPreliminaryFeatureList-v1.2.html
a) I think I can see a 32*32 -> 64, but the divide is a little unclear, is that
a complementary 64/32 -> 32Q.32R
or a simpler 32/32 -> 32Q.32R
Q.R is great, as that allows fast modulus moths.
b) The Counter has Quadrature mode, which is great.
- but I can see no mention of any HW CAPTURE, and even external Divide from a Pin, is not clear ?
Why does this matter ? : You can get much better precision, and dynamic range, and lower power, if software tight polling is not needed.
With two 32 bit counters with capture ability, and atomic On.off control of the pair of flags (in same SFR)
and one counter clocked from High speed timebase and the other from any pin, you can build a very high precision,
and wide dynamic range counter.
One gives time, the other Cycles, and then Cycles/Time is Frequency. \
Precision is very high : At 180MHz and an (appx) 100ms refresh time, you resolve to 55ppb, 10ms refresh resolves to 0.55ppm, and 1ms refresh resolves to 5.5ppm. (1s resolves to 5.5ppb, and 10s can give 0.55ppb)
Sounds like this would have a very low added silicon cost ?
I wouldn't call it "good".. to me it's a necessary hack due to missing indirection handling via registers and this improvement is one I wished for in Propeller II, so I'm happy. :-)
- I like the 'Cog Memory Remapping' although I'm curious about where it maps to and from.. it doesn't say more about it, from a quick look at the document.
- The Cog-To-Cog and Chip-To-Chip communication features look useful.
The biggest constraining problem with the Propeller compared to other architectures is of course memory.. it looks constrained even when compared to old 8-bit micros. Propeller II has more hub memory, but it's still very limited to someone used to be able to just address the memory you need, and then only look to VM methods for truly large stuff. So Propeller II is better, but still constrained - it goes with the architecture I guess. The streaming external RAM handling will probably be essential in a lot of projects..
-Tor
I love the chip-2-chip communication, but it should also support sending/receiving 8 and 16 bit values - which would allow it to be used for very easy, super-fast SPI to/from peripherals!
Does anyone have any detail on the "Cog Memory Remapping"?
C.W.
My hat is off to Beau and Chip. Very impressive work guys.