Prop II info from the Webinar...
Cluso99
Posts: 18,069
The webinar finished 30 mins ago, with Chip's presentation the last. I understand the webinar will be posted but it is after 10pm at Parallax.
Here is what I recall...
It has been quite a learning curve with the layout. There are about 40,000 flip-flops in the Prop II. There were about 160*8=1280 in Prop I.
After the original chip layout simulation the critical path was showing only about 80MHz clocking. Chip has now refined the critical paths and it now looks like 180MHz.
There will be ~126KB Hub SRAM and ~2KB Hub ROM.
128 pins in QFP 14mm?
92 General purpose I/O
8 Cogs
64bit CNT register
Video will clock at ~230MHz
Maybe ~$12-$15 at launch
180nm
Expect the instruction set info to be posted on the forum shortly.
If the prop were done in 45nm then perhaps it would clock at 1GHz, have 2MB hub ram and 16 or 24 cogs. But this would require ~$1M+ for prototype layout costs vs ~$160K for 180nm. Anyone with a spare $1M ??? Could be some super ROI (return on investement) if you do! This could give the ARM a run for its money hey.
Perhaps we should start an account for Parallax to buy tickets in the lotto
Here is what I recall...
It has been quite a learning curve with the layout. There are about 40,000 flip-flops in the Prop II. There were about 160*8=1280 in Prop I.
After the original chip layout simulation the critical path was showing only about 80MHz clocking. Chip has now refined the critical paths and it now looks like 180MHz.
There will be ~126KB Hub SRAM and ~2KB Hub ROM.
128 pins in QFP 14mm?
92 General purpose I/O
8 Cogs
64bit CNT register
Video will clock at ~230MHz
Maybe ~$12-$15 at launch
180nm
Expect the instruction set info to be posted on the forum shortly.
If the prop were done in 45nm then perhaps it would clock at 1GHz, have 2MB hub ram and 16 or 24 cogs. But this would require ~$1M+ for prototype layout costs vs ~$160K for 180nm. Anyone with a spare $1M ??? Could be some super ROI (return on investement) if you do! This could give the ARM a run for its money hey.
Perhaps we should start an account for Parallax to buy tickets in the lotto
Comments
The Video runs on a separate clock?
Just remembered...
Each counter is able to do 2 PWM outputs. There is a lot of additional functions in the counters (understatement).
16x16 multiply in 1 clock; 32x32 multiply in 16 clocks; 32/16 divide in 16 clocks; Cordic ? clocks.
Prop II is looking pretty exciting!
180 nm works for me. I also like the projected introductory price. Kudos to Chip and Co.
Now where was that $1m+ I had laying around?... if only! cos it would be worth it!
and also Two quadrature counting channels.
Less clear on Capture, and overflow handling features ?
I hope more complete info on the counters goes up soon, so we can check they have not missed anything.
Being able to run the core slower than the Counters, would be nice for power saving.
With simple gate and steering done the right way, you can create a Auto-ranging reciprocal Frequency counter with two 32 bit counters,
with a common capture enable ( SW SFR flag AND with Edge ), and a CaptDone flag.
Such counters have very wide dynamic range (Hz to 10's MHz), with a fixed digits/second precision, so would make an ideal Obex..
32 bits is smallish these days, so a system like on the System counter of reading > 32 bits would give Prop 2 and edge.
Any update on timeline? (I'm guessing 6 months).
i recall Chip saying that the video can be loaded and another load can be done without having to do a waitvid - meaning you can have a waiting set loaded in advance. Video can be 1080p.
These counters are really going to be fantastic, along with the I/O pins.
No guarantees with first iteration that the fuses will work, nor code decryption. Neither for intracog high speed comms (between chips).
Wish I had a spare $1M
That $1M sounds cheap compared to what I thought Chip said. Didn't he say more like $3M? I guess it doesn't matter one way or the other if they win the lottery though. :-)
How about 90nm then, $500k (guessing) should not be hard to come up with.
12cogs
360mhz
512k sram, 32k rom
But maybe it's other technical issues arises when going smaller and Chip have to start from scratch.
Thanks for posting that!
OBC
Will they take a check?
Ken Gracey
I'm REALLY excited because I think the P2 may hit a price/performance point that will beat both GPU and FPGA arrays in my application.
If I win the lotto I would gladly sponsor the P3 (45nm version). And I don't think I would be the only one! IMHO the P3 would be an ARM killer for ipad clones and phones so long as the power consumption could be controlled. Nice to dream anyway
Ken: (OT) WOuld it be possible to get some sort of lower level block diagram of the counter logic (inc video logic) in the existing prop? I don't believe we have touched the surface of what these counters could be made to do, if only we just had more low-level info. I don't want to take Chip or Beau away from the PropII - could an FAE delve into this perhaps?
About other chip configurations and/or process technologies, Chip said something to the effect of, while those are interesting/exciting possibilities, the team needs to focus on following through with the current design, which, of course, makes sense and is what we have all been clamoring for. Still, I really like Tony's above-mentioned 12-cog, 512KB 90nm "compromise" design (i.e., the process technology between 45nm and 180nm) because the additional memory would be so useful for certain designs without requiring going off chip for more. I can't help but wonder what it would take to make that happen, maybe just a commitment to the change (and reduced pressure from us). It sounds like significant portions of the current design (memory elements, etc.) could be replicated and it sounds like their synthesis partner is flexible and used to working with bleeding-edge designs.
Not to belabor this topic (please don't stone me), but, we've waited this long, so I, for one (perhaps the only one), could tolerate a few months of delay for a significantly enhanced version. I say this because, even though Parallax Semiconductor now exists as an entity, it doesn't sound easy for them to come out with multiple versions of chips, considering their current level of resources and the overhead costs associated with each chip design. Moreover, technology has advanced so much that a more powerful chip might be better received in the market place. On the other hand, based on what Chip said, producing other versions should be much more feasible now that they have attached the capabilities of the outside synthesis company. But I also heard Chip ever-so-slightly muse for a split second about a 64-bit architecture (who knows, maybe with more cog register address space or perhaps a third instruction register per instruction (src1, src2 and dest)), and perhaps something like that would more naturally justify the effort and cost to move to a 45nm process. Such a small process technology perhaps is a more natural candidate for a Prop III than a suped-up version of the current Prop II design (although bigger companies often produce such large chip families). As such, it might be the case that a somewhat more powerful/flexible Prop II chip (such as one meeting Tony's wish list) would fit better between such a possible Prop III and the current Prop. On the other hand, if Parallax has or can ramp-up the resources to do various versions, then sticking with the plan makes complete sense, and, arguably, sticking with the plan makes sense even if they can't marshal such resouces, too, because a Prop II of the current design represents a significant new device in and of itself.
Lastly, of interest was Chip's comment that his increasing confidence in his team's ability to work with the synthesis company has led him to consider changes and/or features that he would have never comtemplated using only the old methods (as implementing them would have been impossible in practice), and that he had needed to unlearn some of the formerly applicable rules and/or expand his thinking. That's pretty interesting to me because we sometimes wall ourselves in unnecessarily without even realizing it.
I HATE marketing gimmicks like that. Intel/AMD do this, and it is a sign of companies not really wanting to innovate, but wanting squeeze the last bit of blood from stone by spending more to make crippled parts to sell for less.
One cost-reduced design possibility would be 48 I/O's, 4 cogs, 64KB ram. It would be 1/2 the die size, and fit TQFP-64
Frank
I think it makes a lot of sense... The market is very tight these days and they just said how much $$ and time it takes to create a new design. But, if you can use the same design for two products, you really save.
Plus, the customers benefit from having a choice. If they would sell more chips and make more money doing this, isn't that a win, win?
Maybe another way to go it to limit the operating frequency on one version.
Or, you could have a package with less I/O pins and increased pin spacing (easier to solder by hand).
One the other hand, Parallax does seem to stand out by having just one version of a chip.
We seem to be about eight weeks from completing the main synthesized logic block that forms the brains of the next Propeller chip. I don't know how long it will take from there to get the production chip out.
The mask cost for this 180nm process is about $150k. Currently, the design is synthesizing and laying out at 180MHz. That means 180 MIPS per cog, for a total of 1,440 MIPS per chip. I'm really pleased with how things are moving along. It's been a big learning experience. To put 180 32-bit MIPS into perspective for us old-timers, an Apple II would have taken (if I remember) eight instructions to add two 32-bit (4-byte) values together (existing in zero-page, for efficiency). Eight clocks at 1MHz would mean 125,000 32-bit adds per second. If you divide 180,000,000 by 125,000, you get 1,440. So, a single cog could be said to have 1,440 times the computational ability of an Apple II. And there are eight of those! And when it comes to multiplying, instead of 1,440x, the speed increase jumps to probably 60,000x.
For fun, I asked the company that is doing our synthesis work to pass our design through a 40nm-process design flow (TSMC 45G, which I mistakenly called '45nm' in the webinar). I was interested to hear how fast the design could run at 40nm. I was thinking it would top out at ~600MHz. It turns out that it closes timing at 1GHz! That's 1,000 MIPS per cog. Imagine 1,000 instructions every microsecond. If we were to build a version of the Propeller in this 40nm process, it would probably have 16 cogs and 2MB of hub RAM. Imagine 16,000 MIPS per chip! That's 100x the performance of the current Propeller chip. The only big roadblock to realizing this is the $3M required for the mask set.
Back to the current project... Below is a colored map of the currently-synthesizing 180nm logic block that includes the eight cogs and hub circuitry. Each color represents the circuitry of a particular cog. Nobody told the tools to make a pie. They just did that, since each cog's support memories are located in a circular pattern around the perimeter of the block, and each cog mainly connects to its own internal circuitry. Where they come together in the center, there is a lot of wiring congestion. At first, we tried to arrange the cogs as rectangular blocks arrayed left to right, with their memories overhead. It wouldn't route because of the many lateral wires required to connect them all together. This rotational layout is much better, because the cogs can converge in a common point and this reduces the heck out of the wiring required among them.
The dark cyan splotches in the bottom two pie slices belong to the cogs they are within, but because some logic paths were optimized, they lost the label associations that tied them to the cogs they belonged to. In this mass of logic, there are 378k standard cells and over 200k nets. The actual cell area is 8.05 square mm. The layout area is about 14 square mm to afford some interstitial spaces for buffering and the clock tree. It would take person forever to do this, let alone the optimization and path reduction to get the whole thing to meet timing requirements. It took their computers only several hours to do this (along with a few $M of software).
I am hoping that you will have something by Chinese New Years, but waiting is half the fun.
1ghz.....hmmmm, if every prop customer chipped in $20 or $50 how much could we raise? Think of it as open sourced funding or user community funding. It could take a bite out of the R&D cost for Prop 3 and our return on investment would be having the chip. The rewards of investment funding don't always need to be some % growth on your money. A Prop 3 has certain "intangible" benefits to many of us including growth and success for Parallax which really benefits all of us.
Open up the "Kickstarter" project. I'm in at the $50 level!
Still I don't get where is the market for a stripped down PropII? Because you will be competing directly with the likes of the M4 ARM's from ST and Freescale along with the offerings from TI and Microchip for market share.
If Parallax scores a decent design win with the Prop II then they'll have the cash to do the 1Ghz version. It will be interesting to see the Prop II going head to head with some of the ARM designs out there like the Da Vinci(which I think Parallax is targeting with the PropII).
Actually has anyone ever met a venture capitalist or group that would not demand a certain amount of control and guaranteed performance milestones? HHmmmm, neither have I. Would Chip make lots of money? Probably. Would he loose control of the company? Sharper players than he have. Would it be as fun for him? Hell no. He has a great product now, designed at the his pace for his own good reasons. Are we happy? Yes, to paraphrase Jim Kinkaid "but like children everywhere, prepared to ask for more". Hence the drooling or whatever over the prop 2.
Not having the Prop 2 right now will not kill the company, I can do stuff with it I can not do as easily as say a PIC, but for dsp or compute intensive the Prop is not my choice. Pick the most suitable part. Seems lots of people like the suitability of the prop as is; and when the prop 2 comes out will do the same. Maybe less the hobbiests understand that, but those doing this for a living (should) have this outlook cold. Or they quickly become hobby level.
Just my $0.02USD worth. By the way, who will be starting the release date pool????
Frank