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Getting started with FPGAs

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  • John A. ZoidbergJohn A. Zoidberg Posts: 514
    edited 2011-08-02 04:56
    @Heater: Thanks for the info.

    By the way, also, did the engineers plan the IC design by Behavioural or Structural context in HDL? :)
  • mindrobotsmindrobots Posts: 6,506
    edited 2011-08-02 06:26
    ...and with a bit of searching, I see there are some FPGA Forth engines......for those of us that march to different drummers!

    This is a fascninating topic and thread!

    Not many people seem to say say this: Thanks, Leon!
  • John A. ZoidbergJohn A. Zoidberg Posts: 514
    edited 2011-08-02 06:40
    Learning FPGA opens doors to a whole new kind of dimension too. :)
  • TorTor Posts: 2,010
    edited 2011-08-02 06:57
    Tor: For begineers, get a board with the peripherals like VGA port and SDRAM. You may spend less time wiring them and more time to concentrate on the development of the HDL.
    Thanks for the tip, much appreciated. I'll look for boards of that Cyclone II 'main board' style instead of the 'mini board' type then.

    -Tor
  • LeonLeon Posts: 7,620
    edited 2011-08-02 08:05
    A useful feature of the Mini board is the number of I/Os that are available. I think that the other boards only have 32 brought out to a connector.

    Here is my PCB mounted on the FPGA board. I've tested the two switches and the display with a simple design using schematic input and everything works. I used the internal weak pull-ups because I couldn't be bothered to look for a couple of 10k resistors. I've just added the other parts.
    1024 x 1107 - 139K
  • John A. ZoidbergJohn A. Zoidberg Posts: 514
    edited 2011-08-02 09:02
    I just wrote a Verilog program of a digital clock. Takes some time for me to get used to the coding.

    I'm going to draw up a 6502 (I know there are 6502s soft cores all around but I love to understand every each of it) later. :)
  • Dr_AculaDr_Acula Posts: 5,484
    edited 2011-08-02 16:46
    Would one of the FPGA experts be able to walk a newbie like me through these two boards:
    The "mini development" board http://cgi.ebay.com/Altera-CycloneII-EP2C5T144-FPGA-Mini-Development-Board-/200625047715?pt=LH_DefaultDomain_0&hash=item2eb62f48a3

    and what appears to be its big brother
    http://cgi.ebay.com/Altera-CycloneII-EP2C8Q208-NIOS-II-SOPC-FPGA-Main-Board-/190517842238?pt=LH_DefaultDomain_0&hash=item2c5bbf913e

    That second one has a mouse/keyboard, sd card, lots of ram, VGA etc etc.

    In fact, it is not dissimilar to some of the propeller boards in terms of "must have" peripherals.

    To a newbie, this looks like a mini computer. Is there software around that makes it easy to convert to such a computer? ie use the SD card, use the mouse, use the display? Have people taken these boards to the "text based operating system" level? Or even further, to the "GUI operating system" level?
  • John A. ZoidbergJohn A. Zoidberg Posts: 514
    edited 2011-08-02 18:40
    @Dr_Acula: There are Verilog/VHDL codes for each of the peripherals involved, and combining them would give you an 80s era mini computer, with simple VGA output and a processor.

    There are youtubes of Altera DE1 (From Terasic.inc) showcasing the abilities of the FPGA being a ZX Spectrum or some equivalent system.

    I'm planning to write a 6502-inspired processor with mul and div instructions.
  • LeonLeon Posts: 7,620
    edited 2011-08-02 18:45
    In the case of the second board, it mentions the NIOS II, which is a 32-bit processor designed by Altera for their FPGAs:

    http://www.altera.com/devices/processor/nios2/ni2-index.html

    That board has a lot of external memory and all the usual peripherals, which could be used for a GUI-based OS. I doubt if anyone has done that yet for that actual board, but it's probably been done for the similar boards available from other sources, such as the DE2 Altera board.
  • Pharseid380Pharseid380 Posts: 26
    edited 2011-08-04 06:26
    @Mr. Zoidberg: The 65C816 had 24-bit addressing, which would allow you to make use of the DRAM on an FPGA board. Still no mul or div, but it had a co-processor op-code, which has interesting possibilities.

    -phar
  • John A. ZoidbergJohn A. Zoidberg Posts: 514
    edited 2011-08-07 21:36
    I've just constructed a simple prototype of an 8-bit CPU, however it's only a very rough one and contains two instructions (immediate). If time allows, I would slowly add these instructions to resemble the 6502, at the very least.

    I'm now working on a VGA driver to display the registers on that CPU.
  • Dr_AculaDr_Acula Posts: 5,484
    edited 2011-08-07 21:49
    Dr Zoidberg, you make it sound so easy!
    I just constructed an 8 bit CPU and now I'm going to build a VGA driver

    I like your style!

    I've been brainstorming some ideas with using ram chips and displays. Does a FPGA solution for VGA store the video in the FPGA or in an external memory chip? How much video memory would you have?
  • John A. ZoidbergJohn A. Zoidberg Posts: 514
    edited 2011-08-07 22:01
    Dr_Acula wrote: »
    Mr Zoidberg, you make it sound so easy!

    I like your style!

    It's pretty difficult but solvable! I had to read the "Rapid Protoyping for Digital Systems" book and had to read the certain page over and over and over again to understand the concepts the book presented inside. The 8-bit CPU I constructed is a rough prototype, and it has only been "dry run" with pencil and paper, and no other simulations. All in just a weekend, I'd say. Clock cycles and stuff haven't been all tested - all I need is a proper execution of instructions before I test all these. The processor I made is 6502-inspired, so the pipelining and the other sophisicated stuff will not be inside for now. :)

    Here's a test program I dry run (as a test, 0001h is instruction "load accumulator with an 8-bit number", and 0002h is instruction "add accumulator with an 8-bit number")

    0000 0001 ;lda #1
    0001 0001
    0002 0002 ;adc #1
    0003 0001

    The accumulator inside is a 2, a result of 1+1.
    Does a FPGA solution for VGA store the video in the FPGA or in an external memory chip? How much video memory would you have?

    Better still, the video RAM must be placed outside the FPGA, which is the SDRAM or the SRAM. I intend to place the character generator ROM outside the FPGA once it's all done, maybe on a parallel ROM or an SPI-based ROM.

    I can't be sure whether the FPGA of mine can store temporary 640x480 pixels inside or not. I have to depend on the SRAM inside if I have to draw something big.
  • TorTor Posts: 2,010
    edited 2011-08-08 05:43
    My own FPGA dev. board (with RAM and VGA and KBD flash and all bells&whistles, I believe it's the same as the one Zoidberg got) is in the mail, or will be soon I hope. In the meantime I can only wait, and read the forum. Can't wait, really.

    -Tor
  • LeonLeon Posts: 7,620
    edited 2011-08-08 07:13
    You can download the Quartus II software and play with it. :)
  • TorTor Posts: 2,010
    edited 2011-08-08 07:23
    Leon wrote: »
    You can download the Quartus II software and play with it. :)
    Already did, back when you first started the topic :-)
    But I haven't tried it yet - too much other real hardware to fiddle with, and I only just recently came up with ideas for what to start with for my initial FPGA testing.

    -Tor
  • LeonLeon Posts: 7,620
    edited 2011-08-09 02:35
  • Dr_AculaDr_Acula Posts: 5,484
    edited 2011-08-09 04:22
    Wow, this opens up some possibilities.

    First impression - well we have Pullmoll's Z80 emulation running games in color too, like pacman. So all things being equal, is a FGPA less powerful, equal, or more powerful than a propeller? I see the clock is 35Mhz which is a bit faster than the effective speed the prop Z80 emulation ran at (about 2Mhz).

    Could you synthesize multiple micros on one FPGA - eg a complex main micro with ram, a dedicated display driver micro with ram, and 'support' devices that are simpler that do things like buffer a keyboard, a uart with a decent buffer, buffer a mouse?

    Could you synthesize not one, but multiple copies of a zog?

    Could you emulate some pasm instructions in a 32 bit micro (tweak an existing core, because some instructions are likely to be similar).

    Could you synthesize a propeller? (or if not, just a cog, but maybe a cog with more memory)?

    There *must* be some clever board design that combines the best of the FPGA and the Propeller to do something really nifty!
  • LeonLeon Posts: 7,620
    edited 2011-08-09 04:37
    All that is feasible, including the emulation of a cog. The FPGA Z80 emulation will be much faster than one running on a Propeller.

    Ale has a Xilinx FPGA and Propeller on one PCB, he gave me one of his boards. I started doing something like it a long time ago, but there didn't seem to be much interest in it. Ale found the same.
  • Tom.in.MarylandTom.in.Maryland Posts: 17
    edited 2011-08-09 04:58
    Tom.1.jpg

    Whats frightening is the hundreds of pinheaders. It would be nice to have a concise table of what the pinheaders are and do?
    96 x 96 - 4K
  • Tom.in.MarylandTom.in.Maryland Posts: 17
    edited 2011-08-09 05:11
    Tom.1.jpg

    Leon its a personal preference but I like excel spreadsheets identifying the pins or pinheaders in this case. May I suggest see attached...
    example_excel_pinout_1a.jpg

    pencil.png
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    96 x 96 - 4K
  • LeonLeon Posts: 7,620
    edited 2011-08-09 05:21
    Yes, they can be useful. I use them when I'm creating a PCB, and both Xilinx and Altera have spreadsheets for their FPGA pins.
  • Dr_AculaDr_Acula Posts: 5,484
    edited 2011-08-09 07:24
    All that is feasible, including the emulation of a cog. The FPGA Z80 emulation will be much faster than one running on a Propeller.

    Very exciting to hear. I'm still trying to get a feel for what the FGPA can do. Clearly it can do more than a prop, but at the same time, it is more expensive. I'm interested in what you get for the extra dollars. You can do one Z80 core. Can you do two?

    Re a cog emulation, is that something that can be done in theory, or has someone actually coded in cog instructions? If so, do all the instructions work (like waitvid) or is there a subset that works?
    Ale has a Xilinx FPGA and Propeller on one PCB, he gave me one of his boards.

    Cool. Did it use a number of pins for a data link?
    I started doing something like it a long time ago, but there didn't seem to be much interest in it. Ale found the same.

    That was unfortunate.

    But! Now we have this nifty thread with the great tutorial and the link to the reasonably priced boards on ebay. Things have changed. This is very exciting.

    Re adding external memory, if you had a main CPU it seems that needs external memory. But it probably makes sense for any video memory to run separately. So - are there enough pins to run two external memory chips?
  • Heater.Heater. Posts: 21,230
    edited 2011-08-09 07:55
    Dr_A,

    Some FPGAs are pretty huge and could probably handle two or more Z80s. However as far as I can tell the price gets huge as well.
    Someone here had a cog, or at least partial cog, running in an FPGA a year or more ago. Written in Verilog if I remember correctly.

    Strangely enough one of my first thoughts when this thread started was to put multiple Zogs into and FPGA, well ZPU cores really, along with shared external RAM via a HUB like access mechanism. Sort of "zogeller".
  • LeonLeon Posts: 7,620
    edited 2011-08-09 09:02
    I built the Z80SoC from OpenCores, with the following results:

    Total combinational functions 2,652 / 18,752 ( 14 % ) Flow Status Successful - Tue Aug 09 16:53:53 2011
    Dedicated logic registers 669 / 18,752 ( 4 % ) Quartus II Version 11.0 Build 157 04/27/2011 SJ Web Edition
    Revision Name z80soc
    Top-level Entity Name TOP_DE1
    Family Cyclone II
    Device EP2C20F484C7
    Timing Models Final
    Total logic elements 2,782 / 18,752 ( 15 % )
    Total registers 669
    Total pins 281 / 315 ( 89 % )
    Total virtual pins 0
    Total memory bits 196,600 / 239,616 ( 82 % )
    Embedded Multiplier 9-bit elements 0 / 52 ( 0 % )
    Total PLLs 1 / 4 ( 25 % )

    The EP2C20F484C7 is an Altera Cyclone II device, and isn't all that big. The main problem with putting two of them in the same device is the number of pins used and the number of memory bits. Z80SoC was designed for the Altera DE1 board, uses lots of stuff that isn't strictly necessary, and could be stripped down a lot.
  • TorTor Posts: 2,010
    edited 2011-08-09 12:27
    An 8080 would probably be smaller. I'm only guessing though, because I don't know if an FPGA design is equal in complexity to an emulator. But at least as far as emulators go 8080 can be made much smaller than any Z80 emulator I'm aware of (not that I know all of them). The Toledo2 8080 emulator is small enough to print on a T-shirt (well, in its full obfuscated mode at least), and it runs CP/M. I guess I could have included it in a code section here without causing offence for size..

    -Tor
  • LeonLeon Posts: 7,620
    edited 2011-08-09 12:35
    Yes, it would be a lot smaller.

    More interesting computers were based on the Z80, though, and many of them have been emulated on FPGAs.
  • ColeyColey Posts: 1,110
    edited 2011-08-10 06:53
    Heater. wrote: »
    Dr_A,

    Some FPGAs are pretty huge and could probably handle two or more Z80s. However as far as I can tell the price gets huge as well.
    Someone here had a cog, or at least partial cog, running in an FPGA a year or more ago. Written in Verilog if I remember correctly.

    Strangely enough one of my first thoughts when this thread started was to put multiple Zogs into and FPGA, well ZPU cores really, along with shared external RAM via a HUB like access mechanism. Sort of "zogeller".

    Nutson did the FPGA core iirc
    http://forums.parallax.com/showthread.php?107829-FPGA-based-soft-CPU-(distant-relative-of-COG)&highlight=nutson+fpga+core
  • LeonLeon Posts: 7,620
    edited 2011-08-12 09:55
    This project for my little user interface board implements the 7-segment decoder from the Hamblen book:

    http://www.leonheller.com/FPGA/Test.zip

    It's driven from a four-bit Megafunction lpm_counter and the 1 Hz output from the clock divider in the book.

    When I first tried it I got garbage on the display. I quickly realised that I was using a CC display, whereas the code in the book was for a CA display, so I inverted all the bit patterns. I also modified the clock divider for a 50 MHz input. It counts up from 0 to F. I'll add a shift register with debounced buttons so that I can use it for data entry and display with my version of the 8-bit CPU in the book.
  • TorTor Posts: 2,010
    edited 2011-08-12 13:58
    My CycloneII dev board arrived today (the version with all the bells&whistles (RAM/VGA/etc). Now I just have to figure out how to actually use the hardware! ;) It didn't come with any printed docu, but I got a download link for 50 compressed megs of demo projects and data sheets for the parts. No actual user manual afaict, but I just quickly looked it over. For now I think I must put it on the side while I use my limited evening time to finish soldering my Dracblade.

    -Tor
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