Wired up the USB-C. Was reading that the main benefit is being able to get cable connected on first try. Seems takes average of 3 attempts with micro-B...
Also, adding a little header for power, but also BCD output from FT231X along with VBUS.
Never tried it before, but supposedly if USB connected to charger the BCD output will turn on and enable up to 1.5 A for charging.
Could be useful for battery powered applications, so can charge and program over same port (with some extra hardware)...
Also reading that if connected to USB3 port, have 900 mA instead of 500 mA.
Shoot, need to add power enable signal to above so, can take advantage of that option...
Problem is the polyfuse protection currently limits input to 500 mA.
Just changed +5V to PWREN on header above. This way, can just use a P mosfet to get an extra 400 mA, if know using USB 3.0..
@Rayman said:
Wired up the USB-C. Was reading that the main benefit is being able to get cable connected on first try. Seems takes average of 3 attempts with micro-B...
It's also quite a bit sturdier. I don't think I've ever seen a USB-C connector bent out of shape or otherwise horribly destroyed. Also it appears that some through-hole Type-C receptacles are being made, which I don't think exist for micro-B. That's another step-up on build quality that's possible there.
Hi @Rayman, Do you have a feature list for your board?
I think it's going to have more PSRAM and a 4bit SDIO and USB-C and the P2-EVAL core P2 layout, is there anything else to note that is also changing? How's the pin IO mapping looking for this right now?
@rogloh It's become more basic with VGA, stereo, and USB replaced by Eval style headers.
But, there are two main additions, one being the 4-bit SD card interface.
The other is copying the core as close as possible from Eval, Rev. B.
Also, looking at Rev. C, although this one has 5 mil vias instead of 8 mil, which might be hard to get made...
Like Eval B, using 8 mil vias behind the pins to bring P2 I/O out on layer #3. Also, putting the 0402 caps all around.
Hoping that this close clone will get me more reliable overclocking...
USB programming port changed from micro-B to USB-C. Seems to be the new standard.
Added an 8-pin header to give access to USB power enable and battery charge detection signals from FT231X chip.
power enable can but used to get an extra 400 mA if connected to a USB 3.0 port.
Battery charge detection can be used to get 1500 mA for battery charging type applications if USB is connected to a USB charger.
Copied Sparkfun approach of giving the option to have USB-C shield being isolated. Not really sure when you'd use it, but it's there.
Also remembered this time to provide a solder bridge to disable the USB reset, for when it's ready for final use.
PSRAM is mostly the same, but moved to top layer. Data pins are same, but control pins moved from below data to above data.
It's a wiring jungle under there. Wasn't 100% sure could make it work again, but seems to be OK.
I'm imagining that it was this wiring that pushed Parallax to go 6-layer for Edge with PSRAM...
The "platform" style header has two less I/O. Most of this I/O is used for PSRAM, so not so useful if PSRAM is installed perhaps.
Although, PSRAM seems to not interfere with other uses of these pins as long as not enabled.
Of course, adding things here may reduce PSRAM performance.
The last 6 I/O pins, next to the power pins are not connected to PSRAM and are free, P52 to P57.
Although, P56 and P57 are connected to the QWIIC connector for easy I2C interfacing.
The Eval headers should match those of Eval board, so that something using all three headers should work on both.
Not giving the option of replacing a 5V with reset for WX, but might revisit that...
Main reason for replacing VGA/USB/stereo with headers was because want to get going with 4.3" and 5.0" VGA resolution LCDs.
This needs a lot of pins and want to use PSRAM at same time...
Also, now that there's HDMI audio, might want to use HDMI instead of VGA, or switch between more easily.
The power circuit is hopefully improved a lot by again copying from Eval. B/C.
Instead of a 3.3 V buck and a few LDOs, now have 3.65 V buck that feeds 8 LDOs, one for each pin group.
The 1.8 V feed to core is also copied from Eval. B/C.
Hopefully, all these changes to the core will finally give the overclocking looking for.
Here are the Eagle source files for how it currently stands.
Need to clean up labels, and also add a lot of ground vias to connect top and bottom layers.
Getting close to finding out how hard it will be to get this made....
Note: The "width" of the layer#3 ground polygon needs to be increased from "0" to something bigger in order to create the Gerber files (that aren't enormous)...
One thing not currently copying from Eval is the trace length equalizing squiggles to the I/O headers.
Might revisit that if becomes an issue down the line...
Getting less than enthusiastic responses for quote requests with the blind vias.
Pivoting now to all through vias and hope the other changes are enough to improve overclocking...
@Rayman said:
Getting less than enthusiastic responses for quote requests with the blind vias.
Pivoting now to all through vias and hope the other changes are enough to improve overclocking...
Blind vias are niche, but I can see their appeal if you wanted to literally bolt the bottom of the board to a heatsink, or heatsink + fan.
Otherwise, for the same $, you might as well just get thicker copper, which helps use the whole PCB as a radiator.
I believe fully flexible blind vias need a lot more passes to manufacture the boards. Basically it's a round of gluing and plating per layer. Otherwise any number of layers can be done in two passes - With double sided being a single pass.
Not that I know for sure.
In theory, some layers can have blind or half blind while still utilising the cheaper manufacturing. You'd need to get the details of which combinations are okay from the specific manufacturer.
@Rayman said:
2oz copper might compensate for missing blind vias, have to try that. Didn't help before, but maybe will now...
One gotcha there.. be sure to check the fab specs for minimum hole/annular, and also trace specs, vs copper thickness. So as you increase copper thickness, you'll need (or might need) to adjust other sizes in your layout.
Which likely will lead to re-checking trace/via size & spacing/etc.. for coupling and/or impendence changes that might be relevant to certain signals.
It's all a bit of a fun dynamic jigsaw!
Like that this one and the Sparkfun one have extra two posts to secure it to PCB. Most don't seem to have that feature.
Maybe it's overkill with four through feet that are soldered to ground.
Probably should research this a bit more to find a layout that works with connectors from multiple vendors...
@Rayman said:
Got prototype PCBs, but not the stencil
Might have to try to build without a stencil.
Have you got a laser cutter ?
I've been known to use a thick stock of regular copier paper (200g - 250g sort of range), and cut a stencil with LightBurn.
Usually good for 4 or 5 PCBs. Also super handy when you need to stencil one part on a busy board.
Comments
Wired up the USB-C. Was reading that the main benefit is being able to get cable connected on first try. Seems takes average of 3 attempts with micro-B...
Also, adding a little header for power, but also BCD output from FT231X along with VBUS.
Never tried it before, but supposedly if USB connected to charger the BCD output will turn on and enable up to 1.5 A for charging.
Could be useful for battery powered applications, so can charge and program over same port (with some extra hardware)...
Also reading that if connected to USB3 port, have 900 mA instead of 500 mA.
Shoot, need to add power enable signal to above so, can take advantage of that option...
Problem is the polyfuse protection currently limits input to 500 mA.
Just changed +5V to PWREN on header above. This way, can just use a P mosfet to get an extra 400 mA, if know using USB 3.0..
Also switching the reset button to a full size button, like Eval.
Like the idea of the tiny reset switch, but just doesn't feel good.
Moving switch to the edge of board too, so can be pushed more easily...
It's also quite a bit sturdier. I don't think I've ever seen a USB-C connector bent out of shape or otherwise horribly destroyed. Also it appears that some through-hole Type-C receptacles are being made, which I don't think exist for micro-B. That's another step-up on build quality that's possible there.
It's all wired up and mostly passes DRC...
Moved PSRAM to the top layer...
Hi @Rayman, Do you have a feature list for your board?
I think it's going to have more PSRAM and a 4bit SDIO and USB-C and the P2-EVAL core P2 layout, is there anything else to note that is also changing? How's the pin IO mapping looking for this right now?
@rogloh It's become more basic with VGA, stereo, and USB replaced by Eval style headers.
But, there are two main additions, one being the 4-bit SD card interface.
The other is copying the core as close as possible from Eval, Rev. B.
Also, looking at Rev. C, although this one has 5 mil vias instead of 8 mil, which might be hard to get made...
Like Eval B, using 8 mil vias behind the pins to bring P2 I/O out on layer #3. Also, putting the 0402 caps all around.
Hoping that this close clone will get me more reliable overclocking...
@rogloh This is the 4-bit uSD circuit, which think is near exact copy of yours, some values are subject to change though.
USB programming port changed from micro-B to USB-C. Seems to be the new standard.
Added an 8-pin header to give access to USB power enable and battery charge detection signals from FT231X chip.
power enable can but used to get an extra 400 mA if connected to a USB 3.0 port.
Battery charge detection can be used to get 1500 mA for battery charging type applications if USB is connected to a USB charger.
Copied Sparkfun approach of giving the option to have USB-C shield being isolated. Not really sure when you'd use it, but it's there.
Also remembered this time to provide a solder bridge to disable the USB reset, for when it's ready for final use.
The bottom layer is now mostly unbroken copper gnd. Not quite as good as Eval.B, but close...
Should be much better for thermals.
Copied the via array pattern under the ground pad from Eval.C.
Top layer also copied a lot from Eval. B/C. Now with ground fill too.
Reset button enlarged and moved to edge of board.
PSRAM is mostly the same, but moved to top layer. Data pins are same, but control pins moved from below data to above data.
It's a wiring jungle under there. Wasn't 100% sure could make it work again, but seems to be OK.
I'm imagining that it was this wiring that pushed Parallax to go 6-layer for Edge with PSRAM...
The "platform" style header has two less I/O. Most of this I/O is used for PSRAM, so not so useful if PSRAM is installed perhaps.
Although, PSRAM seems to not interfere with other uses of these pins as long as not enabled.
Of course, adding things here may reduce PSRAM performance.
The last 6 I/O pins, next to the power pins are not connected to PSRAM and are free, P52 to P57.
Although, P56 and P57 are connected to the QWIIC connector for easy I2C interfacing.
The Eval headers should match those of Eval board, so that something using all three headers should work on both.
Not giving the option of replacing a 5V with reset for WX, but might revisit that...
Main reason for replacing VGA/USB/stereo with headers was because want to get going with 4.3" and 5.0" VGA resolution LCDs.
This needs a lot of pins and want to use PSRAM at same time...
Also, now that there's HDMI audio, might want to use HDMI instead of VGA, or switch between more easily.
The power circuit is hopefully improved a lot by again copying from Eval. B/C.
Instead of a 3.3 V buck and a few LDOs, now have 3.65 V buck that feeds 8 LDOs, one for each pin group.
The 1.8 V feed to core is also copied from Eval. B/C.
Hopefully, all these changes to the core will finally give the overclocking looking for.
Here are the Eagle source files for how it currently stands.
Need to clean up labels, and also add a lot of ground vias to connect top and bottom layers.
Getting close to finding out how hard it will be to get this made....
Note: The "width" of the layer#3 ground polygon needs to be increased from "0" to something bigger in order to create the Gerber files (that aren't enormous)...
Confused myself for a second by changing layer colors...
Under the P2 chip is mostly ground now and connected to the GND vias under the ground pad.
Also borrowed heavily from Eval.
One thing not currently copying from Eval is the trace length equalizing squiggles to the I/O headers.
Might revisit that if becomes an issue down the line...
Getting less than enthusiastic responses for quote requests with the blind vias.
Pivoting now to all through vias and hope the other changes are enough to improve overclocking...
Just heard from GoldPheonix that they can make the blind via version. But, going to try without them first anyway...
Blind vias are niche, but I can see their appeal if you wanted to literally bolt the bottom of the board to a heatsink, or heatsink + fan.
Otherwise, for the same $, you might as well just get thicker copper, which helps use the whole PCB as a radiator.
I believe fully flexible blind vias need a lot more passes to manufacture the boards. Basically it's a round of gluing and plating per layer. Otherwise any number of layers can be done in two passes - With double sided being a single pass.
Not that I know for sure.
In theory, some layers can have blind or half blind while still utilising the cheaper manufacturing. You'd need to get the details of which combinations are okay from the specific manufacturer.
2oz copper might compensate for missing blind vias, have to try that. Didn't help before, but maybe will now...
Added 2 of 4 holes for a 50 mm fan, just in case that is needed...
Guess should add header for 5V fan power...
One of these types of gizmos can be handy to control fan speed from temperature if you need one to be quiet - this one is for 12V but they can be modded or find a 5V one. I found some for cheap on AliExpress too.
https://fullbattery.com/products/4pin-pwm-fan-temperature-thermostat-speed-controller
One gotcha there.. be sure to check the fab specs for minimum hole/annular, and also trace specs, vs copper thickness. So as you increase copper thickness, you'll need (or might need) to adjust other sizes in your layout.
Which likely will lead to re-checking trace/via size & spacing/etc.. for coupling and/or impendence changes that might be relevant to certain signals.
It's all a bit of a fun dynamic jigsaw!
Lot's of online tools and calculators around nowadays, but to share what I tend to use... The Saturn PCB Toolkit
https://saturnpcb.com/saturn-pcb-toolkit/
Just realized this USB-C connector is somewhat special...
Seems not stocked at Digikey or Mouser.
Appears have to order from Sparkfun. And, they only have 25 left....
Might have to explore other options...
Got prototype PCBs, but not the stencil
Might have to try to build without a stencil.
Will not be so fun...
This replacement for the Sparkfun USB-C works when the board side two feet are snipped off.
https://www.digikey.com/en/products/detail/jae-electronics/DX07S016JA1R1500/11585731
Like that this one and the Sparkfun one have extra two posts to secure it to PCB. Most don't seem to have that feature.
Maybe it's overkill with four through feet that are soldered to ground.
Probably should research this a bit more to find a layout that works with connectors from multiple vendors...
Have you got a laser cutter ?
I've been known to use a thick stock of regular copier paper (200g - 250g sort of range), and cut a stencil with LightBurn.
Usually good for 4 or 5 PCBs. Also super handy when you need to stencil one part on a busy board.