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Simplest P2 Schematic Reference... — Parallax Forums

Simplest P2 Schematic Reference...


I was wondering if there was a "hello world" type schematic for the P2 like there is for the P1?
I realize the P2 is far more advanced but what I'm looking to do is add a P2 to a prototype SBC I am working on.

Basically, the P2 would mostly just have headers to the I/O pins.

Thanks for any information!


  • Check out the schematic for the P2EDGE module:

  • evanhevanh Posts: 14,038
    edited 2023-01-25 00:29

    I gather you don't want to use the Edge Cards. There is however already a few existing such designs where it's mainly just power management. PeterJ's one never eventuated. Probably the most exciting being the Stamp -
    There is the KISS also - It has the advantage of being header compatible with the Eval accessory add-ons.

  • roglohrogloh Posts: 4,688
    edited 2023-01-25 01:13

    I made an alternative to the P2D2 (which as we all know ended up as a no show), and my version was reasonably simple, though probably not quite as simple as the KISS board however. Schematic is here and may possibly be of some use to figure out what sort of connections are needed. I wouldn't call it a reference schematic, although it worked.

    You can ignore the optional outlined stuff I included and would need to decide on your own power section as the handy TI switching regulator parts I originally used now still have extremely long lead times following Covid shortages etc. Hopefully there are better alternatives by now.

    With the P2 you mainly need to decide whether you want to use LDO regulators and/or switching regulators for your power needs, and whether you will need to boot from SD or just flash for any pullup/down registors, and whether you want an oscillator or crystal. Not that much else to figure out really as far as the P2 itself goes as it's fairly simple electrically. Just be sure to put in "enough" bypass caps for your needs. I fit 16 100nF caps on each voltage rail, close to each of the P2 supply pins, maybe you could use less or just depopulate some afterwards. The PLL supply on VCCIO28-31 is potentially sensitive too and may need more bypassing or even an LDO regulator. I just put an additional 10nF cap there and it was okay.

    Also be aware that the P2 can draw a lot of current on its rails at high frequencies (eg. >300MHz) with high loads (all COGs heavily loaded, accessing egg-beater HUB RAM, and doing lots of IO activity etc). If you run this high you may require more than 2-3A at 1.8V. This affects both power design and thermals.

  • It also has to be noted that most schematics don't show a part number for the boot flash ROM. There is a timing issue in the boot loader and not every SPI flash IC is actually working, so you have to carefully select one. There is a discussion about this topic:

  • @cbmeeks said:
    ...what I'm looking to do is add a P2 to a prototype SBC I am working on.

    Basically, the P2 would mostly just have headers to the I/O pins.

    If I understand your desire correctly maybe you just need only to take care of sourcing the power to the P2 the right way (two voltages an plenty of decoupling capacitors) and skip the flash and crystal feeding the P2 with clock and boot image from the core part of your sbc ?

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