@jmg - Cluso99 and I are always stirring you to roll up your sleeves and give it a go, bake the cake, and let us taste the result.
The cook with his head in the book will always come up with plenty of ideas, but it's the cook slaving over a hot oven that comes up with plenty to eat!
See the examples already posted above
It's a quite strange thing to demand 'eat' in a P2 thread - do you and Cluso99 imagine I can somehow magic up a P2 before one even comes out of the fab ? rofl.
I have posted PCB examples, and confirmed a pathway into KiCad - not sure what else is really even possible ?
@jmg - Look Jim, I've known you for a long long time from early usenet days, especially in regards to 8051 architecture although you probably don't have as much to do with this stuff these days. We didn't say anything at all about coming up with a P2, just come up with something. As a Kiwi, like Aussies, you should be familiar with what "stirring" is, and where it comes from, your "mates" (peers).
It's like this, if I sit back and wait for someone else to do something, I can always come up with all this "why don't you do this or that" and generate lots and lots of words and "helpful suggestions". Imagine though if you were to get some cheap little micro and write or test and adapt a beautiful little USB serial HID for it with some extra features including software handshake etc. Even if you evaluate actual chips themselves. Then while we've been busy cooking up dinner, you have in effect made dessert, and we can all sit down and enjoy the fruits of our labors together, not just now, but for a long time. That's all we're trying to say because you always seem to have a lot to say.
... Imagine though if you were to get some cheap little micro and write or test and adapt a beautiful little USB serial HID for it with some extra features including software handshake etc. Even if you evaluate actual chips themselves. ...
Maybe you missed the HID example screen shots I posted earlier ?
I'm still waiting on a reply from Silabs on an update of their HIDtoUART for the EFM8UB3, as that's the 'new design' go-to device.
That said, HID does seem to have a throughput issue, as the packet size I've found mentioned is not large. Might not be the best P2-match ?
I've also mentioned the CH55x series, but my Chinese is not great, so I may defer to those more fluent in Chinese...
Well Jim, I know I'd really be happy to use one of those little Silabs chips - wwith break detection to issue a reset! Or even translate a hex file to a format for the Prop loader....
I'm really not sure one needs to 'bring a dish' to participate in this hardware thread. It may be better 'manners' but I hope it's not a prerequisite
Anyway I propose to 'bake' some of these prototypes in the local pcb fab next week, anyone else interested in a share of the available FR4 2 layer real estate?
So here's the photos on how to adapt from one 40 pin format to another, inline and almost without limitation*.
My technique consists of
- standard male 40 pin DIL header
- magic pcb
- laser cut insulating strip
- special female 40 pin DIL socket (sometimes referred to as passthrough style)
Here's a photo of the end profile showing the back lasercut plastic in between two headers.
And here's a photo of a stack of them. As you can see the alignment is preserved. Male/female combo threaded spaces can be used to stack to arbitrary height.
And finally the PCB layout. These are Pi hats, each hat takes 1 pin from the GPIO at the right hand end of the header, ie GPIO 5,6,12,13,16,19,20,21,26, and the remaining gpio shuffle down. Think of them as chip selects for SPI communication, though they don't necessarily have to be that.
- the first hat plugged in takes GPIO5
- the second hat plugged in takes GPIO6,
- third hat plugged in takes GPIO12, and so on up to GPIO6
Not all signals 'shuffle down' - in fact most are global buses. The technique is generic and can be applied to any mapping, subject to available PCB space for track routings. But 6 mil track and space gives 3 adjacent signal lanes * 3 rows * 2 layers = 18 signal routings, while remaining inside the 0.4"x2.0" overall footprint, which is generally plenty
I initially planned to do this with the quickstart header many years ago, but hit some resistance from obc and Ken. Yes it complicates things, but there are significant benefits.
It'd be trivial to apply these techniques to adapt Peter's headers to Pi / beaglebone format.
* you need a bit more space to accommodate the wider female socket legs, hence the extra 50 mil at back.
.... We didn't say anything at all about coming up with a P2, just come up with something. As a Kiwi, like Aussies, you should be familiar with what "stirring" is, and where it comes from, your "mates" (peers)...
? Not sure where this is coming from. No "stirring" from this end at all.
What I do here is simply focused on More users, Easier use, Better documentation, & more flexible HW (again, that expands the user base).
I know you use Protel99, and that's fine, we use what we know. However, Protel99 is very old, rare, and not available to many users. ie Not an ideal Publishing platform.
So, I have checked your PCB can load into KiCad. KiCad V5 is close to release, and certainly will be released before P2 is.
KiCad is open source, and growing in popularity, so is looking to be an ideal vehicle for P2 publishing.
This PCB is already above DipTrace free limit.
It might fit into Free Eagle, at least in a 2 layer version. That would also be useful as KiKad has a full Eagle SCH/PCB project import.
Then, I write a script to export & import the netlist. Why, you may wonder ?
Because the PCB comes in via translation, you need to be able to check for differences in revisions. Kicad NET import generates design difference/change reports.
This round trip test can also catch 'not quite kosher' database issues, in a design. Those would affect most other CAD paths, so are also worth catching early.
That script did find issues in your original PCB design, which are now mostly fixed. (tho I see P2.PAD is still tagged P in SCH, but G in PCB )
There are still some pin-out and labeling issues (as mentioned) - not electrical issues, but they are future documentation/use issues.
a) 0.1" headers should really be 40 pin, not 2x20 pins. Why? : Much easier to document (and Pi uses 1x40, not 2x20)
b) Vcc & (Pxx MOD 32) pins should be on the same pins on both connectors. Why ? Fairly obvious, so you can same-plug into either
c) To allow right angle connectors, Pin2's should be top left / bottom right. (RaspPi does this) Why ? Pins face out, correctly labeled.
Those are the sorts of things that are best fixed early, to avoid spawning bad clones...
There are no P2's for quite a while, so there is time to get a solid breakout base design done, one that can support many form factor Xtals and Oscillators, as those vary in the field.
More exploratory, is looking at RaspPi slave/replacement. See PCB images above of that.
Given RaspPi sales will pass 20 Million (!), before P2 ships, some RaspPi support certainly delivers on 'More users' & Pi displacement use is viable...
I have placed and confirmed routing to a Pi connector - looks to be a low-cost addition to me. PCB size is already very close.
PCB can also fit a castellation edge, next to the Pi connector, keeping same edge as pi
What is surprising/disappointing is with all the above contributions, you still claim "just come up with something" ?!
Q: Has anyone tried Protel99 to Eagle(free) ? This forum post suggests it is possible ?
KiCad has a now-quite-good import from Eagle SCH and PCB so this double-hop path could give a means to convert Protel99 schematics to KiCad.
I think it is saying it needs Accel format (PCAD ASCCII) for both. (PCB in PCAD ASCCII can come directly into KiCad)
@jmg please go make you own pcb. That way, you can make it Pi compatible, use a quad or octal spi flash, use switcher power ics, have your crystal/oscillator options, use a micro for the serial to USB, etc, etc, etc, etc. you can be the master!!!
Seriously, it's high time you did something instead of suggesting to others what they should do.
@jmg please go make you own pcb. That way, you can make it Pi compatible, use a quad or octal spi flash, use switcher power ics, have your crystal/oscillator options, use a micro for the serial to USB, etc, etc, etc, etc. you can be the master!!!
Seriously, it's high time you did something instead of suggesting to others what they should do.
These quite strange prescriptive demands on others, by you and Peter, risk turning P2 forums into a clique - Are you really saying all the items I've listed above, are "nothing" ?
A forum is usually intended for discussion - yet now you want to dictate what is allowed, and by whom ?
@jmg please go make you own pcb. That way, you can make it Pi compatible, use a quad or octal spi flash, use switcher power ics, have your crystal/oscillator options, use a micro for the serial to USB, etc, etc, etc, etc. you can be the master!!!
Seriously, it's high time you did something instead of suggesting to others what they should do.
These quite strange prescriptive demands on others, by you and Peter, risk turning P2 forums into a clique - Are you really saying all the items I've listed above, are "nothing" ?
A forum is usually intended for discussion - yet now you want to dictate what is allowed, and by whom ?
I read what they are saying and, far from dismissing your ideas, they are encouraging you to step up with your own proposal for a reference design.
If your ideas pan out to produce a reference design with the benefits you are expounding then it might be adopted as the preeminent reference design.
It seems to me that what Peter and Cluso99 are saying translates to "compete; don't dictate"
After all, the title of "official reference design" can only be conferred by Parallax, and they might choose to develop their own board rather than adopt one from the forum.
For the record - this "reference design" is totally unofficial and I know Chip hasn't got time to do it and Parallax are not committing any special resources to it at present, so as part of the unofficial documentation I wanted to include some schematics and even a pcb layout for reference purposes. Now I'm not the kind of guy who goes around with his hands in his pockets waiting for someone else to do it. If they do, then great. Nonetheless, I would still do it and to top it off I have taken the time to try to incorporate "suggestions" while balancing this with the original purpose of the design, not for compatibility, but for reference and testing purposes. I think I have achieved that and I have as always made all this information freely available and accessible in different formats etc.
@jmg - there are no strange prescriptive demands or a desire to form a clique, why are you trying to put a negative slant on it when this is exactly the kind of thing we would eventually end up saying to a mate who always seems to have lots of "helpful" suggestions. Don't get me wrong, there are some gems in those suggestions, if we have enough time to stop what we are doing and go digging for them that is.
Now fair is fair, so here are a couple of my suggestions to you:
Summarize the suggestions in succinct little dot point and links - that way we can quickly decide if there is anything worthwhile to dig for.
If you are not sure about a particular device or method perhaps you could evaluate it and report the results (like we do)
We know what word games are but sorry, we are not playing. Nobody has to do anything and nobody is being forced to "bake a cake", but if we are listening and trying to accommodate suggestions, then surely what we are suggesting in return is not too much either. If all that is beyond you then fair enough, we won't "stir" you any longer and there is no need for you to reply in regards to this either.
Now fair is fair, so here are a couple of my suggestions to you:
Summarize the suggestions in succinct little dot point and links
Do you mean like this ?
There are still some pin-out and labeling issues (as mentioned) - not electrical issues, but they are future documentation/use issues.
* 0.1" headers should really be 40 pin, not 2x20 pins. Why? : Much easier to document (and Pi uses 1x40, not 2x20)
* Vcc & (Pxx MOD 32) pins should be on the same pins on both connectors. Why ? Fairly obvious, so you can same-plug into either
* To allow right angle connectors, Pin2's should be top left / bottom right. (RaspPi does this) Why ? Pins face out, correctly labeled.
Comments
See the examples already posted above
It's a quite strange thing to demand 'eat' in a P2 thread - do you and Cluso99 imagine I can somehow magic up a P2 before one even comes out of the fab ? rofl.
I have posted PCB examples, and confirmed a pathway into KiCad - not sure what else is really even possible ?
It's like this, if I sit back and wait for someone else to do something, I can always come up with all this "why don't you do this or that" and generate lots and lots of words and "helpful suggestions". Imagine though if you were to get some cheap little micro and write or test and adapt a beautiful little USB serial HID for it with some extra features including software handshake etc. Even if you evaluate actual chips themselves. Then while we've been busy cooking up dinner, you have in effect made dessert, and we can all sit down and enjoy the fruits of our labors together, not just now, but for a long time. That's all we're trying to say because you always seem to have a lot to say.
I'm still waiting on a reply from Silabs on an update of their HIDtoUART for the EFM8UB3, as that's the 'new design' go-to device.
That said, HID does seem to have a throughput issue, as the packet size I've found mentioned is not large. Might not be the best P2-match ?
I've also mentioned the CH55x series, but my Chinese is not great, so I may defer to those more fluent in Chinese...
Anyway I propose to 'bake' some of these prototypes in the local pcb fab next week, anyone else interested in a share of the available FR4 2 layer real estate?
My technique consists of
- standard male 40 pin DIL header
- magic pcb
- laser cut insulating strip
- special female 40 pin DIL socket (sometimes referred to as passthrough style)
Here's a photo of the end profile showing the back lasercut plastic in between two headers.
And here's a photo of a stack of them. As you can see the alignment is preserved. Male/female combo threaded spaces can be used to stack to arbitrary height.
And finally the PCB layout. These are Pi hats, each hat takes 1 pin from the GPIO at the right hand end of the header, ie GPIO 5,6,12,13,16,19,20,21,26, and the remaining gpio shuffle down. Think of them as chip selects for SPI communication, though they don't necessarily have to be that.
- the first hat plugged in takes GPIO5
- the second hat plugged in takes GPIO6,
- third hat plugged in takes GPIO12, and so on up to GPIO6
Not all signals 'shuffle down' - in fact most are global buses. The technique is generic and can be applied to any mapping, subject to available PCB space for track routings. But 6 mil track and space gives 3 adjacent signal lanes * 3 rows * 2 layers = 18 signal routings, while remaining inside the 0.4"x2.0" overall footprint, which is generally plenty
I initially planned to do this with the quickstart header many years ago, but hit some resistance from obc and Ken. Yes it complicates things, but there are significant benefits.
It'd be trivial to apply these techniques to adapt Peter's headers to Pi / beaglebone format.
* you need a bit more space to accommodate the wider female socket legs, hence the extra 50 mil at back.
? Not sure where this is coming from. No "stirring" from this end at all.
What I do here is simply focused on More users, Easier use, Better documentation, & more flexible HW (again, that expands the user base).
I know you use Protel99, and that's fine, we use what we know. However, Protel99 is very old, rare, and not available to many users. ie Not an ideal Publishing platform.
So, I have checked your PCB can load into KiCad.
KiCad V5 is close to release, and certainly will be released before P2 is.
KiCad is open source, and growing in popularity, so is looking to be an ideal vehicle for P2 publishing.
This PCB is already above DipTrace free limit.
It might fit into Free Eagle, at least in a 2 layer version. That would also be useful as KiKad has a full Eagle SCH/PCB project import.
Then, I write a script to export & import the netlist. Why, you may wonder ?
Because the PCB comes in via translation, you need to be able to check for differences in revisions. Kicad NET import generates design difference/change reports.
This round trip test can also catch 'not quite kosher' database issues, in a design. Those would affect most other CAD paths, so are also worth catching early.
That script did find issues in your original PCB design, which are now mostly fixed. (tho I see P2.PAD is still tagged P in SCH, but G in PCB )
There are still some pin-out and labeling issues (as mentioned) - not electrical issues, but they are future documentation/use issues.
a) 0.1" headers should really be 40 pin, not 2x20 pins. Why? : Much easier to document (and Pi uses 1x40, not 2x20)
b) Vcc & (Pxx MOD 32) pins should be on the same pins on both connectors. Why ? Fairly obvious, so you can same-plug into either
c) To allow right angle connectors, Pin2's should be top left / bottom right. (RaspPi does this) Why ? Pins face out, correctly labeled.
Those are the sorts of things that are best fixed early, to avoid spawning bad clones...
There are no P2's for quite a while, so there is time to get a solid breakout base design done, one that can support many form factor Xtals and Oscillators, as those vary in the field.
More exploratory, is looking at RaspPi slave/replacement. See PCB images above of that.
Given RaspPi sales will pass 20 Million (!), before P2 ships, some RaspPi support certainly delivers on 'More users' & Pi displacement use is viable...
I have placed and confirmed routing to a Pi connector - looks to be a low-cost addition to me. PCB size is already very close.
PCB can also fit a castellation edge, next to the Pi connector, keeping same edge as pi
What is surprising/disappointing is with all the above contributions, you still claim "just come up with something" ?!
KiCad has a now-quite-good import from Eagle SCH and PCB so this double-hop path could give a means to convert Protel99 schematics to KiCad.
I think it is saying it needs Accel format (PCAD ASCCII) for both. (PCB in PCAD ASCCII can come directly into KiCad)
Seriously, it's high time you did something instead of suggesting to others what they should do.
These quite strange prescriptive demands on others, by you and Peter, risk turning P2 forums into a clique - Are you really saying all the items I've listed above, are "nothing" ?
A forum is usually intended for discussion - yet now you want to dictate what is allowed, and by whom ?
I read what they are saying and, far from dismissing your ideas, they are encouraging you to step up with your own proposal for a reference design.
If your ideas pan out to produce a reference design with the benefits you are expounding then it might be adopted as the preeminent reference design.
It seems to me that what Peter and Cluso99 are saying translates to "compete; don't dictate"
After all, the title of "official reference design" can only be conferred by Parallax, and they might choose to develop their own board rather than adopt one from the forum.
@jmg - there are no strange prescriptive demands or a desire to form a clique, why are you trying to put a negative slant on it when this is exactly the kind of thing we would eventually end up saying to a mate who always seems to have lots of "helpful" suggestions. Don't get me wrong, there are some gems in those suggestions, if we have enough time to stop what we are doing and go digging for them that is.
Now fair is fair, so here are a couple of my suggestions to you:
Summarize the suggestions in succinct little dot point and links - that way we can quickly decide if there is anything worthwhile to dig for.
If you are not sure about a particular device or method perhaps you could evaluate it and report the results (like we do)
We know what word games are but sorry, we are not playing. Nobody has to do anything and nobody is being forced to "bake a cake", but if we are listening and trying to accommodate suggestions, then surely what we are suggesting in return is not too much either. If all that is beyond you then fair enough, we won't "stir" you any longer and there is no need for you to reply in regards to this either.
Do you mean like this ?
There are still some pin-out and labeling issues (as mentioned) - not electrical issues, but they are future documentation/use issues.
* 0.1" headers should really be 40 pin, not 2x20 pins. Why? : Much easier to document (and Pi uses 1x40, not 2x20) * Vcc & (Pxx MOD 32) pins should be on the same pins on both connectors. Why ? Fairly obvious, so you can same-plug into either
* To allow right angle connectors, Pin2's should be top left / bottom right. (RaspPi does this) Why ? Pins face out, correctly labeled.