On the all-in-one switching reg I'm really disappointed Murata aren't continuing the LXDC2UR which were similar size to the SC202a but includes the output cap
I guess the output cap isn't a huge deal, if being dual-footprinted with a Linear reg that has an output cap anyway
Many switching regulators really need multiple output caps to get the ripple down, but one inside the package does help reduce the worst current loop.
If the peak 1v8 current exceeds 600mA, whats available? [/url]
In linear :
Diodes have AZ1117 series in SOT89, but not in low drop.
Looks like ST put the 1.2A LDL1117 die into a DFN6-3x3mm package in the LDL212 series, (and charge more than SOT223)
In Switching, Torex have a 1A models in the XCL219/XCL220 series (2.5mm x 2mm)- but you do pay a premium for the included inductor.
Nice would be a compact, i2c programmable SMPS device.
Something like the OnSemi NCV6356 comes close, (5A) but they only currently show parts for lower than 1.8V out ?
Or the NCP6343, quite a good price (36c/3k) (3A) and i2c, but currently lower voltages than 1.8V and comes in a not-so-easy 1.99 x 1.34 mm CSP-15 package
The data does say : 'Default output voltages, enables, DCDC modes, current limit and other parameters can be factory programmed upon request'
I guess these more modern, lower target Vout parts, could have a simple divider added to the feedback pin, to get them into P2 Vdd range ?
Older parts:
The TI TPS62356 has a more useful 1.5 ~ 1.975 Vout, but comes in 12DSBGA
The Microchip MIC23156 (1.5A) does have a 2.8x2.5mm MLF17 package, and a valid voltage span - but costs quite a bit more than a NCP6343.
An alternative approach, is to use a low cost dual SMPS device and a low cost DAC MCU.
examples:
The Diodes inc PAM2306 is 2 x 1A outputs, in 12-WDFN (3x3) for 27c/3k, and a MCU 's like Tiny212 1 x 8b DAC 37c/3k or 3x3mm, EFM8BB3 2 x 12b DAC 63c/3k or 3x3mm Tiny1616 3 x 8b DAC 64c/3k
PAM2319 is 1A,2A, in 12-WDFN (3x3) for 39c/3k
More compact linear :
NCP154MX330180TAG is 300mA/300mA 1.8/3.3 in 8-XDFN (1.6x1.2) 24c/3k
NCV8154MW330180TBG is 300mA/300mA 1.8/3.3 in 10-DFN (3x3) 25c/3k
MIC5350-SGYMT-TR is 500mA/300mA 1.8/3,3 in 8-TMLF® (2x2) 36c/3k
MIC5355-SGYMME is 500mA/500mA in 1.8/3.3 in 8-MSOP-EP (4.9x3mm) or MLF8(3x3) 39c/3k
BA33D18HFP-TR (ROHM) 16V, 500mA/500mA (1A peak) in 1.8/3.3 in a somewhat large, but easy to cool, 9.395mm x 10.54 mm x 2.005mm 55c/3k
I notice that seeed are fine with 6/6 rather than the 8/8 widths that I normally keep my boards to.
Looking really nice, Peter.
Yeah 6/6 mil seems to be the new standard available pretty much everywhere, including remaining local fabs. All the local fabs now seem to use LPI optical silkscreen, which is good down to around 4 mil (certainly 6 mil)
At some stage oshpark 2layer improved from 27/13 via pad/hole to 20/10, which makes a big difference. Thats what I designed to.
There seems to be a premium to be paid for going below 0.3mm at seeed so 22/12 seems more conservative.
I suggest two connectors - one that gives 32+32=64io, and a second one that is Pi-ready.
Very little PCB cost in doing that, but opens up a large user base right there. Do not fit it if you do not use it...
Is this intended to connect a P2D2 to a Pi or to allow Pi Add-Ons and HATs to be attached ?
The connections need to be different for each use case, and each use case is useful to have. Maybe it needs two 'Pi compatible' connectors' ?
Do you mean to support both parts-up and parts-down mating ?
No; that should be just a connector issue. I was meaning when the Pi is being used to program/control R2D2 and when R2D2 is being used to control Pi Add-Ons.
For example the TX/RX UART connections would need to crossover in one case but not the other. The Pi would be outputting 5V towards the P2D2, P2D2 would have to provide 5V to an Add-On.
That would seem to need jumpers to handle each use case or two connectors with different wiring schemes.
For example the TX/RX UART connections would need to crossover in one case but not the other. The Pi would be outputting 5V towards the P2D2, P2D2 would have to provide 5V to an Add-On.
That would seem to need jumpers to handle each use case or two connectors with different wiring schemes.
? The P2 can easily flip TX/Rx pins and direction as needed.
For the 5V power, that's up to the user - they can power both if they want. I recall the Top end Pi is starting to push the microUSB current ratings
I like the XCL220 switcher that @Tubular came up with and designed it in instead of the SC202A. This switchers can handle more current and the footprint was somewhat cleaner too. In the process I have added a outward facing microSD socket to the underside along with a couple of the LEDs to provide an option.
For this screenshot I have highlighted the 1.8V net so it is clear to see where it goes and where the caps are etc. You can see 9 caps around the chip plus two up on the regulators and the power ring is nice and solid with a very short feed from the source and the underside is mostly a solid ground plane. The outline of the switcher is visible on the far right center and up a bit.
Depending on heat output it could possibly also tuck into a corner near the P2, for compact applications. Maybe.
There is room for the SO8 Flash to move up, so the switcher could slot in (better?) on that other side, for a compact application.
That gives more room for switcher caps & I see they use 2 parallel out caps on the example PCB, in a pi filter, - common to try to reduce the ripple.
The 1.04mm height is under the 1.75mm So8 height, so will still fit under SD card ?
@Jmg - Surely if you have designed pcbs you would know it's not just about where you would like it to go. I tend to visualize currents, ground spikes, EMI, crosstalk, termination etc when I lay out a pcb. These switchers will generate a lot of ground noise at many hundreds of milliamps with around a 5MHz switching frequency. They are over to the side with the power and ground inputs for a reason. What I expect from them is a clean power feed and one that doesn't turn the whole board into a power supply circuit with the P2 caught in-between. The grounds and regulated pins on the left side are for any connected I/O mainly and I tend to favor having ground pins between power and signals as a bit of a "safety fence".
The reference pcb layout they have is for a stand-alone evaluation board only whereas this chip is tightly integrated into the P2D2 design with many other distributed caps on the supply. I think their reference design would probably take up half my pcb real-estate if I were to follow it.
@Tubular - I read your post as meaning that when we design a pcb in general that we could consider the option of having the switcher close to the P2 because it is so small, and that is true. All of which depends of course upon the design, as we know.
@Cluso99 - yeah, I think I like the red mask. If only the P2 chip was jet black like that, what a contrast. Maybe I should add some more blinking lights!
@Jmg - Surely if you have designed pcbs you would know it's not just about where you would like it to go. I tend to visualize currents, ground spikes, EMI, crosstalk, termination etc when I lay out a pcb. These switchers will generate a lot of ground noise at many hundreds of milliamps with around a 5MHz switching frequency. !
Yup, exactly - and those current loops are highly localized close to the switcher.
Their layout is carefully crafted like that, for good reasons - even down to where they split a trace.
Once you are past the outermost output cap, the supply ripple is down to millivolt levels.
The crystal is the most sensitive analog pin area of the P2, so I'd favour placing the switcher on the opposite side.
That also means you can focus on the needs of linear and switchers layouts separately.
Linear gets the more copper it needs, and the switcher gets the precise cap placement/split trace it needs,
I suggest two connectors - one that gives 32+32=64io, and a second one that is Pi-ready.
Very little PCB cost in doing that, but opens up a large user base right there. Do not fit it if you do not use it...
Is this intended to connect a P2D2 to a Pi or to allow Pi Add-Ons and HATs to be attached ?
The connections need to be different for each use case, and each use case is useful to have. Maybe it needs two 'Pi compatible' connectors' ?
Thinking more about Pi-use, and the various physical arrangements possible....
My original idea was more development-based, with Pi outside the P2 as an offset-leggo stack, using maybe 2 mounting holes.
Then I flipped it around 180, so it stacks over the P2, in more of a production-based design. This now can use 4 mounting holes.
Adding the second P1 connector, to support either-32-ports, shows that 2 Pi boards would collide on the same side, but they could be up/down split.
This up/down also allows full cable access to both pi's
A picture is worth 1000 words
btw, I noticed an AZ1117CR-3.3TRG1 rated at 800ma for around 27 cents.
Yes, that's looking like one of the better SOT89 choices. sub 10c in 3k volumes, and 1A min current limit.
P2's wait opcodes running in all 8 COGs, could give tolerable real-code operating averages, for Linear regs, but rare high peaks.
I suggest two connectors - one that gives 32+32=64io, and a second one that is Pi-ready.
Very little PCB cost in doing that, but opens up a large user base right there. Do not fit it if you do not use it...
Is this intended to connect a P2D2 to a Pi or to allow Pi Add-Ons and HATs to be attached ?
The connections need to be different for each use case, and each use case is useful to have. Maybe it needs two 'Pi compatible' connectors' ?
Thinking more about Pi-use, and the various physical arrangements possible....
My original idea was more development-based, with Pi outside the P2 as an offset-leggo stack, using maybe 2 mounting holes.
Then I flipped it around 180, so it stacks over the P2, in more of a production-based design. This now can use 4 mounting holes.
Adding the second P1 connector, to support either-32-ports, shows that 2 Pi boards would collide on the same side, but they could be up/down split.
This up/down also allows full cable access to both pi's
A picture is worth 1000 words
Hey nice work jmg
Why not try a version just using Peter's castellated version, which is about 1 inch wide I believe. Then 1 inch + DIL header would be quite close to 30mm width of the Pi zero board.
@Cluso99 - yeah, I think I like the red mask. If only the P2 chip was jet black like that, what a contrast. Maybe I should add some more blinking lights!
Maybe we could spray paint the P2 jet black, then silk screen the logo in white
One thing I was wondering with respect to P2 reset...
If this reference board is ever intended to be either embedded into a project board or test platform with the DIL or 0.05 headers there might be some type of common system reset signal already designed into that board. The only way you can reset your P2D2 board right now appears to be using the Prop-plug compatible serial header. If that serial header is populated for debug etc it would only be possible to pass this reset through to the main board if its connector also passed through from the bottom of the P2D2 board to the project board underneath as well and even then this would be the signal before the RC circuit. Does it make any sense to either sacrifice one 3.3V header pin to be connected directly to the P2 reset line (transistor collector output side) or instead perhaps just make available a one or two pin header (RESET & optional GND) somewhere else if you have room for it anywhere? Looking at your board you may possibly get a little space for the latter approach somewhere above the reset transistor with some shuffling of parts but it does look tight.
Just thinking what might improve flexibility with P2 and system reset, that's all. However I could see you may prefer the existing approach for simplicity sake.
@jmg - I know that you know about load transient response but the datasheets also talk about line transient response too, and that is partly to do with inductances and load transients as well. While there are localized currents, there are also line currents, unless you happen to have one very large low esr capacitor close to the regulator. Having it where it is with a 0.3" of feed to the power ring is more than sufficient and suitable for this compact layout. But perhaps you could show me some pcbs that you have done that work fine like that to give me an idea.
@rogloh - yeah, I was thinking about a pin for a reset and up on one of those 3.3V pins would be fine so I will put it in. At present I have built in a transistor reset circuit but to make it work with cables that already have a reset circuit, I have included a pull-up resistor but I will have to make sure that the loader delivers a pulse rather than just an edge otherwise I will need to make some adjustments. There is still an option for me to dedicate a pin to the transistor reset circuit though as I'm still thinking about how useful those extra signals are on the other three pins. I would be putting a right angle dual row pin header in here and sometimes I use this header for expansion and connecting to another board as serial or I2C etc.
@Cluso99 - Well, that got me thinking, I could print up some nice P2 foil stickers that could sit on the chip or the board
Re Pi compatibility - it seems if the P2D2 were surface mounted onto another thin pcb that this could have all the right connections. I know the Pi Zero would be great for HDMI and USB etc but for me that takes the focus off the P2 and a "brain drain" of resources that could go into P2 itself.
Hey nice work jmg
Why not try a version just using Peter's castellated version, which is about 1 inch wide I believe. Then 1 inch + DIL header would be quite close to 30mm width of the Pi zero board.
Hmm - you mean drop both the full 32 io pin headers and do only a 1 sided Pi ? ( removes 3 x 40 pin footprints ) ?
That's less generally useful, but yes, it looks like it could get down to ~ 33mm, (maybe 34mm, as the pins are not as 1:1) - still wider than PiZero, and you have P2 connected to only Pi, no other IO.
The uses I can think of for P2+Pi, are where P2 is an IO Bridge, so need P2 connected to the real world... maybe IO headers could fit on the vertical edges ? A 12 way 2x6 header fits there.
That's all sounding higher volume/niche use, of custom IO for the P2 side, but maybe that 33~34mm might just squeeze into a some PiZero case for motivation ?
Or, maybe... since there are now castellations on one edge, you could flip the Pi 0,1" and castellation, to give two edges of castellations, and be able to surface mount on a motherboard.
Might need a smd header option, and commits users to a motherboard.
'Trying that for size', I see you can drop a Peter castellation footprint next to the Pi header, with room for one trace, to get a castellation edge.
It is routable, even with Vcc going across the board. That has almost zero cost, and makes the board more useful.
The castellation does need to follow the 0.1" header next to it, so here becomes Pi-influenced. You could pick up the extra 5 P2 pins missing from P32~P58, on a short castellation on vertical edges ?
Peter's 32 io headers are more break-out useful than the more mangled Pi one, so I'd be loathe to drop those on a breakout / Eval volume PCB.
The Pi-option is an 'almost for free' addition that has a small PCB size impact, removes no features, but gets a LOT more people thinking about a P2.
I can map/route P32 thru P58 to the Pi pins, in a linear fashion (no skips), and maybe P63.P62 have jumper option to Pi(TXD.RXD) to allow Pi to boot the P2 ?
Hmm. For Pi-boot of P2, maybe these edge connectors need a P2.RST connection ?
what sense would it make to connect all pins of a PI-zero to all pins of a propeller 2?
If I would use a P2 and a Pi together for a project I would definitely NOT want to connect all pins together. It is simple BS to even think about that, for WHAT exactly?
what sense would it make to connect all pins of a PI-zero to all pins of a propeller 2?
If I would use a P2 and a Pi together for a project I would definitely NOT want to connect all pins together. It is simple BS to even think about that, for WHAT exactly?
it looks I am missing something here,
The P2 has 64io, so it is impossible to connect "all pins of a PI-zero to all pins of a propeller 2" - so I'm not sure what you are asking ?
P2 pins are fully mappable, so you enable only those you want to use.
How would you connect a Pi to P2 ? 5V, 3v3, GND ?
Certainly the serial comms pins are going to be useful, I2C UART PCM SPI CSn maybe also PWM, and the GPIO ? - might not need all of them, but P2 makes a simple logic analyser to confirm RaspPi operation.
If someone wants to use a P2 to displace a Pi, (which I see as a common use, to be encouraged ! ) then all of those GPIO Pins need to be available as P2 pins.
what sense would it make to connect all pins of a PI-zero to all pins of a propeller 2?
If I would use a P2 and a Pi together for a project I would definitely NOT want to connect all pins together. It is simple BS to even think about that, for WHAT exactly?
it looks I am missing something here,
Mike
Mike,
- Its propbably the quickest, cheapest way to get HDMI video out of the P2
- It would fit inside existing pi zero cases.
- You can put interposing hats in between the pi zero and the p2
I guess I'm inspired a bit by the fleaohm fpga board, which can either connect to a pi zero, or act as an alternative master using same header footprint.
I'll post some photos tonight of the inline converter technique I use to adapt 40 pin male to 40 pin female, with arbitrary pin map-through. Its relevant to this discussion and might solve the header issue (also could apply to beaglebone etc)
@Cluso99 - Well, that got me thinking, I could print up some nice P2 foil stickers that could sit on the chip or the board
Yes, I did think of that - on the chip of course. Could even mark some Pxx pins (maybe every 4).
Now, what about that great pic of the cogs/hub on it too?
Re Pi compatibility - ... I know the Pi Zero would be great for HDMI and USB etc but for me that takes the focus off the P2 and a "brain drain" of resources that could go into P2 itself.
I'm not sure how you see a "brain drain" ?
These are the stats for Pi : In March 2018, sales reached 19 million
To me, that is a (very large) brain source ?
Do Parallax want to keep the P2 a secret ? I doubt it, not good business to do that
Re Pi compatibility - ... I know the Pi Zero would be great for HDMI and USB etc but for me that takes the focus off the P2 and a "brain drain" of resources that could go into P2 itself.
I'm not sure how you see a "brain drain" ?
These are the stats for Pi : In March 2018, sales reached 19 million
To me, that is a (very large) brain source ?
Do Parallax want to keep the P2 a secret ? I doubt it, not good business to do that
Why don't you do your own pcb with all that you desire?
@jmg - Cluso99 and I are always stirring you to roll up your sleeves and give it a go, bake the cake, and let us taste the result.
The cook with his head in the book will always come up with plenty of ideas, but it's the cook slaving over a hot oven that comes up with plenty to eat!
Comments
Many switching regulators really need multiple output caps to get the ripple down, but one inside the package does help reduce the worst current loop.
In linear :
Diodes have AZ1117 series in SOT89, but not in low drop.
Looks like ST put the 1.2A LDL1117 die into a DFN6-3x3mm package in the LDL212 series, (and charge more than SOT223)
In Switching, Torex have a 1A models in the XCL219/XCL220 series (2.5mm x 2mm)- but you do pay a premium for the included inductor.
That Torex XCL219/220 option ticks all the boxes, thanks jmg.
Something like the OnSemi NCV6356 comes close, (5A) but they only currently show parts for lower than 1.8V out ?
Or the NCP6343, quite a good price (36c/3k) (3A) and i2c, but currently lower voltages than 1.8V and comes in a not-so-easy 1.99 x 1.34 mm CSP-15 package
The data does say : 'Default output voltages, enables, DCDC modes, current limit and other parameters can be factory programmed upon request'
I guess these more modern, lower target Vout parts, could have a simple divider added to the feedback pin, to get them into P2 Vdd range ?
Older parts:
The TI TPS62356 has a more useful 1.5 ~ 1.975 Vout, but comes in 12DSBGA
The Microchip MIC23156 (1.5A) does have a 2.8x2.5mm MLF17 package, and a valid voltage span - but costs quite a bit more than a NCP6343.
An alternative approach, is to use a low cost dual SMPS device and a low cost DAC MCU.
examples:
The Diodes inc PAM2306 is 2 x 1A outputs, in 12-WDFN (3x3) for 27c/3k, and a MCU 's like Tiny212 1 x 8b DAC 37c/3k or 3x3mm, EFM8BB3 2 x 12b DAC 63c/3k or 3x3mm Tiny1616 3 x 8b DAC 64c/3k
PAM2319 is 1A,2A, in 12-WDFN (3x3) for 39c/3k
More compact linear :
NCP154MX330180TAG is 300mA/300mA 1.8/3.3 in 8-XDFN (1.6x1.2) 24c/3k
NCV8154MW330180TBG is 300mA/300mA 1.8/3.3 in 10-DFN (3x3) 25c/3k
MIC5350-SGYMT-TR is 500mA/300mA 1.8/3,3 in 8-TMLF® (2x2) 36c/3k
MIC5355-SGYMME is 500mA/500mA in 1.8/3.3 in 8-MSOP-EP (4.9x3mm) or MLF8(3x3) 39c/3k
BA33D18HFP-TR (ROHM) 16V, 500mA/500mA (1A peak) in 1.8/3.3 in a somewhat large, but easy to cool, 9.395mm x 10.54 mm x 2.005mm 55c/3k
There seems to be a premium to be paid for going below 0.3mm at seeed so 22/12 seems more conservative.
For example the TX/RX UART connections would need to crossover in one case but not the other. The Pi would be outputting 5V towards the P2D2, P2D2 would have to provide 5V to an Add-On.
That would seem to need jumpers to handle each use case or two connectors with different wiring schemes.
For the 5V power, that's up to the user - they can power both if they want. I recall the Top end Pi is starting to push the microUSB current ratings
For this screenshot I have highlighted the 1.8V net so it is clear to see where it goes and where the caps are etc. You can see 9 caps around the chip plus two up on the regulators and the power ring is nice and solid with a very short feed from the source and the underside is mostly a solid ground plane. The outline of the switcher is visible on the far right center and up a bit.
Certainly looks tidy in your layout.
Depending on heat output it could possibly also tuck into a corner near the P2, for compact applications. Maybe.
There is room for the SO8 Flash to move up, so the switcher could slot in (better?) on that other side, for a compact application.
That gives more room for switcher caps & I see they use 2 parallel out caps on the example PCB, in a pi filter, - common to try to reduce the ripple.
The 1.04mm height is under the 1.75mm So8 height, so will still fit under SD card ?
The reference pcb layout they have is for a stand-alone evaluation board only whereas this chip is tightly integrated into the P2D2 design with many other distributed caps on the supply. I think their reference design would probably take up half my pcb real-estate if I were to follow it.
@Tubular - I read your post as meaning that when we design a pcb in general that we could consider the option of having the switcher close to the P2 because it is so small, and that is true. All of which depends of course upon the design, as we know.
@Cluso99 - yeah, I think I like the red mask. If only the P2 chip was jet black like that, what a contrast. Maybe I should add some more blinking lights!
Yup, exactly - and those current loops are highly localized close to the switcher.
Their layout is carefully crafted like that, for good reasons - even down to where they split a trace.
Once you are past the outermost output cap, the supply ripple is down to millivolt levels.
The crystal is the most sensitive analog pin area of the P2, so I'd favour placing the switcher on the opposite side.
That also means you can focus on the needs of linear and switchers layouts separately.
Linear gets the more copper it needs, and the switcher gets the precise cap placement/split trace it needs,
Thinking more about Pi-use, and the various physical arrangements possible....
My original idea was more development-based, with Pi outside the P2 as an offset-leggo stack, using maybe 2 mounting holes.
Then I flipped it around 180, so it stacks over the P2, in more of a production-based design. This now can use 4 mounting holes.
Adding the second P1 connector, to support either-32-ports, shows that 2 Pi boards would collide on the same side, but they could be up/down split.
This up/down also allows full cable access to both pi's
A picture is worth 1000 words
P2's wait opcodes running in all 8 COGs, could give tolerable real-code operating averages, for Linear regs, but rare high peaks.
Hey nice work jmg
Why not try a version just using Peter's castellated version, which is about 1 inch wide I believe. Then 1 inch + DIL header would be quite close to 30mm width of the Pi zero board.
Great looking board! Really nice work.
One thing I was wondering with respect to P2 reset...
If this reference board is ever intended to be either embedded into a project board or test platform with the DIL or 0.05 headers there might be some type of common system reset signal already designed into that board. The only way you can reset your P2D2 board right now appears to be using the Prop-plug compatible serial header. If that serial header is populated for debug etc it would only be possible to pass this reset through to the main board if its connector also passed through from the bottom of the P2D2 board to the project board underneath as well and even then this would be the signal before the RC circuit. Does it make any sense to either sacrifice one 3.3V header pin to be connected directly to the P2 reset line (transistor collector output side) or instead perhaps just make available a one or two pin header (RESET & optional GND) somewhere else if you have room for it anywhere? Looking at your board you may possibly get a little space for the latter approach somewhere above the reset transistor with some shuffling of parts but it does look tight.
Just thinking what might improve flexibility with P2 and system reset, that's all. However I could see you may prefer the existing approach for simplicity sake.
Cheers,
Roger.
@rogloh - yeah, I was thinking about a pin for a reset and up on one of those 3.3V pins would be fine so I will put it in. At present I have built in a transistor reset circuit but to make it work with cables that already have a reset circuit, I have included a pull-up resistor but I will have to make sure that the loader delivers a pulse rather than just an edge otherwise I will need to make some adjustments. There is still an option for me to dedicate a pin to the transistor reset circuit though as I'm still thinking about how useful those extra signals are on the other three pins. I would be putting a right angle dual row pin header in here and sometimes I use this header for expansion and connecting to another board as serial or I2C etc.
@Cluso99 - Well, that got me thinking, I could print up some nice P2 foil stickers that could sit on the chip or the board
Re Pi compatibility - it seems if the P2D2 were surface mounted onto another thin pcb that this could have all the right connections. I know the Pi Zero would be great for HDMI and USB etc but for me that takes the focus off the P2 and a "brain drain" of resources that could go into P2 itself.
Hmm - you mean drop both the full 32 io pin headers and do only a 1 sided Pi ? ( removes 3 x 40 pin footprints ) ?
That's less generally useful, but yes, it looks like it could get down to ~ 33mm, (maybe 34mm, as the pins are not as 1:1) - still wider than PiZero, and you have P2 connected to only Pi, no other IO.
The uses I can think of for P2+Pi, are where P2 is an IO Bridge, so need P2 connected to the real world... maybe IO headers could fit on the vertical edges ? A 12 way 2x6 header fits there.
That's all sounding higher volume/niche use, of custom IO for the P2 side, but maybe that 33~34mm might just squeeze into a some PiZero case for motivation ?
Or, maybe... since there are now castellations on one edge, you could flip the Pi 0,1" and castellation, to give two edges of castellations, and be able to surface mount on a motherboard.
Might need a smd header option, and commits users to a motherboard.
'Trying that for size', I see you can drop a Peter castellation footprint next to the Pi header, with room for one trace, to get a castellation edge.
It is routable, even with Vcc going across the board. That has almost zero cost, and makes the board more useful.
The castellation does need to follow the 0.1" header next to it, so here becomes Pi-influenced. You could pick up the extra 5 P2 pins missing from P32~P58, on a short castellation on vertical edges ?
Peter's 32 io headers are more break-out useful than the more mangled Pi one, so I'd be loathe to drop those on a breakout / Eval volume PCB.
The Pi-option is an 'almost for free' addition that has a small PCB size impact, removes no features, but gets a LOT more people thinking about a P2.
I can map/route P32 thru P58 to the Pi pins, in a linear fashion (no skips), and maybe P63.P62 have jumper option to Pi(TXD.RXD) to allow Pi to boot the P2 ?
Hmm. For Pi-boot of P2, maybe these edge connectors need a P2.RST connection ?
If I would use a P2 and a Pi together for a project I would definitely NOT want to connect all pins together. It is simple BS to even think about that, for WHAT exactly?
it looks I am missing something here,
Mike
P2 pins are fully mappable, so you enable only those you want to use.
How would you connect a Pi to P2 ? 5V, 3v3, GND ?
Certainly the serial comms pins are going to be useful, I2C UART PCM SPI CSn maybe also PWM, and the GPIO ? - might not need all of them, but P2 makes a simple logic analyser to confirm RaspPi operation.
If someone wants to use a P2 to displace a Pi, (which I see as a common use, to be encouraged !
Mike,
- Its propbably the quickest, cheapest way to get HDMI video out of the P2
- It would fit inside existing pi zero cases.
- You can put interposing hats in between the pi zero and the p2
I guess I'm inspired a bit by the fleaohm fpga board, which can either connect to a pi zero, or act as an alternative master using same header footprint.
Now, what about that great pic of the cogs/hub on it too?
You have a flair for graphics
And it's not like you have anything else to do
These are the stats for Pi : In March 2018, sales reached 19 million
To me, that is a (very large) brain source ?
Do Parallax want to keep the P2 a secret ? I doubt it, not good business to do that
The cook with his head in the book will always come up with plenty of ideas, but it's the cook slaving over a hot oven that comes up with plenty to eat!