Many times I just want a good macro-assembler but everybody wants to sell you $$$$$.00 tools although I did use some that had decent macroassemblers that could be used "free", but not now as I didn't find GAS very flexible or friendly...
fasmg has macro sets for various MCUs and an ARM fork, and I did some prelim tests on Prop-opcode handling using fasmg.
One down-side of fasm/fasmg is the lack of linking to HLL's, but if you intend to code (eg forth engine) in ASM, that is less an issue.
I just asked if we could expect it to happen soon. I didn't mean that imply any pressure. Just trying to get an idea of where we are in the process.
I think the synthesis switch could be flipped at almost any time.
A smarter question is should it be flipped, which is more a testing-coverage question, than a 'is the code ready' question.
The rate of change has certainly reduced
Curious why the FPGA P1V solutions wouldn't work for you, in particular OzPropDev's 'generator' that effectively took all the hard work out and pretty much gave you a P1B plus some bonus features
If FPGA is still an option I'm happy to guide you through it.
Was up your way last week, and cluso's too, just didn't have time to spare. Next time.
Parallax "PR Guy" has just arrived on the scene! Get ready for some marketing Spin!
Well, not really. I'm too busy driving the "just education" marketplace to try to tell anybody how or what to think. Of all the interweb kingdoms this one isn't one to try to manage that way anyway. Just so we all know, the educational market enabled the Propeller 1 and will do the same for Propeller 2, so it shouldn't be underestimated. More specifically, the BASIC Stamp 2, Boe-Bots, Stamps in Class, and now the Blockly system (using Propeller 1) have provided the fuel for Parallax.
While we're here, waiting for P2 (or P5 as Peter called it) to get finished we also need your support with the educational market, whenever you have a chance. Your support comes in many forms, like David Betz's contribution to the WX firmware and Propeller Loader - or some of our lone educators who visit the forums like John Kauffman to seek some help with Propeller C. Do you remember the "welcome a newcomer" drive a few years ago that many of you found sorta creepy? That really helped the atmosphere for noobies! Occasionally a teacher or student will come to the forums and ask questions (many of these demographics want support via Twitter and FB) and you will graciously help them out even if they don't know how to acknowledge your contribution. Most educators aren't familiar with forums and don't have a lot of time to ask questions here, so when they appear they represent a huge opportunity for all of us.
I encourage you to continue lending that kind of support to Parallax and our customers. As we enter the new phase of our educational tutorials with Blockly the future looks very good. As you help us win in that area you will also be enabling a future with the Propeller 2. This includes you, Peter.
Thank you for your support of what we're doing with education!
Ken Gracey
P.S. to Peter and others who are sick of waiting for the Propeller 2. I'm probably more worn out than all of you in this way because I've kept Parallax productive during this period. The human spirit is amazingly resilient so I have a stupid "developed world" story to share as a parallel of where we are in the design cycle and how we'll actually finish it. Once I took a flight from Sacramento to Chicago (before 9-11) which was headed to land but it was diverted to MSP airport a few hundred feet above the runway due to bad weather. After 13 hours of being locked into a dry (no water, alcohol or food) fuselage on the MSP tarmac people were going crazy. A cowboy fellow was preparing to kick the emergency door out and others were in a near-restraint situation when the pilot said "we have to stay in the plane, right here". After a half day, the pilot announced "we've been given clearance to Chicago and we'll arrive there in one hour". Passengers seemed to forget the anguish and discomfort because we were going to be in Chicago shortly. My hope is that when P2 is finally finished we feel the same way about it - forgetting the decade-long design cycle and thinking about using the chip!
P.S. to Peter and others who are sick of waiting for the Propeller 2. I'm probably more worn out than all of you in this way because I've kept Parallax productive during this period. The human spirit is amazingly resilient so I have a stupid "developed world" story to share as a parallel of where we are in the design cycle and how we'll actually finish it. Once I took a flight from Sacramento to Chicago (before 9-11) which was headed to land but it was diverted to MSP airport a few hundred feet above the runway due to bad weather. After 13 hours of being locked into a dry (no water, alcohol or food) fuselage on the MSP tarmac people were going crazy. A cowboy fellow was preparing to kick the emergency door out and others were in a near-restraint situation when the pilot said "we have to stay in the plane, right here". After a half day, the pilot announced "we've been given clearance to Chicago and we'll arrive there in one hour". Passengers seemed to forget the anguish and discomfort because we were going to be in Chicago shortly. My hope is that when P2 is finally finished we feel the same way about it - forgetting the decade-long design cycle and thinking about using the chip!
Haven't we been on that roller coaster many times around already? I'm not not being confrontational about it, we are all elated to see progress on P2 just as when the roller coaster nears the top but then we go flying back down and twisting around and around again. The "are we there yet" is a bit like Groundhog Day but while time keeps looping in Propsutawney the rest of the world has moved on. Thank you though for reassuring us Ken and thank you Chip for the P1 and may your work bear fruit so that we will have a new generation to "play" with. That is, if I'm still here though.
Haven't we been on that roller coaster many times around already? I'm not not being confrontational about it, we are all elated to see progress on P2 just as when the roller coaster nears the top but then we go flying back down and twisting around and around again. The "are we there yet" is a bit like Groundhog Day but while time keeps looping in Propsutawney the rest of the world has moved on. Thank you though for reassuring us Ken and thank you Chip for the P1 and may your work bear fruit so that we will have a new generation to "play" with. That is, if I'm still here though.
Yes, we have been on the roller coaster too many times. We all have different tolerances for this kind of process and hindsight is 20/20. I have many thoughts that I wouldn't share here, so suffice it to say I understand your viewpoint. My disposition is not to worry about what I can't change and to place energy where I can be productive instead.
.... That we had no means to randomly r/w bytes was bugging me for a long time. Same with single-instruction pin setting.
On the subject of byte codes, checking back into fasmg forum, reveals this mention of WebAssembly
and this wiki says " WebAssembly is a portable stack machine which is designed to be faster to parse than JavaScript, as well as faster to execute."
and this seems a good idea It defines a WebAssembly binary format, which is not designed to be used by humans, as well as a human-readable "Linear Assembly Bytecode" format that resembles traditional assembly languages.
Seems quite new, but also well resourced.
Can P2 leverage those byte-codes, and so tap-into a ship-load of resource ?
Curious why the FPGA P1V solutions wouldn't work for you, in particular OzPropDev's 'generator' that effectively took all the hard work out and pretty much gave you a P1B plus some bonus features
Yes, that generator was a good idea, tho IIRC Altera only.
Problems with FPGA solutions are price & package and the fact you get 'pushed up the curve', in order to get enough RAM.
The new Lattice parts I mention above, are somewhat unique in having large memory (128KB) and more modest LUT count.
That also drops the price, and the package is also easier to manage than a BGA, so they appeal for any Soft-MCU design.
I think on a per-cog basis, P1 will still be in front for a while, assuming you do not hit any other limits like RAM or IO counts.
A PCB module with a P1 and an ICE40UP5K-SG48 could significantly extend P1 reach.
I'm neutral at this point. When the P2 eventually comes, I'll look at it, evaluate its usefulness for my purposes, and embrace it if it meets my needs. But I must admit to "roller coaster fatigue" in the meantime, and I've pretty much zoned out of the hardware development conversations. The one thing that keeps me interested is Spin2. But I'm a computer language freak. Cain't he'p m'se'f.
More to the point, though, the P1 remains a completely unique micro after nearly 11 years in production and a total joy to work with. I don't feel that I've even begun to tap its full potential. And I think it enjoys a simplicity and a consequent potential for rapid application development (RAD) that the P2 may or may not achieve. So even if I pass on the P2, I've still got a focus for my creative juices.
I'm neutral at this point. When the P2 eventually comes, I'll look at it, evaluate its usefulness for my purposes, and embrace it if it meets my needs. But I must admit to "roller coaster fatigue" in the meantime, and I've pretty much zoned out of the hardware development conversations. The one thing that keeps me interested is Spin2. But I'm a computer language freak. Cain't he'p m'se'f.
More to the point, though, the P1 remains a completely unique micro after nearly 11 years in production and a total joy to work with. I don't feel that I've even begun to tap its full potential. And I think it enjoys a simplicity and a consequent potential for rapid application development (RAD) that the P2 may or may not achieve. So even if I pass on the P2, I've still got a focus for my creative juices.
-Phil
After 11 years I just need a chip with (lots) more Hub RAM. A few more pins and faster would be nice too.
11 years ago, the P1 was pretty much on its' own with RAM. Nowadays, it's way behind and cores/cogs cannot make up for this.
I really enjoy "playing" with the prop. But I have been seriously looking for another chip and unfortunately, the ARM is the alternative, especially since I have to learning another micro, I may as well go with the majority. Lots to choose from and cheap as chips. It is way more complicated, etc, etc. And no, the P1 and ARM don't really compare/compete, but in the end, if you cannot do it with a P1, then one of the ARM's will. It is just a fact of life.
Seriously, if a P1+ was on the short term horizon, I would probably put off shifting to an ARM. But IMHO the P2 is still too far off for me.
I will probably still be working with the P1 as I want to get my grandkids into robots/programming and Blockly looks enticing. I have built an OTTO bot.
I did a job in motor control. And now I tell you a result. I could only find it running circles about circles about circles, from Z80 to Transputer to finally the propeller. The propeller was here the right moment. Don't know why. I found: if I assume error 0, and close a control loop, I need time to detect a deviation and to act accordingly. But if I exclude error 0, I by accident will always have a positive or negative deviation and so I am always reacting, what results in noise and higher performance. I could have known this before, because that was Ali's style of boxing. So I believe: it is a necessity to make an error to find out what is right and the more often errors happen the faster I can correct it. But being too fast only creates noise. That is why we have elections: make an error and correct it.
But this is not what I want to tell, that was what I had to tell.
Now the story:
Read about field oriented motor control and you will find the Clarke and Park transform. Try to understand it REALLY. Find out the mathematical background. Read about complex numbers, e power i phi, ..
Now look back to the very basics: Kirchhoffs law: in a closed loop the sum of all voltages is zero. In a node the sum of all incoming currents is zero. In a AC motor we have 3 voltages (U, V, W) and 3 currents (Iu, Iv, Iw) where these laws apply. And now the trick: If 0 = U + V + W then U*1 + V*1 + W*1 = 0. Which in vector representation can be written: ( U, V, W ) * ( 1, 1, 1 ) = 0. This means: a vector in 3-dimensions, having the coordinates of the current terminal voltages of a motor is perpenticular to a vector that is the diagonal of a cube. As the voltages vary sinusoidally over time, all the vectors represented by the voltages over time are perpenticular to one single vector, what means: they are located in a plain. An being in a plain, there is alway a length and an angle relative to a static coordinate system.
Now, if you want to know cos phi you just have to determine the angle difference between the motor voltages and the motor current, which again can be done by calculating the scalar product between the normalized voltage and current vectors.
That is the secret of the so called space vector, which you can google for and see, if you understand.
I pledge: finish P2. There is so much unknown to find, risk making small errors, because they can easily be corrected. Easily: if the P2 will not be a success with the performance we see now, it will never be. But if success is here, we can improve it in a next step.
AND: don't discuss too much the language! Don't be hindered by squeezing out the features to serve a language, in which so much junk is written, that you will be happy, never to use it. No more poison is in a lie than in a half truth!
Cluso, how am I missing the point? I think you are.
Peter, I am a customer and fan. I am frustrated with the delays and changes and failures on the P2 development, but I don't post threads saying I am taking my ball and going home like you just did. I work on projects for the P1 and other MCUs and follow the P2 development in hopes that it will someday become something we can buy and use in projects. Yes, I am friends with Ken and Chip, and cut them some slack because of that, but you claimed to really love the Propeller, but still posted this thread.
The P2 is not going to be am ARM or compete directly with any of those many commodity ARM based MCUs out there. It's something different, just like the P1 is now.
I'm not sure what that point was meant to be either. Cluso was ranting about lack of forum participation I think. And he's right, fatigue has clearly set in. Even Ken is agreeing. However, knowing it's tough going doesn't bring the finish any closer.
Just have to keep putting one foot in front of the other for a while longer.
There'll be books written about how the Prop2 came to rule the world!
I just asked if we could expect it to happen soon. I didn't mean that imply any pressure. Just trying to get an idea of where we are in the process.
I think the synthesis switch could be flipped at almost any time.
A smarter question is should it be flipped, which is more a testing-coverage question, than a 'is the code ready' question.
The rate of change has certainly reduced
Reduced but not stopped. New instructions were added just yesterday. I guess that's one reason I'm looking forward to the synthesis step. It will mean that development will finally stop. :-)
I'm not sure what that point was meant to be either. Cluso was ranting about lack of forum participation I think. And he's right, fatigue has clearly set in. Even Ken is agreeing. However, knowing it's tough going doesn't bring the finish any closer.
Just have to keep putting one foot in front of the other for a while longer.
There'll be books written about how the Prop2 came to rule the world!
If you guys think it sucks to keep waiting, imagine what I go through every day.
I'm excited and interested to work on Prop2, but at the same time I know that a tech eternity has passed and the world has changed a lot. So, I entertain my own doubts. What keeps me going is that I'm still getting a steady stream of inspiration to move it forward, which makes me think there is some cosmic purpose in this. All your contributions have been huge, over this time. Even when some of you say you're leaving, I have to imagine that there's some extraordinary reason why you've been here for 11 years, thinking, contributing, and waiting. If the direction the tech world has gone in had been that great, everybody would have been long gone, already.
Reduced but not stopped. New instructions were added just yesterday. I guess that's one reason I'm looking forward to the synthesis step. It will mean that development will finally stop. :-)
It should be noted that was a new instruction only. There was no new hardware, no architectural changes. It was just a result of Chip actually using the Prop2 and realising an easy improvement.
All the critical stuff seems to be done. USB and SmartPins all round got a nice speed boost with the previous release. I don't know if there is anything design wise left to do. The ROM is the last part left to do. Documentation is happening along with this.
Maybe more forumers will jump back in with the better docs ... I'm stuck without access to PNut. Not that I would be a big contributor anyway. I have no compiler skills.
I'm not sure what that point was meant to be either. Cluso was ranting about lack of forum participation I think. And he's right, fatigue has clearly set in. Even Ken is agreeing. However, knowing it's tough going doesn't bring the finish any closer.
Just have to keep putting one foot in front of the other for a while longer.
There'll be books written about how the Prop2 came to rule the world!
If you guys think it sucks to keep waiting, imagine what I go through every day.
I'm excited and interested to work on Prop2, but at the same time I know that a tech eternity has passed and the world has changed a lot. So, I entertain my own doubts. What keeps me going is that I'm still getting a steady stream of inspiration to move it forward, which makes me think there is some cosmic purpose in this. All your contributions have been huge, over this time. Even when some of you say you're leaving, I have to imagine that there's some extraordinary reason why you've been here for 11 years, thinking, contributing, and waiting. If the direction the tech world has gone in had been that great, everybody would have been long gone, already.
Chip,
I realise to some extent what you are going through. The current incarnation of the P2 has not been anywhere near properly tested. A few bugs are being found by the few that are actually using the FPGA emulation.
The market has moved. Micro makers now manufacture many micros with huge flash and large ram. Even 2MB Flash and 512KB RAM is readily available at 200+MHz, together with a host of peripherals.
But IMHO it is time to temporarily shelve the P2 (or P3 or whatever) - it's just a name anyway. As both you and Ken know, I have been advocating this for a number of years now, and I am not alone either. Take a week or two to get a simple P1+ out. This no longer needs to even have the 5 items that were requested of the P1+/P1V. That would satisfy quite a few, if not a lot. And it would give Parallax breathing space and a new revenue stream.
IMHO what is needed for a P1+, in priority order
1. More Hub RAM (hopefully 512KB/1MB) - make it as big as possible to go for the higher end market.
2. 64 I/O
3. 160MHz
4. (only if easy) speedup cog access to 1:8 clocks from 1:16, or 16 cogs with 1:16 clocks
5. Existing 32KB ROM on bootup, able to be switched out (permanently) to RAM by special hub-style instruction
6. A possible aid to LMM to speedup the LMM loop
7. I realise a number of users also wanted security. Is this simple to implement fuses, etc ???
Existing P1 instruction set and Interpreter (even though I have the faster interpreter running on P1V with the vector table squeezed in without loosing any of the log/font/sin/etc.) In fact, only the booter/runner/interpreter are required, so they could be serially loaded into hub ram like you are doing in P2.
I understand you have solved the PLL problem for P2, so the PLLs for VGA should be easy to implement???
Please, seriously take a day or two and think about it.
I know you especially don't want my opinion but it'll never be that quick. And you are talking about a 180 nm production ramp up. That's the money set aside for the Prop2!
I'm not sure what that point was meant to be either. Cluso was ranting about lack of forum participation I think. And he's right, fatigue has clearly set in. Even Ken is agreeing. However, knowing it's tough going doesn't bring the finish any closer.
Just have to keep putting one foot in front of the other for a while longer.
There'll be books written about how the Prop2 came to rule the world!
If you guys think it sucks to keep waiting, imagine what I go through every day.
I'm excited and interested to work on Prop2, but at the same time I know that a tech eternity has passed and the world has changed a lot. So, I entertain my own doubts. What keeps me going is that I'm still getting a steady stream of inspiration to move it forward, which makes me think there is some cosmic purpose in this. All your contributions have been huge, over this time. Even when some of you say you're leaving, I have to imagine that there's some extraordinary reason why you've been here for 11 years, thinking, contributing, and waiting. If the direction the tech world has gone in had been that great, everybody would have been long gone, already.
Chip,
I realise to some extent what you are going through. The current incarnation of the P2 has not been anywhere near properly tested. A few bugs are being found by the few that are actually using the FPGA emulation.
The market has moved. Micro makers now manufacture many micros with huge flash and large ram. Even 2MB Flash and 512KB RAM is readily available at 200+MHz, together with a host of peripherals.
But IMHO it is time to temporarily shelve the P2 (or P3 or whatever) - it's just a name anyway. As both you and Ken know, I have been advocating this for a number of years now, and I am not alone either. Take a week or two to get a simple P1+ out. This no longer needs to even have the 5 items that were requested of the P1+/P1V. That would satisfy quite a few, if not a lot. And it would give Parallax breathing space and a new revenue stream.
IMHO what is needed for a P1+, in priority order
1. More Hub RAM (hopefully 512KB/1MB) - make it as big as possible to go for the higher end market.
2. 64 I/O
3. 160MHz
4. (only if easy) speedup cog access to 1:8 clocks from 1:16, or 16 cogs with 1:16 clocks
5. Existing 32KB ROM on bootup, able to be switched out (permanently) to RAM by special hub-style instruction
6. A possible aid to LMM to speedup the LMM loop
7. I realise a number of users also wanted security. Is this simple to implement fuses, etc ???
Existing P1 instruction set and Interpreter (even though I have the faster interpreter running on P1V with the vector table squeezed in without loosing any of the log/font/sin/etc.) In fact, only the booter/runner/interpreter are required, so they could be serially loaded into hub ram like you are doing in P2.
I understand you have solved the PLL problem for P2, so the PLLs for VGA should be easy to implement???
Please, seriously take a day or two and think about it.
This will also require lots of testing in addition to development time. Better to just finish testing the new P2 and get that into production at this point.
Comments
fasmg has macro sets for various MCUs and an ARM fork, and I did some prelim tests on Prop-opcode handling using fasmg.
One down-side of fasm/fasmg is the lack of linking to HLL's, but if you intend to code (eg forth engine) in ASM, that is less an issue.
I think the synthesis switch could be flipped at almost any time.
A smarter question is should it be flipped, which is more a testing-coverage question, than a 'is the code ready' question.
The rate of change has certainly reduced
Curious why the FPGA P1V solutions wouldn't work for you, in particular OzPropDev's 'generator' that effectively took all the hard work out and pretty much gave you a P1B plus some bonus features
If FPGA is still an option I'm happy to guide you through it.
Was up your way last week, and cluso's too, just didn't have time to spare. Next time.
Well, not really. I'm too busy driving the "just education" marketplace to try to tell anybody how or what to think. Of all the interweb kingdoms this one isn't one to try to manage that way anyway. Just so we all know, the educational market enabled the Propeller 1 and will do the same for Propeller 2, so it shouldn't be underestimated. More specifically, the BASIC Stamp 2, Boe-Bots, Stamps in Class, and now the Blockly system (using Propeller 1) have provided the fuel for Parallax.
While we're here, waiting for P2 (or P5 as Peter called it) to get finished we also need your support with the educational market, whenever you have a chance. Your support comes in many forms, like David Betz's contribution to the WX firmware and Propeller Loader - or some of our lone educators who visit the forums like John Kauffman to seek some help with Propeller C. Do you remember the "welcome a newcomer" drive a few years ago that many of you found sorta creepy? That really helped the atmosphere for noobies! Occasionally a teacher or student will come to the forums and ask questions (many of these demographics want support via Twitter and FB) and you will graciously help them out even if they don't know how to acknowledge your contribution. Most educators aren't familiar with forums and don't have a lot of time to ask questions here, so when they appear they represent a huge opportunity for all of us.
I encourage you to continue lending that kind of support to Parallax and our customers. As we enter the new phase of our educational tutorials with Blockly the future looks very good. As you help us win in that area you will also be enabling a future with the Propeller 2. This includes you, Peter.
Thank you for your support of what we're doing with education!
Ken Gracey
P.S. to Peter and others who are sick of waiting for the Propeller 2. I'm probably more worn out than all of you in this way because I've kept Parallax productive during this period. The human spirit is amazingly resilient so I have a stupid "developed world" story to share as a parallel of where we are in the design cycle and how we'll actually finish it. Once I took a flight from Sacramento to Chicago (before 9-11) which was headed to land but it was diverted to MSP airport a few hundred feet above the runway due to bad weather. After 13 hours of being locked into a dry (no water, alcohol or food) fuselage on the MSP tarmac people were going crazy. A cowboy fellow was preparing to kick the emergency door out and others were in a near-restraint situation when the pilot said "we have to stay in the plane, right here". After a half day, the pilot announced "we've been given clearance to Chicago and we'll arrive there in one hour". Passengers seemed to forget the anguish and discomfort because we were going to be in Chicago shortly. My hope is that when P2 is finally finished we feel the same way about it - forgetting the decade-long design cycle and thinking about using the chip!
Haven't we been on that roller coaster many times around already? I'm not not being confrontational about it, we are all elated to see progress on P2 just as when the roller coaster nears the top but then we go flying back down and twisting around and around again. The "are we there yet" is a bit like Groundhog Day but while time keeps looping in Propsutawney the rest of the world has moved on. Thank you though for reassuring us Ken and thank you Chip for the P1 and may your work bear fruit so that we will have a new generation to "play" with. That is, if I'm still here though.
Yes, we have been on the roller coaster too many times. We all have different tolerances for this kind of process and hindsight is 20/20. I have many thoughts that I wouldn't share here, so suffice it to say I understand your viewpoint. My disposition is not to worry about what I can't change and to place energy where I can be productive instead.
On the subject of byte codes, checking back into fasmg forum, reveals this mention of
WebAssembly
and this wiki says
" WebAssembly is a portable stack machine which is designed to be faster to parse than JavaScript, as well as faster to execute."
and this seems a good idea
It defines a WebAssembly binary format, which is not designed to be used by humans, as well as a human-readable "Linear Assembly Bytecode" format that resembles traditional assembly languages.
Seems quite new, but also well resourced.
Can P2 leverage those byte-codes, and so tap-into a ship-load of resource ?
How does this look, to a forth programmer ?
Yes, that generator was a good idea, tho IIRC Altera only.
Problems with FPGA solutions are price & package and the fact you get 'pushed up the curve', in order to get enough RAM.
The new Lattice parts I mention above, are somewhat unique in having large memory (128KB) and more modest LUT count.
That also drops the price, and the package is also easier to manage than a BGA, so they appeal for any Soft-MCU design.
I think on a per-cog basis, P1 will still be in front for a while, assuming you do not hit any other limits like RAM or IO counts.
A PCB module with a P1 and an ICE40UP5K-SG48 could significantly extend P1 reach.
I understand others are different. It's fine, we are where we are.
More to the point, though, the P1 remains a completely unique micro after nearly 11 years in production and a total joy to work with. I don't feel that I've even begun to tap its full potential. And I think it enjoys a simplicity and a consequent potential for rapid application development (RAD) that the P2 may or may not achieve. So even if I pass on the P2, I've still got a focus for my creative juices.
-Phil
11 years ago, the P1 was pretty much on its' own with RAM. Nowadays, it's way behind and cores/cogs cannot make up for this.
I really enjoy "playing" with the prop. But I have been seriously looking for another chip and unfortunately, the ARM is the alternative, especially since I have to learning another micro, I may as well go with the majority. Lots to choose from and cheap as chips. It is way more complicated, etc, etc. And no, the P1 and ARM don't really compare/compete, but in the end, if you cannot do it with a P1, then one of the ARM's will. It is just a fact of life.
Seriously, if a P1+ was on the short term horizon, I would probably put off shifting to an ARM. But IMHO the P2 is still too far off for me.
I will probably still be working with the P1 as I want to get my grandkids into robots/programming and Blockly looks enticing. I have built an OTTO bot.
@Parallax: Pleaaaaaase... the world wants P8X64... 100% Spin and PASM compatibility to P8X32 and more pins...
...and not FPGA P1 surrogates for $50 or more a piece...
But this is not what I want to tell, that was what I had to tell.
Now the story:
Read about field oriented motor control and you will find the Clarke and Park transform. Try to understand it REALLY. Find out the mathematical background. Read about complex numbers, e power i phi, ..
Now look back to the very basics: Kirchhoffs law: in a closed loop the sum of all voltages is zero. In a node the sum of all incoming currents is zero. In a AC motor we have 3 voltages (U, V, W) and 3 currents (Iu, Iv, Iw) where these laws apply. And now the trick: If 0 = U + V + W then U*1 + V*1 + W*1 = 0. Which in vector representation can be written: ( U, V, W ) * ( 1, 1, 1 ) = 0. This means: a vector in 3-dimensions, having the coordinates of the current terminal voltages of a motor is perpenticular to a vector that is the diagonal of a cube. As the voltages vary sinusoidally over time, all the vectors represented by the voltages over time are perpenticular to one single vector, what means: they are located in a plain. An being in a plain, there is alway a length and an angle relative to a static coordinate system.
Now, if you want to know cos phi you just have to determine the angle difference between the motor voltages and the motor current, which again can be done by calculating the scalar product between the normalized voltage and current vectors.
That is the secret of the so called space vector, which you can google for and see, if you understand.
I pledge: finish P2. There is so much unknown to find, risk making small errors, because they can easily be corrected. Easily: if the P2 will not be a success with the performance we see now, it will never be. But if success is here, we can improve it in a next step.
AND: don't discuss too much the language! Don't be hindered by squeezing out the features to serve a language, in which so much junk is written, that you will be happy, never to use it. No more poison is in a lie than in a half truth!
And just giving DIRB and OUTB a real existence would be a small change to the existing P8X32, so it should not be too complex.
I'm not writing against P(1.5)X(SomeCogCount) with more RAM, but a 100% P8X32 compatible chip with just more pins would open lots of new doors.
Peter, I am a customer and fan. I am frustrated with the delays and changes and failures on the P2 development, but I don't post threads saying I am taking my ball and going home like you just did. I work on projects for the P1 and other MCUs and follow the P2 development in hopes that it will someday become something we can buy and use in projects. Yes, I am friends with Ken and Chip, and cut them some slack because of that, but you claimed to really love the Propeller, but still posted this thread.
The P2 is not going to be am ARM or compete directly with any of those many commodity ARM based MCUs out there. It's something different, just like the P1 is now.
Just have to keep putting one foot in front of the other for a while longer.
There'll be books written about how the Prop2 came to rule the world!
If you guys think it sucks to keep waiting, imagine what I go through every day.
I'm excited and interested to work on Prop2, but at the same time I know that a tech eternity has passed and the world has changed a lot. So, I entertain my own doubts. What keeps me going is that I'm still getting a steady stream of inspiration to move it forward, which makes me think there is some cosmic purpose in this. All your contributions have been huge, over this time. Even when some of you say you're leaving, I have to imagine that there's some extraordinary reason why you've been here for 11 years, thinking, contributing, and waiting. If the direction the tech world has gone in had been that great, everybody would have been long gone, already.
All the critical stuff seems to be done. USB and SmartPins all round got a nice speed boost with the previous release. I don't know if there is anything design wise left to do. The ROM is the last part left to do. Documentation is happening along with this.
Maybe more forumers will jump back in with the better docs ... I'm stuck without access to PNut. Not that I would be a big contributor anyway. I have no compiler skills.
I realise to some extent what you are going through. The current incarnation of the P2 has not been anywhere near properly tested. A few bugs are being found by the few that are actually using the FPGA emulation.
The market has moved. Micro makers now manufacture many micros with huge flash and large ram. Even 2MB Flash and 512KB RAM is readily available at 200+MHz, together with a host of peripherals.
But IMHO it is time to temporarily shelve the P2 (or P3 or whatever) - it's just a name anyway. As both you and Ken know, I have been advocating this for a number of years now, and I am not alone either. Take a week or two to get a simple P1+ out. This no longer needs to even have the 5 items that were requested of the P1+/P1V. That would satisfy quite a few, if not a lot. And it would give Parallax breathing space and a new revenue stream.
IMHO what is needed for a P1+, in priority order
1. More Hub RAM (hopefully 512KB/1MB) - make it as big as possible to go for the higher end market.
2. 64 I/O
3. 160MHz
4. (only if easy) speedup cog access to 1:8 clocks from 1:16, or 16 cogs with 1:16 clocks
5. Existing 32KB ROM on bootup, able to be switched out (permanently) to RAM by special hub-style instruction
6. A possible aid to LMM to speedup the LMM loop
7. I realise a number of users also wanted security. Is this simple to implement fuses, etc ???
Existing P1 instruction set and Interpreter (even though I have the faster interpreter running on P1V with the vector table squeezed in without loosing any of the log/font/sin/etc.) In fact, only the booter/runner/interpreter are required, so they could be serially loaded into hub ram like you are doing in P2.
I understand you have solved the PLL problem for P2, so the PLLs for VGA should be easy to implement???
Please, seriously take a day or two and think about it.