I have bought a breakoutboard for the ICE-Ultra. Never done an own board so far.
The Breakoutboard has a FT2232 but uses only channel A in SPI mode. The second port of the FTDI is not connected, and you need to switch jumpers to decide between programming the FPGA-SRAM cells or the connected Flashchip.
So I think you can use this board as a programming tool, just connect wires at the jumper pins.
I would maybe do it with an USB-PIC that programs direct the Flash while it holds the FPGA in Reset. I think you need anyway an external Flash, unless you do a series product and want to program the internal OTP.
The Icestorm toolchain has also a download-tool. I think it's also made for a FT2232.
And there are solutions with the SPI port of a RasPI (icoboard.org).
I have bought a breakoutboard for the ICE-Ultra. Never done an own board so far.
The Breakoutboard has a FT2232 but uses only channel A in SPI mode. The second port of the FTDI is not connected, and you need to switch jumpers to decide between programming the FPGA-SRAM cells or the connected Flashchip.
Yes, a pity they forgot to connect the second channel that sits there.
A smarter choice for FPGA board is looking like the FT4222H, this is much cheaper & smaller than FT2232H, but still HS-USB and has QuadSPI FLASH path, plus i2c (3.4MHz) and GPIO.
With the QuadSPI flash, it can connect direct to FLASH for downloads, and save code space by removing the need for any bootloader.
Also for P1V, the i2c path can program directly the i2c device (much faster), and so allows simplify loader code to EE-read only, which could even be Verilog ?.
It looks like a high performance pairing for P1V(i2c) would be FT4222H + MB85RC512TPNF(FRAM)
This FRAM part is a somewhat more $ than a EE part, (but for now I cannot locate a 3.4MHz rated EEPROM), but for that it gives much faster download, and very fast programming times.
Ideal for the rapid development loop.
In theory, a 3.4MHz bus + FRAM, could download a 32k image in 86ms
Has anyone used MicroSemi's IGL002 or SmartFusion2 ?
Seems they are expensive. M2GL010-TQG144 $29.83 12K LUT, 64KB SRAM and NOVRAM. M2S010-TQG144 $35.37
Is the software free?
Verilog support?
How easy to program?
64KB SRAM would be a minimum as would 10K LUT. QFP144 for ease of soldering (0.5mm pitch pushes the boundaries but doable. Seems the NOVRAM has some user space too.
The usual Lattice devices are too small for a full P1V, this has changed now with the ECP5.
Lattices architecture is quite similar to old Xilinx devices, so I think a Xilinx version of P1V should compile (with some adaptions for PLL and maybe memory).
I've tried this. Was never able to program the finished product. It's not detected by propman either. I just tried with the latest icestorm. No go! Although, I do see an attempted I2C read. Maybe I should test with a pre-programmed EEPROM.
These parts are quite small. To fit a HX8K I reduced to 2 cogs, 8kB hub ram, and 4kB rom.
Thanks guys. It's good to see where things are at in the Lattice dept. It's probably worth persevering SaucySoliton especially if you are seeing i2c accesses. Everything needs to be set right and lots of things can go wrong with FPGAs/tools etc from my experience though I'm still somewhat of novice there anyway. Hopefully Lattice tools are a bit simpler to use than Quartus. I know I had a hell of a time there with memory image setups and all the endianness/long/byte MIF/HEX, file format variations etc when I was tweaking the boot code to support MAX10 internal flash boot, but managed to get it going in the end, but only by not giving up.
Been away for awhile. What are the recommended fpga boargd for a full P2?
Thanks....
Parallax sells a "Propeller 1-2-3 FPGA" board with a Cyclone V A9 chip for $475 (I think that's the price, anyway). It can hold 16 cogs with 10 smart pins, or 8 cogs with 64 smart pins.
Has anyone used MicroSemi's IGL002 or SmartFusion2 ?
Seems they are expensive. M2GL010-TQG144 $29.83 12K LUT, 64KB SRAM and NOVRAM. M2S010-TQG144 $35.37
Is the software free?
Verilog support?
How easy to program?
64KB SRAM would be a minimum as would 10K LUT. QFP144 for ease of soldering (0.5mm pitch pushes the boundaries but doable. Seems the NOVRAM has some user space too.
The smallest Microsemi parts are cheaper, but of course have less logic...
A3PN010-QNG48 $3.48
AGLN010V5-QNG48I $4.03
AGL030V5-QNG48 34 I/O 48QFN $4.185/520 768 LUT
Those parts could be used to add peripherals where P1 cannot manage.
Thanks Chip I wasnt aware that board was still avail. Now that you are talking Spin 2 and or C I am getting interested again, Just cant seem to wrap my head around pasm....
Thanks Chip I wasnt aware that board was still avail. Now that you are talking Spin 2 and or C I am getting interested again, Just cant seem to wrap my head around pasm....
Once we have Spin2 running, it will be easy to show both Spin and Pasm in a context which is easy to follow.
Cyclone V or 10 is about getting as many logic elements as possible, at the cheapest price.
Max 10 is about having as many features as possible: Non-volatile NOR Flash, ADC, and DDR3 memory controller.
With Max 10 you can have an embedded Linux with the internal Flash, a Nios soft core CPU, and a external DDR3 IC with memory controller IP. And only using 2 ICs.
Don't know if Intel is planning a new Max FPGA with a low power x86 Quark inside. I think it might be worth considering.
Get excited jmg. The cyclone 10 LP eval kit turned up and has a IS66WVH16M8 hyperram onboard.
However the chunky SOIC16 external configuration rom, and not much speed improvement from what we're used to, makes the whole cyclone10 LP experience a tad underwhelming compared with Max10. The EPCQ64 config prom they use on the board is $18, with the usual stock/qty issues associated with something that misses the right price window.
And, there's no onboard video out of any flavor (ntsc/vga/hdmi). Though one could do something via arduino or 40 pin header
I think the 10m08 may be used as an ADC to handle the arduino header analog pins, going by its location.
Perhaps there are alternative configuration methods, I don't know and there aren't other reference boards yet.
What Parallax did on the A7 and A9 boards, with a P8x32 doing the config from flash, starts to hold quite some appeal.
I don't know why they can't do simpler either. I don't think fpgas "do simple" for very long.
After trying to find some common package ground amongst the various Altera families, I'm going with tqfp144 for now. That keeps it simple enough and makes it easy to migrate to P2 when we have silicon.
The breakout to DIL headers looks not unlike the fpga breakouts parallax used to sell many years ago.
Get excited jmg. The cyclone 10 LP eval kit turned up and has a IS66WVH16M8 hyperram onboard.
However the chunky SOIC16 external configuration rom, and not much speed improvement from what we're used to, makes the whole cyclone10 LP experience a tad underwhelming compared with Max10. The EPCQ64 config prom they use on the board is $18, with the usual stock/qty issues associated with something that misses the right price window.
And, there's no onboard video out of any flavor (ntsc/vga/hdmi). Though one could do something via arduino or 40 pin header
Hmm, yes, good news and bad news there...
Could be worth it just to get a wired HyperRAM, but they certainly have complicated the rest....
There is also now OctaFLASH and OctaRAM parts, which are broadly similar to HyperBUS parts, but with a benefit of a 1-pin SPI fall back choice.
That means OctaFLASH should be able to boot P2, and then run Fonts/logging/XIP from the one part, for smallest BOMs.
In the short term, SPI flash part are cheap enough, with FT25H04S-RT ~ 15c/3k and FT25H16S-RT ~ 20c/3k
I see it uses a CY7C68013A as USB-Bridge, not cheap ~$7, but HS-USB and mature, and it also needs the 10M08SAU169C8G Pre-programmed ASSP and the costly Config prom...
Very much an Altera marketing platform, less ideal to deploy as a reference design.
My short list for FPGA/Eval & MCU development support parts would be
FT4222 - HS-USB to QuadSPI direct program, well priced for HS-USB at ~$1.50
NUC505 - HS-USB and MCU, cheapest I've found. 129KR, 512KFlash, ~$1.74, may be able to port Nu-Bridge code ?
FT2232H - HS USB, Dual UART, more expensive, but common, ~$4
In another parallel universe I would think that Parallax could make a board out of something like this that could prove popular. A trusted supplier with good documentation. I haven't checked out this ICE IDE:
Ha yes, the BlackIce. I stumbled across the video presentation on that on YouTube a couple of days ago. It's a great story and the board sounds great. It's not available yet, perhaps November. Also I'm not taken with the idea of the ARM processor stuck on there, after all I'm in this for playing with RISC V cores. If I want an ARM that is what the Raspberry Pi is for. Still, it looks like it will be half the price of the Ico board. We'll see.
I think it would be totally wonderful if Parallax built an FPGA for beginners board with the Lattice parts and put their weight behind it in terms of documentation, tutorials and educational materials. They could use the Open Source tool chain, YoSys. Using SpinalHDL as the hardware design language would make it very approachable for beginners. A super simple IDE to go with that, like the PropTool would be amazing. Kids in school could be creating their own hardware designs as easily as writing Spin!
I think this is a growing area, the next territory opening up for Makers and hackers. Many of whom are familiar with "normal" software by now but would be put off by the mess and complexity that is Verilog and VHDL. The nightmare of the vendors tools like Quartus. And the confusing array of complex and expensive FPGA dev boards out there.
The enthusiasm of those people at the Hebden Bridge OSHCamp given a BlackIce board to play with is a testament to that.
I also think this is a sticky topic. As far as I can tell once someone has cheap FPGA with a RISC V core on it and tons free space for custom logic together with quick and simple design tools, the Propeller 2 becomes obsolete. Who would bother learning all that complex assembler to do what they can do in a few lines of nice looking Scala under SpinalHDL? With much higher performance! Who would tie themselves to a single vendor language and processor when they can create portable designs in Spinal?
...I also think this is a sticky topic. As far as I can tell once someone has cheap FPGA with a RISC V core on it and tons free space for custom logic together with quick and simple design tools, the Propeller 2 becomes obsolete. Who would bother learning all that complex assembler to do what they can do in a few lines of nice looking Scala under SpinalHDL? With much higher performance! Who would tie themselves to a single vendor language and processor when they can create portable designs in Spinal?
I hear what you are saying, but I think it's easier to write software for understandable hardware than to define hardware using HDL's. You can do anything with HDL's, but as complexity grows, things get very tedious. Being able to stay in software cuts your turnaround time down to a second and lets you move a lot faster. Having to wait minutes causes my brain to empty out every time. I don't know that we'll have it, but there must be an optimal impedance match realizable for people's brains, where they have sufficiently capable hardware to work with, in good granule size, their mode of code expression is sane, and their wait is near zero. Even if you can't do everything with that, you have the advantage of being able to try/learn very quickly. You may get to a better place before you know it. It seems all about how to compartmentalize and where to divide the complexity so it's most human-compatible.
I'll bump this thread, now P2 is close to sign-off, as my thinking is there may be room for a FPGA design between P1 and P2, especially in time-line basis.
Imagine a P1V, merged with some P2 Smart Pin Cells, in module form. P1VPC2 ?
This allows P2 Pin-Cell code to be developed, and even field deployed.
The P2 Smart Pin Cells are an important differentiator in the P2 design, so examples of how they can be used, will speed P2 use.
Get excited jmg. The cyclone 10 LP eval kit turned up and has a IS66WVH16M8 hyperram onboard.
Got a mailer from Altera today, claiming
Cyclone 10 GX FPGAs Available Now
Learn more about the new GX Development Kit:
220K LE Intel Cyclone 10 GX FPGA device
PCI Express* form-factor card
USB 3.1, enhanced small form-factor pluggable (SFP+), and Ethernet connectors
FPGA mezzanine card (FMC) connector interfaces for add-on interface modules
DDR3 memory
128MB of user flash memory
then The Intel Cyclone 10 GX FPGA features includes:
12.5 Gbps chip-to-chip transceiver I/O support and 6.6 Gbps backplane support
High-performance 1,866 Mbps external memory interface
1.434 Gbps LVDS I/Os
IEEE 754-compliant hard floating-point digital signal processing (DSP) blocks
..
Part Number EK-10CL025U256 Description CYCLONE 10 EVALUATION KIT
Quantity Available 13 1+ $99.95
Not sure they have those links right ? as it also says Series Cyclone® 10 LP
Part Status Active
Type FPGA
For Use With/Related Products Cyclone 10 LP
Comments
I have bought a breakoutboard for the ICE-Ultra. Never done an own board so far.
The Breakoutboard has a FT2232 but uses only channel A in SPI mode. The second port of the FTDI is not connected, and you need to switch jumpers to decide between programming the FPGA-SRAM cells or the connected Flashchip.
So I think you can use this board as a programming tool, just connect wires at the jumper pins.
I would maybe do it with an USB-PIC that programs direct the Flash while it holds the FPGA in Reset. I think you need anyway an external Flash, unless you do a series product and want to program the internal OTP.
The Icestorm toolchain has also a download-tool. I think it's also made for a FT2232.
And there are solutions with the SPI port of a RasPI (icoboard.org).
Andy
Yes, a pity they forgot to connect the second channel that sits there.
A smarter choice for FPGA board is looking like the FT4222H, this is much cheaper & smaller than FT2232H, but still HS-USB and has QuadSPI FLASH path, plus i2c (3.4MHz) and GPIO.
With the QuadSPI flash, it can connect direct to FLASH for downloads, and save code space by removing the need for any bootloader.
Also for P1V, the i2c path can program directly the i2c device (much faster), and so allows simplify loader code to EE-read only, which could even be Verilog ?.
It looks like a high performance pairing for P1V(i2c) would be FT4222H + MB85RC512TPNF(FRAM)
This FRAM part is a somewhat more $ than a EE part, (but for now I cannot locate a 3.4MHz rated EEPROM), but for that it gives much faster download, and very fast programming times.
Ideal for the rapid development loop.
In theory, a 3.4MHz bus + FRAM, could download a 32k image in 86ms
and I see news of MicroSemi's PolarFire.
https://www.microsemi.com/products/fpga-soc/fpga/polarfire-fpga#product-table
Cheapest listed
MPF100T-FCG484E 284 I/O Lines PolarFire Non-Volatile FPGA - Flip Chip 484 $94.56/24 109K LE TotalRAM 7.6 Mbits
MPF300T-FCG484E $241.41/24 TotalRAM 300K LE 20.6 Mbits
Eval: MPF300-EVAL-KIT-ES Programmable Logic IC Development Tools Eval Kit - PolarFire FPGAs 1: $1,495.00
At $94 / 109k, broadly similar to the largest Cyclone 10. EVAL boards are not cheap.
Seems they are expensive. M2GL010-TQG144 $29.83 12K LUT, 64KB SRAM and NOVRAM. M2S010-TQG144 $35.37
Is the software free?
Verilog support?
How easy to program?
64KB SRAM would be a minimum as would 10K LUT. QFP144 for ease of soldering (0.5mm pitch pushes the boundaries but doable. Seems the NOVRAM has some user space too.
Thanks guys. It's good to see where things are at in the Lattice dept. It's probably worth persevering SaucySoliton especially if you are seeing i2c accesses. Everything needs to be set right and lots of things can go wrong with FPGAs/tools etc from my experience though I'm still somewhat of novice there anyway. Hopefully Lattice tools are a bit simpler to use than Quartus. I know I had a hell of a time there with memory image setups and all the endianness/long/byte MIF/HEX, file format variations etc when I was tweaking the boot code to support MAX10 internal flash boot, but managed to get it going in the end, but only by not giving up.
Thanks....
Parallax sells a "Propeller 1-2-3 FPGA" board with a Cyclone V A9 chip for $475 (I think that's the price, anyway). It can hold 16 cogs with 10 smart pins, or 8 cogs with 64 smart pins.
see this link on the new PolarFire
https://www.microsemi.com/products/fpga-soc/design-resources/dev-kits/polarfire/polarfire-eval-kit
For that $1495, you get "1 Year Libero Gold Software License included with kit ($995 value)"
The smallest Microsemi parts are cheaper, but of course have less logic...
A3PN010-QNG48 $3.48
AGLN010V5-QNG48I $4.03
AGL030V5-QNG48 34 I/O 48QFN $4.185/520 768 LUT
Those parts could be used to add peripherals where P1 cannot manage.
> 64kB I find
M2GL005-TQ144 84 I/O 144TQFP 13.33850/1k 6060 LUT 719872b RAM
M2GL010-TQ144 84 I/O 144TQFP 25.34700/1k 12084 LUT 933888b RAM
Cyclone and Lattice seem to be ahead in this zone, on LUT/$
Once we have Spin2 running, it will be easy to show both Spin and Pasm in a context which is easy to follow.
https://www.digikey.com/product-detail/en/altera/10CL025YU256I7G/544-3392-ND
I ask myself, which advantages do they have over the MAX10 line ? besides price.... MAX10 is much more expensive.
Max 10 is about having as many features as possible: Non-volatile NOR Flash, ADC, and DDR3 memory controller.
With Max 10 you can have an embedded Linux with the internal Flash, a Nios soft core CPU, and a external DDR3 IC with memory controller IP. And only using 2 ICs.
Don't know if Intel is planning a new Max FPGA with a low power x86 Quark inside. I think it might be worth considering.
However the chunky SOIC16 external configuration rom, and not much speed improvement from what we're used to, makes the whole cyclone10 LP experience a tad underwhelming compared with Max10. The EPCQ64 config prom they use on the board is $18, with the usual stock/qty issues associated with something that misses the right price window.
And, there's no onboard video out of any flavor (ntsc/vga/hdmi). Though one could do something via arduino or 40 pin header
After all that there is only 36 GPIO pins coming out. And a few more on the PMOD connector I guess.
Why can't they put out something simple?
Aren't there alternatives to the EPCQ64 config prom if you want to spin your own board?
Perhaps there are alternative configuration methods, I don't know and there aren't other reference boards yet.
What Parallax did on the A7 and A9 boards, with a P8x32 doing the config from flash, starts to hold quite some appeal.
I don't know why they can't do simpler either. I don't think fpgas "do simple" for very long.
Which is why I'm leaning towards the Lattice 8K parts and boards. Like the icoboard:
http://icoboard.org/
https://shop.trenz-electronic.de/de/Produkte/OnSite-Broadcast/
Which I will be following up when I get back home.
Seems to be about as simple as it gets. FPGA, lot's of I/O available. No other junk.
I don't need any stupid ARM core built in or ethernet etc, I have the Raspi for that or other little ARM dodads. Or just drop a RISC-V core in there.
Development is quick and easy with the Open Source tools now available.
It's just that perhaps it would be nice to have such a simple thing with 10 or 20 times more logic available. A Cyclone for example.
After trying to find some common package ground amongst the various Altera families, I'm going with tqfp144 for now. That keeps it simple enough and makes it easy to migrate to P2 when we have silicon.
The breakout to DIL headers looks not unlike the fpga breakouts parallax used to sell many years ago.
Hmm, yes, good news and bad news there...
Could be worth it just to get a wired HyperRAM, but they certainly have complicated the rest....
There is also now OctaFLASH and OctaRAM parts, which are broadly similar to HyperBUS parts, but with a benefit of a 1-pin SPI fall back choice.
That means OctaFLASH should be able to boot P2, and then run Fonts/logging/XIP from the one part, for smallest BOMs.
In the short term, SPI flash part are cheap enough, with FT25H04S-RT ~ 15c/3k and FT25H16S-RT ~ 20c/3k
I see it uses a CY7C68013A as USB-Bridge, not cheap ~$7, but HS-USB and mature, and it also needs the 10M08SAU169C8G Pre-programmed ASSP and the costly Config prom...
Very much an Altera marketing platform, less ideal to deploy as a reference design.
My short list for FPGA/Eval & MCU development support parts would be
FT4222 - HS-USB to QuadSPI direct program, well priced for HS-USB at ~$1.50
NUC505 - HS-USB and MCU, cheapest I've found. 129KR, 512KFlash, ~$1.74, may be able to port Nu-Bridge code ?
FT2232H - HS USB, Dual UART, more expensive, but common, ~$4
http://fpgaforum.blogspot.com.au/2015/06/any-replacement-for-altera-epcq-devices.html
Heater - check this one out before you pull the trigger. Let me know what you think. I'll put a link of MyStorm in action:
https://forum.mystorm.uk/t/acorn-atom-implementation-for-mystorm-blackice/228/4
In another parallel universe I would think that Parallax could make a board out of something like this that could prove popular. A trusted supplier with good documentation. I haven't checked out this ICE IDE:
http://icestudio.readthedocs.io/en/latest/
Icestudio looks like a cool development. On the other hand I'm aiming to work in SpinalHDL. https://spinalhdl.github.io/SpinalDoc/
Thanks for the heads up.
I think it would be totally wonderful if Parallax built an FPGA for beginners board with the Lattice parts and put their weight behind it in terms of documentation, tutorials and educational materials. They could use the Open Source tool chain, YoSys. Using SpinalHDL as the hardware design language would make it very approachable for beginners. A super simple IDE to go with that, like the PropTool would be amazing. Kids in school could be creating their own hardware designs as easily as writing Spin!
I think this is a growing area, the next territory opening up for Makers and hackers. Many of whom are familiar with "normal" software by now but would be put off by the mess and complexity that is Verilog and VHDL. The nightmare of the vendors tools like Quartus. And the confusing array of complex and expensive FPGA dev boards out there.
The enthusiasm of those people at the Hebden Bridge OSHCamp given a BlackIce board to play with is a testament to that.
I also think this is a sticky topic. As far as I can tell once someone has cheap FPGA with a RISC V core on it and tons free space for custom logic together with quick and simple design tools, the Propeller 2 becomes obsolete. Who would bother learning all that complex assembler to do what they can do in a few lines of nice looking Scala under SpinalHDL? With much higher performance! Who would tie themselves to a single vendor language and processor when they can create portable designs in Spinal?
I hear what you are saying, but I think it's easier to write software for understandable hardware than to define hardware using HDL's. You can do anything with HDL's, but as complexity grows, things get very tedious. Being able to stay in software cuts your turnaround time down to a second and lets you move a lot faster. Having to wait minutes causes my brain to empty out every time. I don't know that we'll have it, but there must be an optimal impedance match realizable for people's brains, where they have sufficiently capable hardware to work with, in good granule size, their mode of code expression is sane, and their wait is near zero. Even if you can't do everything with that, you have the advantage of being able to try/learn very quickly. You may get to a better place before you know it. It seems all about how to compartmentalize and where to divide the complexity so it's most human-compatible.
Imagine a P1V, merged with some P2 Smart Pin Cells, in module form. P1VPC2 ?
This allows P2 Pin-Cell code to be developed, and even field deployed.
The P2 Smart Pin Cells are an important differentiator in the P2 design, so examples of how they can be used, will speed P2 use.
and from earlier
The LFE5U-25F-6BG381C I see is 90+$9.05, so the price is tolerable.
Addit: the smaller 10mm package has order codes and prices, but no stock, Digikey says Nov Delivery.
LFE5UM-25F-6MG285C 118 I/O, 1.1V, 1+ $10.87
Checking Oscillators in ECP5 ( I think compile time only, no runtime changes to VCO ? ) Looks like 480MHz and 720MHz are valid starting VCO points, that give 80MHz as one divided choice, and 12MHz*N as others.
Got a mailer from Altera today, claiming
Cyclone 10 GX FPGAs Available Now
Learn more about the new GX Development Kit:
220K LE Intel Cyclone 10 GX FPGA device
PCI Express* form-factor card
USB 3.1, enhanced small form-factor pluggable (SFP+), and Ethernet connectors
FPGA mezzanine card (FMC) connector interfaces for add-on interface modules
DDR3 memory
128MB of user flash memory
then
The Intel Cyclone 10 GX FPGA features includes:
12.5 Gbps chip-to-chip transceiver I/O support and 6.6 Gbps backplane support
High-performance 1,866 Mbps external memory interface
1.434 Gbps LVDS I/Os
IEEE 754-compliant hard floating-point digital signal processing (DSP) blocks
..
Part Number EK-10CL025U256 Description CYCLONE 10 EVALUATION KIT
Quantity Available 13 1+ $99.95
Not sure they have those links right ? as it also says
Series Cyclone® 10 LP
Part Status Active
Type FPGA
For Use With/Related Products Cyclone 10 LP
ahh, yes, the real $1200 board is here...
https://www.altera.com/products/boards_and_kits/dev-kits/altera/cyclone-10-gx-development-kit.html
However the interesting thing is that it may run a P2 at close to silicon speeds. I think the Pro version of Quartus can do compiles for the C10GX.