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WRLONG events not working? — Parallax Forums

WRLONG events not working?

SeairthSeairth Posts: 2,474
in Propeller 2
Here's my test code. Based on a comment by @cgracey, I believe the WRLONG interrupt is #5. Also, based on another comment from @cgracey, the first event-triggering LONG is now located at $FFF80.

Assuming I've written everything correctly, GRN 0 (on 1-2-3 board) should light up. But it's not. All others light up as expected. Thoughts?
dat
        org 0

        coginit #16, #@test_wrl                 ' start cog with interrupt
        
        setb    dirb, #2                        ' lit when WRLONG occurs
        setb    dirb, #3                        ' lit with RDLONG verified

        waitx   ##$FFFFFF                       ' wait for other cog to init

        wrlong  ##$ABADCAFE, hwr0               ' write to first event-triggering long
        setb    outb, #2

        rdlong  temp, ##$FFF80                  ' read value back and make sure it's the same
        cmp     temp, ##$ABADCAFE wz
if_z    setb    outb, #3
        
.loop   jmp #.loop                              ' wait forever...

hwr0    long    $FFF80
temp    long    0


        org 0
test_wrl
        setb    dirb, #0                        ' lit when ISR is called
        setb    dirb, #1                        ' lit when cog is finished initializing

        setwrl  #%0000                          ' set WRL for first event-triggering long
        mov     ijmp1, #isr                     ' set up ISR
        setint1 #5                              ' enable interrupt

        setb    outb, #1

.loop   jmp #.loop                              ' wait forever...

isr     setb    outb, #0                        ' called when WRLONG event is triggered
        reti1

Comments

  • SeairthSeairth Posts: 2,474
    Also, I have tried using WAITWRL instead of an ISR, but it made no difference.
  • rjo__rjo__ Posts: 2,114
    Same result here... wish I could help:)
  • SeairthSeairth Posts: 2,474
    rjo__ wrote: »
    Same result here... wish I could help:)

    Confirmation is a good start. :)

  • SeairthSeairth Posts: 2,474
    Verified that the issue was not related to "LOCK Interrupts miss initial event(s)", though it's certainly possible that this event also has that problem.
  • cgraceycgracey Posts: 14,134
    That code looks good. Something must have gotten broken when I moved the sensitivities near the end of hub.

    I am traveling right now, but at the end of the day I will be able to look into this.
  • SeairthSeairth Posts: 2,474
    Sounds good.

    As an aside (very LOW priority), if you have to make any changes to this event code, maybe consider adding the following:

    setwrl D/#, where value is %mm_iiii

    mm: mode
    00 : any written value
    01 : non-zero written
    10 : zero written
    11 : any written value

    iiii: index

    This give WRLONG events the same granularity as EDGE events.
  • cgraceycgracey Posts: 14,134
    Great idea! That's easy to do, too.
  • Roy ElthamRoy Eltham Posts: 3,000
    Chip & Seairth,
    I like that, but change the 11 mode to be wrote 0xFFFFFFFF (-1 or TRUE in Spin).
  • SeairthSeairth Posts: 2,474
    Roy Eltham wrote: »
    Chip & Seairth,
    I like that, but change the 11 mode to be wrote 0xFFFFFFFF (-1 or TRUE in Spin).

    I was thinking that too, but then I wanted to generalize to tests for positive negative, zero, not zero, etc...

    My original suggestion has parity with edge/lock events, which has merit.

    In the end, I'm fine with Chip implementing it however he wants. Just as long as it doesn't delay anything. :)
  • cgraceycgracey Posts: 14,134
    Well, I looked at the code, but it looks quite okay. I'll just need to test this when I get back home.

    I really wanted to work more on the documentation tonight, but I need to get some sleep for tomorrow.

    Sorry I'm not any more help at this time. I'll be back on top of things soon.
  • Roy ElthamRoy Eltham Posts: 3,000
    Chip,
    Is pnut loading that long with the address into the cog appropriately in Seairth's example?

    Seairth,
    Try moving the address value into the register from a long immediate (mov hwr0, ##$FFF80), instead of having it be just preset in the data.
  • SeairthSeairth Posts: 2,474
    Roy Eltham wrote: »
    Chip,
    Is pnut loading that long with the address into the cog appropriately in Seairth's example?

    Seairth,
    Try moving the address value into the register from a long immediate (mov hwr0, ##$FFF80), instead of having it be just preset in the data.

    That was the purpose of the RDLONG test.
  • cgraceycgracey Posts: 14,134
    edited 2015-10-17 13:54
    Roy Eltham wrote: »
    Chip & Seairth,
    I like that, but change the 11 mode to be wrote 0xFFFFFFFF (-1 or TRUE in Spin).

    Signed/unsigned detection is important because lower bits can carry a payload.
  • cgraceycgracey Posts: 14,134
    Roy Eltham wrote: »
    Chip,
    Is pnut loading that long with the address into the cog appropriately in Seairth's example?

    It all looks okay to me.
  • SeairthSeairth Posts: 2,474
    Keeping this alive... I also verified that pnut compiled the SETWRL instruction correctly.
  • cgraceycgracey Posts: 14,134
    I would have already had this fixed, but I'm still traveling for a few more days and I don't have access to my whole setup. I'm glad you guys are still trying things.
  • SeairthSeairth Posts: 2,474
    Chip,

    What was the reasoning for making SETWRL/SETRDL long-only? Now that the instructions have the configuration bit space, could you generalize these to byte addresses instead?

    SETHWR %xx_yyyyyy 'hub write-event
    SETHRD %xx_yyyyyy 'hub read-event

    My thought is that the operation (byte/word/long) doesn't matter, just the starting address. As a result, if you had a SETHWR %00_000001 (matching $FFF81), you would get the event for "WRBYTE/WORD/LONG val, ##FFF81", but not "WRWORD/LONG val, ##FFF80".
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