As I said, lots of theory, no practical. I want to see something.
I'm lost - users are downloading now with CP2110 (see above), and also CP2102N, and have downloaded to P1 for decades.
That's just a serial link.
The MCUs suggested are certainly working in many applications too.
Is all that not practical enough for you ?
No one has to use a small MCU, but they can do more that just replace a UART, and that's why they are worth tracking.
All those other solutions are not going away.
Expanding : in the SiLabs HID examples, I find this older host example
..\SimplicityStudio\v4\developer\sdks\8051\v4.1.1\examples\C8051F380DK\USB\HID\HIDtoUARTExample\ReadMe.txt
That does seem to extract a HID 32b BAUD value, and update at 24MHz the UART0.TH1(8b) timers, so not the higher resolution possible of 48MHz & UART1.SBRL1(16b) of the UB3 - minor stuff.
Compiles as
F38x_HIDtoUARTExample.lnp "./src/F380_HIDtoUART.OBJ",
"./src/F3xx_USB0_Descriptor.OBJ",
"./src/F3xx_USB0_InterruptServiceRoutine.OBJ",
"./src/F3xx_USB0_Main.OBJ",
"./src/F3xx_USB0_ReportHandler.OBJ",
"./src/F3xx_USB0_Standard_Requests.OBJ",
"./src/SILABS_STARTUP.OBJ"
TO "F38X_HIDTOUARTEXAMPLE.OMF.CRBUILD"
Program Size: data=88.2 xdata=384 const=181 code=4097
LX51 RUN COMPLETE. 0 WARNING(S), 0 ERROR(S)
Running that on a C8051F381 Eval Board, (set for 24MHz sysCLK) Win 10 PC connects as this
I dug around and found a PC-Host HIDtoUART.cpp, that compiles to HIDtoUART.exe
I edited the 1200..230400 limits, to be instead 1000..2000000 which is better more HW related boundaries for limits testing.
Txmit tests ok on that from whole range of 1000~ 2MBd, TX of 2000 'U' counts 10,000 =\_ edges as expected. (ie nothing dropped in TX side)
RX looks ok, but large/slow packets have some timeout in the TestSW at low speeds (more than a few seconds), and above ~ 600k baud, the loopback test starts to drop Rx Chars.
600k is ok, 631578 is ok, and 666666 fails, so that's suspiciously close to the 63/64? Bytes/ms indicated in some places.
At 2MBd-Echo, burst (mouse click) packets up to 328 bytes look ok, and ~343 fails, so limit is somewhere around there. Unclear what sets that.
HID does seem to have lower total throughput than VCP, FWIU endpoints come into the mix, and looks like ~64 bytes/ms/endpoint ? so appx 640kBaud sustained ?
Addit: Google also finds this, that seems to confirm the 64kB sustained limit per interface (endpoint) ? https://github.com/shraken/efm8_hidmulti
says "Demonstrates a USB device using multiple HID interfaces using a full speed USB Silicon Labs EFM8UB2 device. This approach allows higher data rates over USB interrupt endpoints by spreading out the communication across multiple interfaces. The example provided demonstrates a dual interface allowing 128kB/sec but could be expanded to three interfaces for 192kB/sec on the EFM8UB2 device family.
Other USB microcontrollers with more FIFO endpoints can expand this scaling even further.
A software project using the hidapi library is provided to verify data receipt on the host.
This project builds for a Silicon Labs EFM8UB2 device type and was tested on the EFM8UB2 Universal Bee starter kit.
The porting effort is described in a blog entry I posted."
I’m confused about what cluso means also. I have a prop loader app that loads the P1 on silabs Cp2110 HID usb UART. I program props all day every day. I would never burden a client with ftdi232 and the massive headaches of updates involved in that. With HID there is never an issue for any user to get Mac or pc to load binaries to P1 with my apps.
BTW I never care about throughput and never tested. I only care about remote clients updating firmware
Here is my Prop loader Cp2110 app. It has a few features on the app to test a couple of GPIO and mess around with the config values. Basically I just hit Load File and find a binary, then hit Upload Eeprom. Very simple. I hope to convert this to P2 once I can get one a learn the load method.
Because it can control GPIO, I have a new board with two props, and one of the load buttons will program one p1 and the other load button will load the other. Load EEPROM #1 and Load EEPROM #2. On Button Press, that button will first turn on or off a GPIO pin that controls some switches to determine which P1 the reset, tx and rx are connected to. So 1 usb interface can program two devices.
Here is my Prop loader Cp2110 app. It has a few features on the app to test a couple of GPIO and mess around with the config values. Basically I just hit Load File and find a binary, then hit Upload Eeprom. Very simple. I hope to convert this to P2 once I can get one a learn the load method.
Because it can control GPIO, I have a new board with two props, and one of the load buttons will program one p1 and the other load button will load the other. Load EEPROM #1 and Load EEPROM #2. On Button Press, that button will first turn on or off a GPIO pin that controls some switches to determine which P1 the reset, tx and rx are connected to. So 1 usb interface can program two devices.
What Baud rates do you use for the various 'buttons' to download ?
This is what the SiLabs test program looks like :
Does your code require/assume a specific VID/PID ?
The module is interesting, as it suggests firmware is installed and available, and offers HS-USB with
* Asynchronous Serial data transfer rates from 300 baud to 12 Mbaud at TTL levels
* One SPI master supports single / dual / quad modes of data transfer. Clock rate is up to 25 MHz
* One SPI slave support single data transfer with 25MHz clock (SCH hints this could be quad ? )
* I2C bus interface can be configured as master or slave, with data transfers up to 3.4Mbps
Data is vague on exactly what works 'out of the box', in what driver forms ? ie which are VCOM and which are BOMS/HID/CDC or D2xx ?
If it can manage all of the above, at the same time, that's getting useful.
.. and more news on OctalSPI/HyperBUS Memory front :
Cypress: The Semper Flash family includes AEC-Q100 automotive-qualified devices with an extended temperature range of -40°C to +125°C, supports 1.8-V and 3.0-V operating ranges, and is available in densities of 512Mb through 4Gb. The devices are offered with Quad Serial Peripheral Interface (SPI), Octal SPI and HyperBus™ interfaces. The Octal and HyperBus interface devices are compliant with the JEDEC eXpanded SPI (xSPI) standard for high-speed x8 serial NOR Flash and offer read bandwidth of 400 MBps.
Availability : Cypress' 512Mb Semper Flash devices are sampling to lead customers now, with qualified samples available in the fourth quarter of 2018. Volume production of the devices with 24-ball BGA, 16-pin SOIC and 8-contact WSON packages is expected in the first quarter of 2019.
These devices match the P2 temperature range, and would be well suited to higher reliability industrial uses.
Addit: Data has this (quite fast erase times)
•Program Time: 0.517 ms
•Erase Time: 773 ms
LOW POWER
•Deep Power Down: 1.3 μA
•Standby: 11 μA
INTERFACE TYPE
•Quad SPI
•HyperBus
•Octal
TEMPERATURE RANGE
•Automotive Grade 1: -40°C to 125°C
•Automotive Grade 2: -40°C to 105°C
•Automotive Grade 3: -40°C to 85°C
•Industrial Plus: -40°C to 105°C
•Industrial: -40°C to 85°C
Safety Features
❐ Functional Safety with the Industry’s first ISO26262 ASIL B compliant and ASIL D ready NOR flash
❐ EnduraFlex Architecture provides High-Endurance and Long Retention Partitions
❐ Interface Cyclic Redundancy Check (CRC) detects errors on communication interface between host controller and Semper Flash device
❐ Data Integrity CRC detects errors in memory array
❐ SafeBoot reports device initialization failures, detects configuration corruption and provides recovery options
❐ Built-in Error Correcting Code (ECC) corrects Single-bit Error and detects Double-bit Error (SECDED) on memory array data
❐ Sector Erase Status indicator for power loss during erase
AutoBoot enables immediate access to the memory array following power-on
Hardware Reset through CS# Signaling method (JEDEC) OR individual RESET# pin
It also shows a M0 MCU inside, so this may have some delays ? - not clearly spec'd on the data thus far. Does mention Autoboot mode ?
..and recent news about protection for industrial USB ports... for those looking at P2 direct-pin USB ports, this sort of protection could be important.
"QFN24 4x4mm Protects from overvoltage, negative voltage, and ground potential differences; Integrated ±50VDC protection for VBUS/GND power lines; Integrated ±40.7VDC protection for D+/D- data lines"
I want to see you show a live example of booting and downloading code to a P1 (since you haven't invested in anything to test P2).
As I said, lots of theory, no practical. I want to see something. Then I may be convinced.
The module is interesting, as it suggests firmware is installed and available, and offers HS-USB with
* Asynchronous Serial data transfer rates from 300 baud to 12 Mbaud at TTL levels
* One SPI master supports single / dual / quad modes of data transfer. Clock rate is up to 25 MHz
* One SPI slave support single data transfer with 25MHz clock (SCH hints this could be quad ? )
* I2C bus interface can be configured as master or slave, with data transfers up to 3.4Mbps
Data is vague on exactly what works 'out of the box', in what driver forms ? ie which are VCOM and which are BOMS/HID/CDC or D2xx ?
If it can manage all of the above, at the same time, that's getting useful.
I'll bump with more on this , after some dialog with FTDI re their FT93x series
They state the max baud is 8MBd, but also admit when pressed for PLL info, that the SysCLK on these parts is 100MHz and only can be 100MHz
- that's quite restrictive, and means their claimed 8MBd is not correct, as it will be 8.3333' MBd, or 7.6923 MBd when derived from 100MHz
It's a pity they do not allow for 96MHz, as then their UART Baud rates would be compatible with their (and others) UART parts - those all use 48/24MHz derived baud, which is USB based.'
Suggests 50/tube, with stock lead time of 4 weeks (7/25/2018) @ $0.88140/50
Si5351A-B05335-GT Crystal Frequency (MHz): 27.000000000 Internal Load Capacitance (pF): 10 SSC: Disabled Default I2C address: 0x60
CLK0 (MHz): 5.000000000 from PLLA
CLK1 (MHz): 1.000000000 from PLLA
CLK2 (MHz): 2.000000000 from PLLA
ie this pre-programmed part powers up (no i2c action), with the above defaults of 5MHz/2MHz/1MHz
Suitable Crystals could be
XRCGB27M000FAN00R0 Murata CRYSTAL 27.0000MHZ $0.15750/3k ±25ppm ±25ppm (2.00mm x 1.60mm)
Murata do make ±10ppm Xtals in that family, but not showing at 27MHz - appears that 24,25,26,32 MHz are the mainstream choices - 10ppm models spec 2ppm/year aging, vs 5ppm for 25ppm
Seems those are recent ones, targeting bluetooth designs
other candidates :
TSX-3225 25.0000MF20X-AJ3 EPSON $0.255/3k Crystal 25MHz ±20ppm ±10ppm 8pF 40 Ohms (3.20mm x 2.50mm) aging : ±1ppm/yr max
ABM10W-27.0000MHZ-7-B1U-T3 $0.36/3k 27MHz ±10ppm ±10ppm 7pF 100 Ohms Fundamental -20°C ~ 70°C (2.50mm x 2.00mm) aging : ±2ppm/yr max
5MHz default works well with P1, and some i2c bytes can bump that to any MHz value.
"Delivering up to 2x greater throughput at 4x lower power consumption versus competing solutions, the MAX22445 provides reliable communication across the isolation barrier to ensure safe operation of compact industrial, medical and other equipment."
Not as cheap as a venerable H11L1, but far faster and with higher isolation and with 4 channels in SO16W, if you need speed and isolation this looks a nice series.
Looks like much of that secure delivery infrastructure is already in place :
Crypto Tool The CryptoTool is an assist tool for M2351 for cryptography calculation.
▪ Generate private key with 256 bits width
▪ Support ECC NIST P-256 including public key calculation, ECDSA and ECDH
▪ Support AES CFB mode with 256 bits width
▪ Support SHA-256
▪ Pack firmware for OTA firmware package 1.1.3 (2018/09/07) Download
NuMicro M2351 Secure ISP Tool NuMicro M2351 Secure ISP Tool provides secure channel for firmware upgrade,
it communicates with M2351 MaskROM library through UART/USB interfaces. 1.00 (2018/09/06) Download
The processor core of the M2351, is modest, with
64MHz Core speed and 32-bit Single-cycle hardware multiplier and 32-bit 17-cycle hardware divider
but that helps P2, as the P2 does the heavy lifting....
The USB means this could be a 'better bridge' offering for P2.
Package Range is quite impressive here : The 2 smallest could fit on a Eval / Breakout 'P2D2 like' Board...
▪ Communication interfaces
– Up to 11 UART interfaces (up to 10.66 MHz), with up to 3 ISO-7816-3 interfaces, 6 RS-485, 6 IrDA and 2 LIN interfaces
– Up to 5 I2C interfaces (up to 1 Mbps), with up to 3 I2C with SM Bus/ PM Bus
– Up to 7 SPI interfaces (up to 64 MHz), with 4 I2S interfaces, additional 1 Quad-SPI interface
– Up to 5 I2S interfaces, 4 I2S shared with 4 SPI
– Secure Digital I/O (SDIO)(up to 50 MHz)
and there is a free CAN bus too.... ▪ Advanced connectivity
– USB 2.0 full speed OTG controller with on-chip PHY
– One CAN interface up to 1 Mbps (CAN 2.0A and 2.0B standard)
– Support crystal-less
and other stuff that complements P2, or can co-operate with P2 to result in a secure product.
▪ Analog
– One 12-bit, 3.76M SPS at 64MHz SAR ADC (with 6 fast channels, total up to 16 channels)
– Two 12-bit, 1M SPS DACs
– Two rail-to-rail comparators (CMP)
▪ Motor interfaces
– Up to 2 quadrature encoder interfaces (QEI)
– 2 input capture timers (ECAP)
Not sure of prices, but anything that can fit into a 3.2mm package, is not likely to be P2-impact-significant/ ?
The processor core of the M2351, is modest, with
64MHz Core speed and 32-bit Single-cycle hardware multiplier and 32-bit 17-cycle hardware divider
but that helps P2, as the P2 does the heavy lifting....
The USB means this could be a 'better bridge' offering for P2.
Package Range is quite impressive here : The 2 smallest could fit on a Eval / Breakout 'P2D2 like' Board...
▪ Communication interfaces
– Up to 11 UART interfaces (up to 10.66 MHz), with up to 3 ISO-7816-3 interfaces, 6 RS-485, 6 IrDA and 2 LIN interfaces
– Up to 5 I2C interfaces (up to 1 Mbps), with up to 3 I2C with SM Bus/ PM Bus
– Up to 7 SPI interfaces (up to 64 MHz), with 4 I2S interfaces, additional 1 Quad-SPI interface
– Up to 5 I2S interfaces, 4 I2S shared with 4 SPI
– Secure Digital I/O (SDIO)(up to 50 MHz)
and there is a free CAN bus too.... ▪ Advanced connectivity
– USB 2.0 full speed OTG controller with on-chip PHY
– One CAN interface up to 1 Mbps (CAN 2.0A and 2.0B standard)
– Support crystal-less
and other stuff that complements P2, or can co-operate with P2 to result in a secure product.
▪ Analog
– One 12-bit, 3.76M SPS at 64MHz SAR ADC (with 6 fast channels, total up to 16 channels)
– Two 12-bit, 1M SPS DACs
– Two rail-to-rail comparators (CMP)
▪ Motor interfaces
– Up to 2 quadrature encoder interfaces (QEI)
– 2 input capture timers (ECAP)
Not sure of prices, but anything that can fit into a 3.2mm package, is not likely to be P2-impact-significant/ ?
Prices are up,https://direct.nuvoton.com/en/m2351-series/
Not quite pin count linear, (no price on WLSCP49) - shows just over $2/1k, but those are for 512kF and 96kR, so quite large parts.
10.66MBd UARTS, 64MHz SPI/i2s, and SDIO to 50MHz are all quite good P2 testing links.
The ADC and DACs could exercise the P2 Analog features too..
QFN33 would place quite well next to a P2, I'm liking this M2351, it has a lot of P2-compatible HW peripherals and looks future proof.
They are low cost, and could provide a means to interface P2 to HS-USB, eg USB3343 is $1.28/1+
Less clear is how complex the total SW is, but this can also manage FS-USB.
Another HS-USB pathway, with low module and aliexpress chip prices is the CY7C68013A
New EEPROM M95M04-DR SRP SECV TB BP2 BP1 BP0 WEL BUSY << flash
WREN Write enable 0000 0110
WRDI Write disable 0000 0100
RDSR Read Status register 0000 0101 SRWD 0 0 0 BP1 BP0 WEL WIP << EEPROM
WRSR Write Status register 0000 0001
READ Read from Memory array 0000 0011
WRITE Write to Memory array 0000 0010
RDID Read Identification page 1000 0011
WRID Write Identification page 1000 0010
RDLS Reads the Identification page lock status 1000 0011
LID Locks the Identification page in read-only mode 1000 0010
That looks to be P2 boot compatible, at first glance ?
EEPROM is quite a bit more expensive than Flash, but specs 4 million write cycles, so could appeal to someone wanting boot+logging in one package.
Other candidates look to be
Fujitsu FRAM
Fujitsu ReRAM
Everspin MRAM
Cypress FRAM
but they are much more expensive again than this EEPROM.
Not cheap, ($9.10/1k) but it is high power, with 4 x 50W Class D, with i2s (115 dB S/N ratio with 110 dB of dynamic range, 44.1 kHz, 48 kHz, 96 kHz and 192 kHz)
& i2c interfaces.
Full I2C bus driving (3.3/1.8 V):
Channel independent Eco-Mode
Channel independent soft play/mute
I2C bus diagnostics, including DC and AC load detection and load value recognition
Real time load current monitoring (on I2C and TDM data lines)
Besides the clear Audio uses, this might also be useful for Motor drive and actuator uses ?
I wonder what class-A audiophiles think of that approach. What cross-over noise? I've got rail-to-rail noise, yeah!
Class-D amplification used to be unthinkable for decent audio. I guess it works okay these days. You can get multi-kW audio amplifiers for cheap. Here is a 3kW/channel into 4 ohms for $500:
I wonder what class-A audiophiles think of that approach. What cross-over noise? I've got rail-to-rail noise, yeah!
Class-D amplification used to be unthinkable for decent audio. I guess it works okay these days. You can get multi-kW audio amplifiers for cheap. Here is a 3kW/channel into 4 ohms for $500: https://www.sweetwater.com/store/detail/NX6000--behringer-nx6000-power-amplifier
It's >90% efficient, whereas a good class-A is maybe only 10% efficient.
No THD or noise numbers there, but the ST part specs 115 dB S/N ratio with 110 dB of dynamic range, which seems very good ?
I wonder what class-A audiophiles think of that approach. What cross-over noise? I've got rail-to-rail noise, yeah!
Class-D amplification used to be unthinkable for decent audio. I guess it works okay these days. You can get multi-kW audio amplifiers for cheap. Here is a 3kW/channel into 4 ohms for $500: https://www.sweetwater.com/store/detail/NX6000--behringer-nx6000-power-amplifier
It's >90% efficient, whereas a good class-A is maybe only 10% efficient.
No THD or noise numbers there, but the ST part specs 115 dB S/N ratio with 110 dB of dynamic range, which seems very good ?
It seems too good, doesn't it? I wonder how it handles a complex load, like a dynamic speaker with back-EMF.
The power is sure intruiging. Think about how powerful an honest 100W/channel system was fourty years ago. Is this class-D amp really 30x as powerful? Are they making speakers now that can handle 3kW?
... high power, with 4 x 50W Class D, with i2s ...
Besides the clear Audio uses, this might also be useful for Motor drive and actuator uses ?
It has two full bridges so it could be capable of driving a stepper motor. However, the supply voltage is somewhat limited (25V). Can it drive DC current? Many audio ADCs and DACs have a hardwired high-pass filter what makes them unsuitable for driving actuators and static loads.
Motors form static loads while audio is averaged power, the peak power labelled to the chips often just means: we can drive a beat of a wavelet without overheating the chip... Motor drivers are a different business
Comments
That's just a serial link.
The MCUs suggested are certainly working in many applications too.
Is all that not practical enough for you ?
No one has to use a small MCU, but they can do more that just replace a UART, and that's why they are worth tracking.
All those other solutions are not going away.
..\SimplicityStudio\v4\developer\sdks\8051\v4.1.1\examples\C8051F380DK\USB\HID\HIDtoUARTExample\ReadMe.txt
That does seem to extract a HID 32b BAUD value, and update at 24MHz the UART0.TH1(8b) timers, so not the higher resolution possible of 48MHz & UART1.SBRL1(16b) of the UB3 - minor stuff.
Compiles as
Running that on a C8051F381 Eval Board, (set for 24MHz sysCLK) Win 10 PC connects as this
I dug around and found a PC-Host HIDtoUART.cpp, that compiles to HIDtoUART.exe
I edited the 1200..230400 limits, to be instead 1000..2000000 which is better more HW related boundaries for limits testing.
Txmit tests ok on that from whole range of 1000~ 2MBd, TX of 2000 'U' counts 10,000 =\_ edges as expected. (ie nothing dropped in TX side)
RX looks ok, but large/slow packets have some timeout in the TestSW at low speeds (more than a few seconds), and above ~ 600k baud, the loopback test starts to drop Rx Chars.
600k is ok, 631578 is ok, and 666666 fails, so that's suspiciously close to the 63/64? Bytes/ms indicated in some places.
At 2MBd-Echo, burst (mouse click) packets up to 328 bytes look ok, and ~343 fails, so limit is somewhere around there. Unclear what sets that.
HID does seem to have lower total throughput than VCP, FWIU endpoints come into the mix, and looks like ~64 bytes/ms/endpoint ? so appx 640kBaud sustained ?
Addit: Google also finds this, that seems to confirm the 64kB sustained limit per interface (endpoint) ?
https://github.com/shraken/efm8_hidmulti
says
"Demonstrates a USB device using multiple HID interfaces using a full speed USB Silicon Labs EFM8UB2 device. This approach allows higher data rates over USB interrupt endpoints by spreading out the communication across multiple interfaces. The example provided demonstrates a dual interface allowing 128kB/sec but could be expanded to three interfaces for 192kB/sec on the EFM8UB2 device family.
Other USB microcontrollers with more FIFO endpoints can expand this scaling even further.
A software project using the hidapi library is provided to verify data receipt on the host.
This project builds for a Silicon Labs EFM8UB2 device type and was tested on the EFM8UB2 Universal Bee starter kit.
The porting effort is described in a blog entry I posted."
BTW I never care about throughput and never tested. I only care about remote clients updating firmware
Because it can control GPIO, I have a new board with two props, and one of the load buttons will program one p1 and the other load button will load the other. Load EEPROM #1 and Load EEPROM #2. On Button Press, that button will first turn on or off a GPIO pin that controls some switches to determine which P1 the reset, tx and rx are connected to. So 1 usb interface can program two devices.
What Baud rates do you use for the various 'buttons' to download ?
This is what the SiLabs test program looks like :
Does your code require/assume a specific VID/PID ?
https://www.digikey.com/product-detail/en/ftdi-future-technology-devices-international-ltd/MM930MINI/768-1336-ND
https://www.digikey.com/product-detail/en/ftdi-future-technology-devices-international-ltd/FT930Q-T/768-1335-ND/
The module is interesting, as it suggests firmware is installed and available, and offers HS-USB with
* Asynchronous Serial data transfer rates from 300 baud to 12 Mbaud at TTL levels
* One SPI master supports single / dual / quad modes of data transfer. Clock rate is up to 25 MHz
* One SPI slave support single data transfer with 25MHz clock (SCH hints this could be quad ? )
* I2C bus interface can be configured as master or slave, with data transfers up to 3.4Mbps
Data is vague on exactly what works 'out of the box', in what driver forms ? ie which are VCOM and which are BOMS/HID/CDC or D2xx ?
If it can manage all of the above, at the same time, that's getting useful.
Cypress:
The Semper Flash family includes AEC-Q100 automotive-qualified devices with an extended temperature range of -40°C to +125°C, supports 1.8-V and 3.0-V operating ranges, and is available in densities of 512Mb through 4Gb. The devices are offered with Quad Serial Peripheral Interface (SPI), Octal SPI and HyperBus™ interfaces. The Octal and HyperBus interface devices are compliant with the JEDEC eXpanded SPI (xSPI) standard for high-speed x8 serial NOR Flash and offer read bandwidth of 400 MBps.
Availability : Cypress' 512Mb Semper Flash devices are sampling to lead customers now, with qualified samples available in the fourth quarter of 2018. Volume production of the devices with 24-ball BGA, 16-pin SOIC and 8-contact WSON packages is expected in the first quarter of 2019.
These devices match the P2 temperature range, and would be well suited to higher reliability industrial uses.
Addit: Data has this (quite fast erase times)
•Program Time: 0.517 ms
•Erase Time: 773 ms
LOW POWER
•Deep Power Down: 1.3 μA
•Standby: 11 μA
INTERFACE TYPE
•Quad SPI
•HyperBus
•Octal
TEMPERATURE RANGE
•Automotive Grade 1: -40°C to 125°C
•Automotive Grade 2: -40°C to 105°C
•Automotive Grade 3: -40°C to 85°C
•Industrial Plus: -40°C to 105°C
•Industrial: -40°C to 85°C
Safety Features
❐ Functional Safety with the Industry’s first ISO26262 ASIL B compliant and ASIL D ready NOR flash
❐ EnduraFlex Architecture provides High-Endurance and Long Retention Partitions
❐ Interface Cyclic Redundancy Check (CRC) detects errors on communication interface between host controller and Semper Flash device
❐ Data Integrity CRC detects errors in memory array
❐ SafeBoot reports device initialization failures, detects configuration corruption and provides recovery options
❐ Built-in Error Correcting Code (ECC) corrects Single-bit Error and detects Double-bit Error (SECDED) on memory array data
❐ Sector Erase Status indicator for power loss during erase
AutoBoot enables immediate access to the memory array following power-on
Hardware Reset through CS# Signaling method (JEDEC) OR individual RESET# pin
It also shows a M0 MCU inside, so this may have some delays ? - not clearly spec'd on the data thus far. Does mention Autoboot mode ?
https://www.maximintegrated.com/en/aboutus/newsroom.html/pr_1579377341
"QFN24 4x4mm Protects from overvoltage, negative voltage, and ground potential differences; Integrated ±50VDC protection for VBUS/GND power lines; Integrated ±40.7VDC protection for D+/D- data lines"
-Phil
haw haw haw indeed. Maybe those screen-grabs above, are not even from real devices, probably just photoshopped, eh ?!?
I'll bump with more on this , after some dialog with FTDI re their FT93x series
They state the max baud is 8MBd, but also admit when pressed for PLL info, that the SysCLK on these parts is 100MHz and only can be 100MHz
- that's quite restrictive, and means their claimed 8MBd is not correct, as it will be 8.3333' MBd, or 7.6923 MBd when derived from 100MHz
It's a pity they do not allow for 96MHz, as then their UART Baud rates would be compatible with their (and others) UART parts - those all use 48/24MHz derived baud, which is USB based.'
.. I see Digikey have recently expanded their part codes for SiLabs Si5351A i2c clock generators, to include quite a few pre-programmed parts.
A P1/P2 useful one looks to be Si5351A-B05335-GT
Suggests 50/tube, with stock lead time of 4 weeks (7/25/2018) @ $0.88140/50
Si5351A-B05335-GT Crystal Frequency (MHz): 27.000000000 Internal Load Capacitance (pF): 10 SSC: Disabled Default I2C address: 0x60
CLK0 (MHz): 5.000000000 from PLLA
CLK1 (MHz): 1.000000000 from PLLA
CLK2 (MHz): 2.000000000 from PLLA
ie this pre-programmed part powers up (no i2c action), with the above defaults of 5MHz/2MHz/1MHz
Suitable Crystals could be
XRCGB27M000FAN00R0 Murata CRYSTAL 27.0000MHZ $0.15750/3k ±25ppm ±25ppm (2.00mm x 1.60mm)
Murata do make ±10ppm Xtals in that family, but not showing at 27MHz - appears that 24,25,26,32 MHz are the mainstream choices - 10ppm models spec 2ppm/year aging, vs 5ppm for 25ppm
Seems those are recent ones, targeting bluetooth designs
other candidates :
TSX-3225 25.0000MF20X-AJ3 EPSON $0.255/3k Crystal 25MHz ±20ppm ±10ppm 8pF 40 Ohms (3.20mm x 2.50mm) aging : ±1ppm/yr max
ABM10W-27.0000MHZ-7-B1U-T3 $0.36/3k 27MHz ±10ppm ±10ppm 7pF 100 Ohms Fundamental -20°C ~ 70°C (2.50mm x 2.00mm) aging : ±2ppm/yr max
5MHz default works well with P1, and some i2c bytes can bump that to any MHz value.
https://forums.parallax.com/discussion/163409/silabs-si5351-clock-generator-spin-driver
https://www10.edacafe.com/nbc/articles/1/1606762/Maxim-5kVRMS-Reinforced-Digital-Isolator-2x-More-Throughput-4x-Lower-Power
"Delivering up to 2x greater throughput at 4x lower power consumption versus competing solutions, the MAX22445 provides reliable communication across the isolation barrier to ensure safe operation of compact industrial, medical and other equipment."
Not as cheap as a venerable H11L1, but far faster and with higher isolation and with 4 channels in SO16W, if you need speed and isolation this looks a nice series.
Missing the fuses seemed like a problem at the time, but may prove to actually have avoided a time-sink of security support.
Parallax was never going to go head to head with the big hitters, and headlines like this
Nuvoton’s M2351 "TrustZone® for Arm®v8-M Empowered by TrustZone® for Arm®v8-M architecture
https://m2351.nuvoton.com/resource/
Eval Boards are in stock, $69 : https://direct.nuvoton.com/en/numaker-pfm-m2351
Looks like much of that secure delivery infrastructure is already in place :
Crypto Tool The CryptoTool is an assist tool for M2351 for cryptography calculation.
▪ Generate private key with 256 bits width
▪ Support ECC NIST P-256 including public key calculation, ECDSA and ECDH
▪ Support AES CFB mode with 256 bits width
▪ Support SHA-256
▪ Pack firmware for OTA firmware package 1.1.3 (2018/09/07) Download
NuMicro M2351 Secure ISP Tool NuMicro M2351 Secure ISP Tool provides secure channel for firmware upgrade,
it communicates with M2351 MaskROM library through UART/USB interfaces. 1.00 (2018/09/06) Download
The processor core of the M2351, is modest, with
64MHz Core speed and 32-bit Single-cycle hardware multiplier and 32-bit 17-cycle hardware divider
but that helps P2, as the P2 does the heavy lifting....
The USB means this could be a 'better bridge' offering for P2.
Package Range is quite impressive here : The 2 smallest could fit on a Eval / Breakout 'P2D2 like' Board...
C: WLSCP49 (3.2x3.2 mm)
Z: QFN33 (5x5x0.8 mm Pitch 0.5 mm)
S: LQFP64 (7x7 mm)
K: LQFP128 (14x14 mm)
FLASH Choices I: 512 KB G: 256 KB E: 128 KB
RAM choices C: 128 KB A: 96 KB 8: 64 KB 6: 32 KB
The links speeds look decent :
▪ Communication interfaces
– Up to 11 UART interfaces (up to 10.66 MHz), with up to 3 ISO-7816-3 interfaces, 6 RS-485, 6 IrDA and 2 LIN interfaces
– Up to 5 I2C interfaces (up to 1 Mbps), with up to 3 I2C with SM Bus/ PM Bus
– Up to 7 SPI interfaces (up to 64 MHz), with 4 I2S interfaces, additional 1 Quad-SPI interface
– Up to 5 I2S interfaces, 4 I2S shared with 4 SPI
– Secure Digital I/O (SDIO)(up to 50 MHz)
and there is a free CAN bus too....
▪ Advanced connectivity
– USB 2.0 full speed OTG controller with on-chip PHY
– One CAN interface up to 1 Mbps (CAN 2.0A and 2.0B standard)
– Support crystal-less
and other stuff that complements P2, or can co-operate with P2 to result in a secure product.
▪ Analog
– One 12-bit, 3.76M SPS at 64MHz SAR ADC (with 6 fast channels, total up to 16 channels)
– Two 12-bit, 1M SPS DACs
– Two rail-to-rail comparators (CMP)
▪ Motor interfaces
– Up to 2 quadrature encoder interfaces (QEI)
– 2 input capture timers (ECAP)
Not sure of prices, but anything that can fit into a 3.2mm package, is not likely to be P2-impact-significant/ ?
https://www10.edacafe.com/nbc/articles/1/1615765/Gowin-Semiconductor-Unveils-Latest-Embedded-Memory-Products-their-Families-Programmable-Logic-Devices
http://www.gowinsemi.com/product/littlebee/
LUT4 1,728
FF 1,296
B-SRAM bits 72K
B-SRAM quantity 4
S-SRAM bits 2,304
User Flash bits 1M
PLLs + DLLs 1 + 2
OSC 1, +/- 5% accuracy
Hard Core Processor Arm Cortex M3
USB PHY USB2.0 PHY
ADC Channels 8
I/O Banks 4
Max. User I/O 95
Core Voltage 1.2V
Package Options with Max I/O (Refer to the latest datasheet for details)
Package Pitch(mm) Size(mm2) GW1NS-2C
CS36 0.4 2.4 x 2.4 31
QN32 0.5 5 x 5 25
QN32U 0.5 5 x 5 16
QN48 0.4 6 x 6 38
LQ144 0.5 22 x 22 95
GW1NSR Version includes:
32M-bits of embedded pSRAM memory 8-bit wide, 332Mbps data rates (166 MHz clock)
Embedded 32-bit RISC Microprocessor Arm Cortex-M3 (60 MHz) 128K User Flash
Embedded ADC 8 Channels 12-bit SAR AD conversion 1 MHz Slew Rate
Up to 16 MHz sampling clock
Flash Configuration
Supports 2 image files
Supports Dual Boot
Online Upgradeable
Remote Upgrade
Integrated Development Flow for both M3 Core and FPGA Programming
Both the Cortex M3 IDE and GOWIN FPGA programming toolchain are integrated as one
Embedded USB2.0 PHY 480 Mbps data speed Type-C compatible
Fixed MIPI D-PHY I/O
I/O's are fixed to accept GOWIN control logic IP for a fully compliant CSI/DSI solution
The LUT are a bit light for even P1V, but the HS-USB+32Mb pSRAM, with some FPGA fabric, and a free M3, is an interesting mix alongside P2.
No indications of price, but the smaller packages indicate the die cannot be too large
Data seems to not be up yet for pSRAM refresh rules
Prices are up, https://direct.nuvoton.com/en/m2351-series/
Not quite pin count linear, (no price on WLSCP49) - shows just over $2/1k, but those are for 512kF and 96kR, so quite large parts.
10.66MBd UARTS, 64MHz SPI/i2s, and SDIO to 50MHz are all quite good P2 testing links.
The ADC and DACs could exercise the P2 Analog features too..
QFN33 would place quite well next to a P2, I'm liking this M2351, it has a lot of P2-compatible HW peripherals and looks future proof.
https://www10.edacafe.com/nbc/articles/1/1627409/Analog-Devices-Latest-Safety-Isolated-CAN-FD-Transceivers-Deliver-12-Mbps-Future-Proof-Networks
https://www.eevblog.com/forum/microcontrollers/best-inexpensive-usb-hi-speed-solution/msg2052556/#msg2052556
They are low cost, and could provide a means to interface P2 to HS-USB, eg USB3343 is $1.28/1+
Less clear is how complex the total SW is, but this can also manage FS-USB.
Another HS-USB pathway, with low module and aliexpress chip prices is the CY7C68013A
https://www.instructables.com/id/FX2LP-CY7C68013A-USB-Dev-Board-Logic-Analyzer/
some nice benchmarks & libs here
http://allmybrain.com/2009/04/14/fx2-cystream-throughput-test-with-sdcc-and-fx2lib/
CY7C68013A HS-USB modules are sub $4 on eBay / Aliexpress.
https://www.edacafe.com/nbc/articles/1/1715588/Industrys-First-4Mbit-EEPROM-Memory-Chips-STMicroelectronics-Let-Small-Devices-Handle-Bigger-User-Data
'Samples are available now, and pricing starts at $2.50 for orders of 1000 pieces.'
That looks to be P2 boot compatible, at first glance ?
EEPROM is quite a bit more expensive than Flash, but specs 4 million write cycles, so could appeal to someone wanting boot+logging in one package.
Other candidates look to be
Fujitsu FRAM
Fujitsu ReRAM
Everspin MRAM
Cypress FRAM
but they are much more expensive again than this EEPROM.
https://www.edacafe.com/nbc/articles/1/1738777/STMicroelectronics-Announces-New-Audio-Amplifier-IC-That-Leverages-Expertise-Alps-Alpine
https://www.st.com/en/automotive-infotainment-and-telematics/fda901.html?icmp=tt14448_gl_pron_mar2020
https://www.st.com/resource/en/data_brief/fda901.pdf
Not cheap, ($9.10/1k) but it is high power, with 4 x 50W Class D, with i2s (115 dB S/N ratio with 110 dB of dynamic range, 44.1 kHz, 48 kHz, 96 kHz and 192 kHz)
& i2c interfaces.
Full I2C bus driving (3.3/1.8 V):
Channel independent Eco-Mode
Channel independent soft play/mute
I2C bus diagnostics, including DC and AC load detection and load value recognition
Real time load current monitoring (on I2C and TDM data lines)
Besides the clear Audio uses, this might also be useful for Motor drive and actuator uses ?
Class-D amplification used to be unthinkable for decent audio. I guess it works okay these days. You can get multi-kW audio amplifiers for cheap. Here is a 3kW/channel into 4 ohms for $500:
https://www.sweetwater.com/store/detail/NX6000--behringer-nx6000-power-amplifier
It's >90% efficient, whereas a good class-A is maybe only 10% efficient.
No THD or noise numbers there, but the ST part specs 115 dB S/N ratio with 110 dB of dynamic range, which seems very good ?
It seems too good, doesn't it? I wonder how it handles a complex load, like a dynamic speaker with back-EMF.
The power is sure intruiging. Think about how powerful an honest 100W/channel system was fourty years ago. Is this class-D amp really 30x as powerful? Are they making speakers now that can handle 3kW?
It has two full bridges so it could be capable of driving a stepper motor. However, the supply voltage is somewhat limited (25V). Can it drive DC current? Many audio ADCs and DACs have a hardwired high-pass filter what makes them unsuitable for driving actuators and static loads.