And the other interesting companion is the recently released ESP3212, which builds on from the ESP8266 but does both bluetooth and wifi, and has plenty of ram.
Could make for an interesting wireless 'prop plug'.
Yes, nice looking part, and this release means it can be tested with P2 Code, including boot over WiFi etc.
Price mentions $2.85 (non module), also quite good, for dual core Xtensa LX6 processor @ up to 240 MHz with 448 KB flash, 520 KB SRAM, 16 KB SRAM in RTC, WiFi and Bluetooth LE connectivity
But for just a wireless solution... for far less than half the price of a chip you can get entire 8266 modules, ignore the soc, and plug them in where you want them. No supply chain issues. Not enough freely available documentation either:)
I don't know if I would trust the manufacturer. You could infer from the release of the ESP8266 line that they might consider documentation to be a business asset and not a business obligation... based on the history, it certainly appears that they might release as little as possible, as slowly as they can, except to their actual partners.
Heck, they didn't even announce the availability of their own chip... someone else did.
From their current efforts, it seems clear that they appear to have changed... I doubt it. It was a winning strategy the first time... why change now?
"Oh... yes you are using the wrong firmware version, which sdk did you say you were using?... don't you have the over-night from Feb 12 in the Atlantis subchapter on GitHub? I'll be away for a few days. See you then."
Looks like there has finally been some action on the I3C Sensewire front. This is the protocol jmg posted about that enhances I2C towards SPI speeds, while keeping a 2 wire (SDA/SCL) topology.
I saw the i3c mention. About the first datasheet I've seen that mentioned it.
Know if there are any larger Ice40UP planned? I think you'd only get 2 cogs into the current largest, maybe 3 with hobbling
I'd agree on a $/COG basis using a FPGA alone is not going to displace P1, which is why I suggest using both on a PCB module*. P1 gives 8 COGS that can do mainstream generic work, and the 2? COGS in Ice40UP do stuff the P1 cannot quite manage.
Maybe a couple of P2 Smart Pins can be added ?
The biggest one released can fit into WLCSP (2.15 x 2.55 mm), so there is scope to go larger.
I'd expect demand to result in larger ones, but the real question is when ?
I've always thought there was an opening for 'Smart RAM' style FPGAs, where they have significant RAM that can have flexible interfaces added.
These seem to address that - of course, more RAM is always good, but this is not a bad start.
Microchip & OnSemi want something over $2 for their 1M Serial SRAM's, but that cannot add palette RAM, and is a little slow...
* I think the P2-123 work already has a P1 able to program the SPI FLASH, so a P1 board could displace the more expensive FT2232H on the Lattice design and instead use P1+cheaper USB-Serial (eg CP2102N) + Ice40UP + 2MB Flash.
As long as we open our eyes to good places - and open our hearts to get inspiration - there is hope that the propeller will forever be the chip of the free, the home of the brave, and a light unto all willing to overcome the burdens of mainstream processor programming, staying the companion part to trigger the #InternationalPropellererBreakthru
How to better express hope?
As long as we open our eyes to good places - and open our hearts to get inspiration - there is hope that the propeller will forever be the chip of the free, the home of the brave, and a light unto all willing to overcome the burdens of mainstream processor programming, staying the companion part to trigger the #InternationalPropellererBreakthru
How to better express hope?
Yeehaa!!!
In working at Treehouse all week, I see that they struggle as well as I do with everything being flakey these days. It's been a real eye-opener! I've always supposed it's been somewhat my own bad luck, made worse by my rather negative attitude towards the whole modern situation, but now I know that I am not crazy. I've heard a lot of swearing this week. Microsoft stuff seems particularly bad, as their own products have incompatibilities with each other. Things only mostly work. All day, inexplicable bugs impede everyone's progress.
The state of computing is a sloppy mess and the whole world is languishing in a technological pig sty. Every day I deal with new bugs that I may never see again, but don't have the power to fix if I did. Usually getting out of the car and back into the car fixes things enough to get going again.
The Prop2 is no cutting-edge compute device, but it should be reliable and an adequate basis for something solid - to at least get some work done on. Nobody knows, anymore, the awesome feeling of working on a system that is solid and reliable. I think if people got a taste of that, they would just love it.
It does seem like engineering is being left out of the decision making these days. My guess is it's mainly down to too many layers of "technology" patents. No one can see the metal any longer ... so they stop trying to engineer it and just order by specs.
What the market needs is something that simply works and is a basis for solid development. The solution probably cannot come from the current paradigm. Maybe it can only come from without.
It does seem like engineering is being left out of the decision making these days. My guess is it's mainly down to too many layers of "technology" patents. No one can see the metal any longer ... so they stop trying to engineer it and just order by specs.
That's probably what is happening. Total opacity at too many levels. Even one level is too much.
I worked with a mechanical engineer once who was also a gifted salesman. His mantra was, "Never invite an engineer to a sales presentation." As a consequence, I was left out of his sales presentations, and I always had to respond, "You told them we could do what?!!" But you know, what? I think he was right. The envelope is pushed just as much by aggressive marketing as by engineering. And I'm sure that if I were in the sales meeting, I would have said, "But ..."
I worked with a mechanical engineer once who was also a gifted salesman. His mantra was, "Never invite an engineer to a sales presentation."
Hopefully what he meant was that engineering's, being so intimately knowledgeable on the workings, tend to have loose lips. That can be dangerous to the business in a competitive landscape.
The state of computing is a sloppy mess and the whole world is languishing in a technological pig sty. Every day I deal with new bugs that I may never see again, but don't have the power to fix if I did. Usually getting out of the car and back into the car fixes things enough to get going again.
Couldn't agree more!
In the 80's governments made computer suppliers responsible for bugs and downtime. Amazing how the PC and software suppliers have managed to avoid that responsibility while the Smile is far worse than its ever been!
The Prop2 is no cutting-edge compute device, but it should be reliable and an adequate basis for something solid - to at least get some work done on. Nobody knows, anymore, the awesome feeling of working on a system that is solid and reliable. I think if people got a taste of that, they would just love it.
The early 32 bit era of computing managed to pull off some pretty amazing stuff - The Mac, Amiga, Lisa, etc... They all started with about 512K of RAM and only one slow processor nad yet they created a capable and compelling computing environment.
The P2 could be used in a similar fashion to those systems and yet it has so many more capabilities!
I believe that there is room for a whole new class of computing.. "Nano Computing" or "Maker Compute Platform" or whatever you want to call it.
A capable, flexible platform that bridges desktop computing and microcontroller.
I've been exploring some ideas but it all needs a lot more work before anything could be presentable.
MAX32660 Comes in 16-WLP (1.55x1.57) (!), and 4mmQFN20 and 3mmQFN24, with 256kF and 96kR - price is higher at $1.41/500, but the specs are quite good (no ADC)
* 256kF, 96kR
* SPI, with 32 byte FIFO and claims 48MHz Slave speed
* UART up to 4MBd
* i2c up to 3.4MBd
* 32.768kHz RTC
That could also make a nice companion for P1 ? Small enough to swap-out the EEPROM on FLiP & support adding RTC & floating point COG ?
Slightly larger packages, but broadly similar in code size
I think the Prop2 is going to be more like an FPGA in terms of where it goes. It's not low-power, nor super cheap. It should be useful for applications where real-time processing is important and problems can be organized in ways that the Prop2 can uniquely solve them. In short, I'd say it's a general-purpose tool for inventors. It will let you quickly try out all kinds of ideas that a regulator micro couldn't be programmed for and an FPGA would take too long to program for. It's easy to put on PCB and it handles analog deftly. It's going to be fun.
"No need programmer, not even USB-TTL tool! To enter into programming mode, use a tweezer, short connect the two pins in the middle of the board, where marked as “DL”"
Another CH559 board here, has some ?? comments "Support USB hub, two USB transceiver, one is normal speed (female A USB pin “DP DM” and micro USB), one is high speed (On board marked “HS USB, pin HP HM”)."
but the data does not state HS-USB, or mention 480MHz anywhere.
However, the CH559 does have a faster PLL (288MHz vs 96MHz), so maybe HS-USB is planned ? - just not quite working yet ?
I'd like it if we had a small micro with the USB UART firmware preloaded so that we can treat it the same way as an FT232R for instance. Do you know of any firmware available for that purpose that appears as a common HID or VCP device/
There is SiLabs VCPxpress - that uses the CP210x VCP driver is supported on Windows, Mac, and Linux.
The EFM8UB3 looks to have plenty of headroom for 'extras' in the 40K Bytes, and has a 48MHz CPU core.
The EFM8 series have CDC HID bootloaders, ( found HID Boot mention here )
"EFM8 Factory Bootloader AN945SW contains all EFM8 bootloader images with UART, USB or SMBus interface. "
A quick look there looks to be 4031 Bytes Bootloader size.
Addit: builds reports :
USB_bootloader code gives
TO "EFM8UB3_USB0_BOOTLOADER.OMF.CRBUILD" Program Size: data=59.1 xdata=256 const=83 code=1346
UART_bootloader gives
TO "EFM8UB3_UART0_BOOTLOADER.OMF.CRBUILD" Program Size: data=35.0 xdata=256 const=0 code=516
LX51 RUN COMPLETE. 0 WARNING(S), 0 ERROR(S)
VCPxpress_echo gives
TO "EFM8UB3_VCPXPRESS_ECHO_2.OMF.CRBUILD" Program Size: data=113.1 xdata=318 const=110 code=8492
LX51 RUN COMPLETE. 0 WARNING(S), 0 ERROR(S)
HID_Keyboard gives
TO "EFM8UB3_HID_KEYBOARD.OMF.CRBUILD" Program Size: data=77.6 xdata=0 const=325 code=5330
LX51 RUN COMPLETE. 0 WARNING(S), 0 ERROR(S)
The closest to a complete USB-UART is this example for UB1 - has extra display stuff, but no Baud-calcs (fixed baud)
* Main thread for VCPXpress UART demo (EFM8UB1)
*
* This example implements a USB to uart bridge using a ping-pong buffering scheme for both Rx and Tx paths.
* It includes no flow control and has a fixed baud-rate of 115200 baud (ignores change requests from the host).
*
* The MCU enumerates as a COM port and connects to the board controllers COM port providing bidirectional communication between the two COM ports.
*
* This example also displays characters received and transmitted on the LCD of the STK.
*
* TO "EFM8UB1_VCPXPRESS_USBTOUART_2.OMF.CRBUILD" Program Size: data=169.2 xdata=555 const=910 code=11281
* LX51 RUN COMPLETE. 0 WARNING(S), 0 ERROR(S)
And I've been looking at CH55x parts
It's in Chinese, but the parts look interesting.
A slower core than EFM8UB3, so will have lower peak MHz, and fewer Baud choices - probably more a P1 partner, than a P2 one ?
I've found boards here, low prices, but a little vague on if the loader is installed by PCB vendor, or if the bare MCUs come with that, in all cases ?
What about silabs CP2110 usb interface. I already have an app to load the P1, how different is loading P2 binary? I’d love to keep my same loading method.
What about silabs CP2110 usb interface. I already have an app to load the P1, how different is loading P2 binary? I’d love to keep my same loading method.
Good question - there are no specific examples of EFM8UB3 as CP2110 == HID USB to UART Data Transfer, but there are the HID keyboard example, and the HID bootloader code, that likely do most of the complex stuff.
There are also UART examples, so you would need to locate/extract the Baud value from HID side, and splice that into baud choice.
Supported rates look to be
Baud Rate = SYSCLK /((65536 − (SBRL1)) × 2 × Prescaler) where prescaler options of 1, 4, 12, or 48.
Gives a virtual Baud clock of 24MHz and suggests 6MHz Rx is possible, with as low as 8 baud also being possible, in theory.
A fixed Prescaler value would support down to 367 Baud.
My idea/concept with the Ambiq Micro parts would be to treat the Propeller as a compute/co-processor; to start it when the compute and I/O power are needed, and shut it down, leaving the Ambiq MCU for handling sleep time management, and power management.
What about silabs CP2110 usb interface. I already have an app to load the P1, how different is loading P2 binary? I’d love to keep my same loading method.
The P2 has a very simple serial loader, either HEX or BASE64 with auto baud feature, way more easy as P1.
Good question - there are no specific examples of EFM8UB3 as CP2110 == HID USB to UART Data Transfer, but there are the HID keyboard example, and the HID bootloader code, that likely do most of the complex stuff.
There are also UART examples, so you would need to locate/extract the Baud value from HID side, and splice that into baud choice.
Supported rates look to be
Baud Rate = SYSCLK /((65536 − (SBRL1)) × 2 × Prescaler) where prescaler options of 1, 4, 12, or 48.
Gives a virtual Baud clock of 24MHz and suggests 6MHz Rx is possible, with as low as 8 baud also being possible, in theory.
A fixed Prescaler value would support down to 367 Baud.
Digging further in the HID examples, I find this older host example
..\SimplicityStudio\v4\developer\sdks\8051\v4.1.1\examples\C8051F380DK\USB\HID\HIDtoUARTExample\ReadMe.txt
That does seem to extract a HID 32b BAUD value, and update at 24MHz the UART0.TH1(8b) timers, so not the higher resolution possible of 48MHz & UART1.SBRL1(16b) of the UB3 - minor stuff.
Addit: this loads and compiles as below ( not sure how to easily test HID uarts ?)
F38x_HIDtoUARTExample.lnp "./src/F380_HIDtoUART.OBJ",
"./src/F3xx_USB0_Descriptor.OBJ",
"./src/F3xx_USB0_InterruptServiceRoutine.OBJ",
"./src/F3xx_USB0_Main.OBJ",
"./src/F3xx_USB0_ReportHandler.OBJ",
"./src/F3xx_USB0_Standard_Requests.OBJ",
"./src/SILABS_STARTUP.OBJ"
TO "F38X_HIDTOUARTEXAMPLE.OMF.CRBUILD"
Program Size: data=88.2 xdata=384 const=181 code=4097
LX51 RUN COMPLETE. 0 WARNING(S), 0 ERROR(S)
HID does seem to have lower total throughput than VCP, FWIU endpoints come into the mix, and looks like ~64 bytes/ms/endpoint ? so appx 640kBaud sustained ?
What sustained speed can you get from the CP2110 ?
Are you saying SiLabs do not test their examples, or ship real silicon ? Quite a strange claim.
Which 'running chip' do you imagine is needed, and in what precise form ?
I have a EFM8UB3 chip running on my bench right now, or is that still 'all theory' ?!
Many variants have been discussed, and I doubt there is one single solution.
I want to see you show a live example of booting and downloading code to a P1 (since you haven't invested in anything to test P2).
As I said, lots of theory, no practical. I want to see something. Then I may be convinced.
Comments
Price mentions $2.85 (non module), also quite good, for dual core Xtensa LX6 processor @ up to 240 MHz with 448 KB flash, 520 KB SRAM, 16 KB SRAM in RTC, WiFi and Bluetooth LE connectivity
I don't know if I would trust the manufacturer. You could infer from the release of the ESP8266 line that they might consider documentation to be a business asset and not a business obligation... based on the history, it certainly appears that they might release as little as possible, as slowly as they can, except to their actual partners.
Heck, they didn't even announce the availability of their own chip... someone else did.
From their current efforts, it seems clear that they appear to have changed... I doubt it. It was a winning strategy the first time... why change now?
"Oh... yes you are using the wrong firmware version, which sdk did you say you were using?... don't you have the over-night from Feb 12 in the Atlantis subchapter on GitHub? I'll be away for a few days. See you then."
Sound familiar?
Let's go flash that soc again.
We have some time... I hope I'm wrong.
I'll bump this, as the new Lattice iCE40 UltraPlus also mentions i3c, and has a LCD MIPI Eval Board.
http://www.latticesemi.com/iCE40UltraFamily?pr1212
Know if there are any larger Ice40UP planned? I think you'd only get 2 cogs into the current largest, maybe 3 with hobbling
Maybe a couple of P2 Smart Pins can be added ?
The biggest one released can fit into WLCSP (2.15 x 2.55 mm), so there is scope to go larger.
I'd expect demand to result in larger ones, but the real question is when ?
I've always thought there was an opening for 'Smart RAM' style FPGAs, where they have significant RAM that can have flexible interfaces added.
These seem to address that - of course, more RAM is always good, but this is not a bad start.
Microchip & OnSemi want something over $2 for their 1M Serial SRAM's, but that cannot add palette RAM, and is a little slow...
* I think the P2-123 work already has a P1 able to program the SPI FLASH, so a P1 board could displace the more expensive FT2232H on the Lattice design and instead use P1+cheaper USB-Serial (eg CP2102N) + Ice40UP + 2MB Flash.
How to better express hope?
Yeehaa!!!
In working at Treehouse all week, I see that they struggle as well as I do with everything being flakey these days. It's been a real eye-opener! I've always supposed it's been somewhat my own bad luck, made worse by my rather negative attitude towards the whole modern situation, but now I know that I am not crazy. I've heard a lot of swearing this week. Microsoft stuff seems particularly bad, as their own products have incompatibilities with each other. Things only mostly work. All day, inexplicable bugs impede everyone's progress.
The state of computing is a sloppy mess and the whole world is languishing in a technological pig sty. Every day I deal with new bugs that I may never see again, but don't have the power to fix if I did. Usually getting out of the car and back into the car fixes things enough to get going again.
The Prop2 is no cutting-edge compute device, but it should be reliable and an adequate basis for something solid - to at least get some work done on. Nobody knows, anymore, the awesome feeling of working on a system that is solid and reliable. I think if people got a taste of that, they would just love it.
It does seem like engineering is being left out of the decision making these days. My guess is it's mainly down to too many layers of "technology" patents. No one can see the metal any longer ... so they stop trying to engineer it and just order by specs.
LOL... Now that quote should go into some other type of media besides this forum. You summed it so well
That's probably what is happening. Total opacity at too many levels. Even one level is too much.
-Phil
Hopefully what he meant was that engineering's, being so intimately knowledgeable on the workings, tend to have loose lips. That can be dangerous to the business in a competitive landscape.
EDIT: Typo
Couldn't agree more!
In the 80's governments made computer suppliers responsible for bugs and downtime. Amazing how the PC and software suppliers have managed to avoid that responsibility while the Smile is far worse than its ever been!
The early 32 bit era of computing managed to pull off some pretty amazing stuff - The Mac, Amiga, Lisa, etc... They all started with about 512K of RAM and only one slow processor nad yet they created a capable and compelling computing environment.
The P2 could be used in a similar fashion to those systems and yet it has so many more capabilities!
I believe that there is room for a whole new class of computing.. "Nano Computing" or "Maker Compute Platform" or whatever you want to call it.
A capable, flexible platform that bridges desktop computing and microcontroller.
I've been exploring some ideas but it all needs a lot more work before anything could be presentable.
j
N76E003 - very low cost (~25c) 18kF micro, TSSOP20 & QFN20, suitable for P2 Stage 1 UART booting, power management and watchdog tasks.
STC8F2K60S2-28I-LQFP32 60kF 4kEE $ 0.4977/500 - Suit P2 boot and P1 EE replacement, adds ADC/PWM etc
EFM8UB3 - Modest price, (sub $1) USB connect with 40kF - Suit P2-USB bridge connections.
EFM8BB3 - smallest 64K 8b MCU, 3x3mm QFN24 12b ADC/12b DAC ~ 80c
HC89F0650/0640/0540 64kF, QFN32 5x5mm, TQFP32
HC89F0630 64kF TSSOP20
and looking for smallest-package / largest memory which is something of an outlier in the MCU business, I find
https://www.maximintegrated.com/en/products/microcontrollers/MAX32660.html
MAX32660 Comes in 16-WLP (1.55x1.57) (!), and 4mmQFN20 and 3mmQFN24, with 256kF and 96kR - price is higher at $1.41/500, but the specs are quite good (no ADC)
* 256kF, 96kR
* SPI, with 32 byte FIFO and claims 48MHz Slave speed
* UART up to 4MBd
* i2c up to 3.4MBd
* 32.768kHz RTC
That could also make a nice companion for P1 ? Small enough to swap-out the EEPROM on FLiP & support adding RTC & floating point COG ?
Slightly larger packages, but broadly similar in code size
ATSAMD20E18A-AU Microchip M0 256KB FLASH 32TQFP 7x7mm $0.95/500 48MHz I²C, SPI, UART/USART/A/D 10x12b, D/A 1x10b
ATSAMD20E18A-MNT Microchip M0 256KB FLASH 32QFN 5x5mm $1.00/500 as above
ATSAMG53G19A-UUT Microchip M4 512KB FLASH 49WLCSP(2.84x2.84) $1.26/500 48MHz I²C, SPI, UART/USART DMA, I²S, POR, PWM, WDT/A/D 8x12b
NUC505 Nuvoton 512kB or 2MB SPI FLASH, 128kR, from $1.90/500, HS-USB, M4.
and some more ...
OR
TSSOP20 https://lcsc.com Aliexpress
N76E003 Nuvoton (100+ $ 0.2672) N76E003AT20 ($6.00/20+$1.35)
N76E003 Breakout Board $1.10, and it seems they installed a UART bootloader, so 14k User, 4k loader.
N76E003 Debug Board this one includes the full debug bridge device.
HC89S003 http://www.holychip.cn/index_en.aspx (500+ $ 0.2178)
SM51F003 sinomicom (500+ $ 0.2452)
SC93F5003X20U sinone, www.socmcu.com (100+ $ 0.2690)
STC8F2K08S2 STC 4kee (500+ $ 0.2946) STC8F2K08S2-28I-TSSOP20 ($12.00/50+$2.16)
STC8F2K16S2 STC8F2K16S2-28I-TSSOP20 ($3.40/10+$2.16)
The company who does the CH340 has been busy too...
Newest versions have more packages and no-xtal operation
CH340E Package:MSOP-10 1+ $ 0.4571 100+ $ 0.3913
and they also do a family of 8051 cores USB parts, with a wide code range, and a wide price range,
https://www.cnx-software.com/2018/04/16/1-80-ch551-mini-development-board-features-8-bit-c51-core-usb-interface-and-i-os/
CH551G Package: SOP-16_150mil 500+ $ 0.2005
CH552G Package: SOP-16_150mil 100+ $ 0.2565
CH554G Package: SOP-16_150mil 500+ $ 0.4426
The TSSOP-20/ SSOP20 pin parts have XTAL pins, which may be useful for someone wanting a more stable time base.
This CH551 Eval Board link, suggests even the CH551G has USB loading ?
"No need programmer, not even USB-TTL tool! To enter into programming mode, use a tweezer, short connect the two pins in the middle of the board, where marked as “DL”"
Another CH559 board here, has some ?? comments
"Support USB hub, two USB transceiver, one is normal speed (female A USB pin “DP DM” and micro USB), one is high speed (On board marked “HS USB, pin HP HM”)."
but the data does not state HS-USB, or mention 480MHz anywhere.
However, the CH559 does have a faster PLL (288MHz vs 96MHz), so maybe HS-USB is planned ? - just not quite working yet ?
There is SiLabs VCPxpress - that uses the CP210x VCP driver is supported on Windows, Mac, and Linux.
The EFM8UB3 looks to have plenty of headroom for 'extras' in the 40K Bytes, and has a 48MHz CPU core.
Their EFM8UB3 Eval docs also mention a HID example.
The EFM8 series have CDC HID bootloaders, ( found HID Boot mention here )
"EFM8 Factory Bootloader AN945SW contains all EFM8 bootloader images with UART, USB or SMBus interface. "
A quick look there looks to be 4031 Bytes Bootloader size.
Addit: builds reports :
USB_bootloader code gives
TO "EFM8UB3_USB0_BOOTLOADER.OMF.CRBUILD" Program Size: data=59.1 xdata=256 const=83 code=1346
UART_bootloader gives
TO "EFM8UB3_UART0_BOOTLOADER.OMF.CRBUILD" Program Size: data=35.0 xdata=256 const=0 code=516
LX51 RUN COMPLETE. 0 WARNING(S), 0 ERROR(S)
VCPxpress_echo gives
TO "EFM8UB3_VCPXPRESS_ECHO_2.OMF.CRBUILD" Program Size: data=113.1 xdata=318 const=110 code=8492
LX51 RUN COMPLETE. 0 WARNING(S), 0 ERROR(S)
HID_Keyboard gives
TO "EFM8UB3_HID_KEYBOARD.OMF.CRBUILD" Program Size: data=77.6 xdata=0 const=325 code=5330
LX51 RUN COMPLETE. 0 WARNING(S), 0 ERROR(S)
The closest to a complete USB-UART is this example for UB1 - has extra display stuff, but no Baud-calcs (fixed baud)
* Main thread for VCPXpress UART demo (EFM8UB1)
*
* This example implements a USB to uart bridge using a ping-pong buffering scheme for both Rx and Tx paths.
* It includes no flow control and has a fixed baud-rate of 115200 baud (ignores change requests from the host).
*
* The MCU enumerates as a COM port and connects to the board controllers COM port providing bidirectional communication between the two COM ports.
*
* This example also displays characters received and transmitted on the LCD of the STK.
*
* TO "EFM8UB1_VCPXPRESS_USBTOUART_2.OMF.CRBUILD" Program Size: data=169.2 xdata=555 const=910 code=11281
* LX51 RUN COMPLETE. 0 WARNING(S), 0 ERROR(S)
And I've been looking at CH55x parts
It's in Chinese, but the parts look interesting.
A slower core than EFM8UB3, so will have lower peak MHz, and fewer Baud choices - probably more a P1 partner, than a P2 one ?
I've found boards here, low prices, but a little vague on if the loader is installed by PCB vendor, or if the bare MCUs come with that, in all cases ?
Good question - there are no specific examples of EFM8UB3 as CP2110 == HID USB to UART Data Transfer, but there are the HID keyboard example, and the HID bootloader code, that likely do most of the complex stuff.
There are also UART examples, so you would need to locate/extract the Baud value from HID side, and splice that into baud choice.
Supported rates look to be
Baud Rate = SYSCLK /((65536 − (SBRL1)) × 2 × Prescaler) where prescaler options of 1, 4, 12, or 48.
Gives a virtual Baud clock of 24MHz and suggests 6MHz Rx is possible, with as low as 8 baud also being possible, in theory.
A fixed Prescaler value would support down to 367 Baud.
The P2 has a very simple serial loader, either HEX or BASE64 with auto baud feature, way more easy as P1.
Mike
It's time you built one of these. For the P1 would be fine to test out the theory. Otherwise it's just that - all theory!
Digging further in the HID examples, I find this older host example
..\SimplicityStudio\v4\developer\sdks\8051\v4.1.1\examples\C8051F380DK\USB\HID\HIDtoUARTExample\ReadMe.txt
That does seem to extract a HID 32b BAUD value, and update at 24MHz the UART0.TH1(8b) timers, so not the higher resolution possible of 48MHz & UART1.SBRL1(16b) of the UB3 - minor stuff.
Addit: this loads and compiles as below ( not sure how to easily test HID uarts ?)
HID does seem to have lower total throughput than VCP, FWIU endpoints come into the mix, and looks like ~64 bytes/ms/endpoint ? so appx 640kBaud sustained ?
What sustained speed can you get from the CP2110 ?
Are you saying SiLabs do not test their examples, or ship real silicon ? Quite a strange claim.
Which 'running chip' do you imagine is needed, and in what precise form ?
I have a EFM8UB3 chip running on my bench right now, or is that still 'all theory' ?!
Many variants have been discussed, and I doubt there is one single solution.
As I said, lots of theory, no practical. I want to see something. Then I may be convinced.