jazzed -- As You said to me on UPEC meting's chat I we be thinking You have acceptance from Parallax and will supply us with all needed info to build that PCB - Now I start thinking -> It is not case.
Can we still have info to build that PCB from You?
jazzed -- As You said to me on UPEC meting's chat I we be thinking You have acceptance from Parallax and will supply us with all needed info to build that PCB - Now I start thinking -> It is not case.
Can we still have info to build that PCB from You?
I will supply what I am told that I can supply and nothing else.
I'll try to get more information regarding boot configuration. Do you need anything else?
I will supply what I am told that I can supply and nothing else.
I'll try to get more information regarding boot configuration. Do you need anything else?
I'm hoping for Parallax to put out a Prop 2 Protoboard early on, but.....considering a SMD-to-thru-hole adapter is an interesting activity. I've not gone through such an adapter design before and have no plans to design one, but enjoy such exercises.
I envision a two-layer pcb with a 2-row header on each side of the Prop 2 area The headres would be spaced away from the Prop pads enough for the bypass caps. A crystal would be located near the pin 128 corner. One possibly might want a 1.8v regulator on board. That should be all the parts necessary on the adapter. Under the Prop would be only power and ground copper filled; say ground on the top side, the power distributed on the bottom side.
A 1x32 header takes over 3.2" board width/length; where a 2x16 header about 1.6" and seems a better fit doing just a 'mental' layout; I've done quite a few pcbs and enjoy this mental exercise. If the adapter mounts atop a board with all the rest of the desired circuitry and connectors, a male header could mount on the adapter bottom side, with female headers on the other/main board. Just a 2¢ view from this member. Without a 1..8v regulator the board should be about 2" square.
I for one hope that Parallax will put out a Prop II Protoboard early on and I have niether the eyesight nor the soldering equipment to mount a small SMT chip on a board.
@ Cluso00,
But it doesn't provide any additional I/Os. Just adds some flexibility, was my understanding.
Is there a way to access the discussion on that feature (internal connections for use between cogs)? Seems the new forum caused us to loose access to all those old threads.
All this discussion makes me think that a PropII is imminent.... say a coupla weeks ? ... or are we already so delirious in anticipation that we already see that we can buy it next week ?... just asking coz I may have missed the release date!... <- there is no irony in the last sentence.
I like playing with my PCB design software and now that the pin outs have been defined it seemed a good opportunity to practice on a fairly complex chip. I don't use the spreadsheet approach I mentioned very much, and I wanted to see if it really helped. I've subsequently used it on an FPGA part, and it made sorting out all the banks etc. quite easy, especially as Altera now provides spreadsheets for their pinouts.
Because your software does not play you like the one I have to use (
I was just wondering if you can do the following : You have two vias and want to pass two or more tracks between them can the software align the tracks so they will be equidistant to each other and the outher rim of the vias ?
As I route manually that distances I need look by my self to made ---- BUT software have DRC warnings that I can adjust to as many mils as I wil have between via to via else via to track. That give nice control on aligning that You ask for!
Because your software does not play you like the one I have to use (
I was just wondering if you can do the following : You have two vias and want to pass two or more tracks between them can the software align the tracks so they will be equidistant to each other and the outher rim of the vias ?
Because your software does not play you like the one I have to use (
I was just wondering if you can do the following : You have two vias and want to pass two or more tracks between them can the software align the tracks so they will be equidistant to each other and the outher rim of the vias ?
I think I'd do that by using an appropriate grid after measuring the via separation (between the edges), setting the origin on the edge of one of the vias, setting the grid origin to it, and routing the tracks on the grid. It would only take a few seconds to set it up. I'd then do a DRC check, to make sure that I didn't have things too close, and adjust the track widths, if necessary. I just tried it, see the image. I was actually working to .0001 mm.
I'd probably move the vias, though, and use the normal grid.
If the Pulsonix autorouters are so good, why not use them? Or, is there too much work setting them up to be worth doing so? I'm just wondering; felt like something was missing with your response.
I've done quite a few pcbs, but all but one or two were manually routed (slow). Did have an autorouter (Douglas CAD, Macintosh) but that left too much to clean up.
The autorouters don't need much setting up, I just prefer manual routing. Where I often use autorouting is when I have to connect between lots of IC pins and a connector. You could download the demo software and try them for yourself:
It's full of typos, I've just told them about them.
It does do quite a good job. I just tried it on an old four-layer FPGA design of mine that was routed with a much earlier version of the autorouter and have attached the results. It took about 30 seconds to route to completion. I'd normally route important things like the regulator and clock signal manually, before running the autorouter.
Here is a concept that could be used on a two layer board, please disregard the sdram interface, it is just
a guess.
The design is biased on the 14 mm square 128 pin tqfp package, as far as I know Parallax hasn't released
the final package information yet. The on board 1.8V regulator is good for 250ma and should power the
Prop II core.
Here is a concept that could be used on a two layer board, please disregard the sdram interface, it is just
a guess.
The design is biased on the 14 mm square 128 pin tqfp package, as far as I know Parallax hasn't released
the final package information yet. The on board 1.8V regulator is good for 250ma and should power the
Prop II core.
Comments
jazzed -- As You said to me on UPEC meting's chat I we be thinking You have acceptance from Parallax and will supply us with all needed info to build that PCB - Now I start thinking -> It is not case.
Can we still have info to build that PCB from You?
I will supply what I am told that I can supply and nothing else.
I'll try to get more information regarding boot configuration. Do you need anything else?
1. PC communication pins - For programing.
2. BOOT device's and pin's used for them.
3. AND If You look on post I have on Footprint's -- What one will be used.
That was all. As I don't planing SDRAM -- I not need any info on that.
So that 3 points is all that needed for Experimenter's PCB to be made.
I have never said You need supply me with info that Parallax will not give us at this point!
I envision a two-layer pcb with a 2-row header on each side of the Prop 2 area The headres would be spaced away from the Prop pads enough for the bypass caps. A crystal would be located near the pin 128 corner. One possibly might want a 1.8v regulator on board. That should be all the parts necessary on the adapter. Under the Prop would be only power and ground copper filled; say ground on the top side, the power distributed on the bottom side.
A 1x32 header takes over 3.2" board width/length; where a 2x16 header about 1.6" and seems a better fit doing just a 'mental' layout; I've done quite a few pcbs and enjoy this mental exercise. If the adapter mounts atop a board with all the rest of the desired circuitry and connectors, a male header could mount on the adapter bottom side, with female headers on the other/main board. Just a 2¢ view from this member. Without a 1..8v regulator the board should be about 2" square.
Ben
Is 'TurboP8xX32' an official designation by Parallax, or just an interim one?
Considering that the X32 was for the number of I/O pins, it's not going to be called that in the end.
Thanks. For some reason, in my mind, the 'x32' referenced the width of the registers and instructions. So maybe 'P8X92'?
It sure isn't easy awaiting ('for the other shoe to drop') Parallax's release of all the info on Prop 2.
But those are not I/O pins, right? I'm not fighting about it; Parallax will be the one to assign that value. And we will live with it.
Have those 'internal connections' been detailed yet? I'm curious how they might be used.
IIRC they were discussed on the older Prop II thread before it got derailed
But it doesn't provide any additional I/Os. Just adds some flexibility, was my understanding.
Is there a way to access the discussion on that feature (internal connections for use between cogs)? Seems the new forum caused us to loose access to all those old threads.
I like playing with my PCB design software and now that the pin outs have been defined it seemed a good opportunity to practice on a fairly complex chip. I don't use the spreadsheet approach I mentioned very much, and I wanted to see if it really helped. I've subsequently used it on an FPGA part, and it made sorting out all the banks etc. quite easy, especially as Altera now provides spreadsheets for their pinouts.
Because your software does not play you like the one I have to use
I was just wondering if you can do the following : You have two vias and want to pass two or more tracks between them can the software align the tracks so they will be equidistant to each other and the outher rim of the vias ?
As I route manually that distances I need look by my self to made ---- BUT software have DRC warnings that I can adjust to as many mils as I wil have between via to via else via to track. That give nice control on aligning that You ask for!
I think I'd do that by using an appropriate grid after measuring the via separation (between the edges), setting the origin on the edge of one of the vias, setting the grid origin to it, and routing the tracks on the grid. It would only take a few seconds to set it up. I'd then do a DRC check, to make sure that I didn't have things too close, and adjust the track widths, if necessary. I just tried it, see the image. I was actually working to .0001 mm.
I'd probably move the vias, though, and use the normal grid.
Yes --- But mostly Auto-routing are ugly. And still need some rerouting to be usable.
The Pulsonix autorouters are very good, and the results can look as if they were routed manually. I don't use them much, though.
If the Pulsonix autorouters are so good, why not use them? Or, is there too much work setting them up to be worth doing so? I'm just wondering; felt like something was missing with your response.
I've done quite a few pcbs, but all but one or two were manually routed (slow). Did have an autorouter (Douglas CAD, Macintosh) but that left too much to clean up.
http://www.pulsonix.com/index.asp
Here are the autorouter features:
http://www.pulsonix.com/autoroute.asp
It's full of typos, I've just told them about them.
It does do quite a good job. I just tried it on an old four-layer FPGA design of mine that was routed with a much earlier version of the autorouter and have attached the results. It took about 30 seconds to route to completion. I'd normally route important things like the regulator and clock signal manually, before running the autorouter.
Thank you for your input. I too enjoy manual routing of a pcb; much more than schematic generation. But it's all part of the whole task.
Added Picture on PCB in progress in post #2.
a guess.
The design is biased on the 14 mm square 128 pin tqfp package, as far as I know Parallax hasn't released
the final package information yet. The on board 1.8V regulator is good for 250ma and should power the
Prop II core.
It is why I masked my PACKAGE footprint on my Layout as it use same footprint You describe.