Heater. wrote: »
Often people ask for interrupts in the Propeller. Question is does it make sense to have parallel cores plus the extra circuitry and complexity of interrupts? I think not.
dMajo wrote: »
Interrupts: They are not needed, true.
... Isn't usually interrupt handlers written in assembler even if the main language used is of a higher class like C, Basic or whatever else and the main code processing stops until a return from the interrupt handler?
altosack wrote: »
The question on my mind is this: can the P2 duplicate this performance ? What I mean is, the P1 is more powerful and more useful than anyone, probably even Chip, thought in 2006; regardless of its market performance, it's a stunning engineering achievement. The P2 is starting from a much higher base with its new goodies; can it be as much better in 7 years as the P1 is now ? Think of the possibilities !
rjo__ wrote: »
During his Skype talk at the Expo, Chip pretty much said that the only barrier to the 40micron level and 1GHz was more than one and less than ten million dollars... and a little fussing with the pin definitions. (There is always fussing with the pin definitions.) When the engineers see the Prop2... that kind of money will be waiting in future orders. No more partners, no venture capital... firm orders with a very flexible delivery date:)
I would give favorable odds that the P3 gets delivered a lot faster than the P1 or P2:)
Gadgetman wrote: »
Clock-switching per cog has been discussed before.
Not a good idea as it really messes up timing for HUB access for the other COGs.
evanh wrote: »
Ah, still reading back through the posts ... the WAITxx instructions when pertaining to low power consumption is a valid objective to pursue. For this alone there is reason to desire a pipe per hardware thread.
NumPy wrote: »
Ok, maybe, 3.00 dollars, or more/?, that is pretty substantial at 10,000 units plus.
brucee wrote: »
A fab facility is a multi billion $ proposition, so that is not what it takes to get to cheap parts these days. Most "semi-conductor" companies are fabless these days.
brucee wrote: »
Sorry, but time for a reality check here....
The competition is not $1 PICs but $1 ARMs these days. Can the P2 compete there? But I think it will find some homes in the hobbyist community or small and simple applications. This is where its simple design, ease of understanding can be applied. As for larger and more complex tasks, the memory limitations are quite severe, as performance drops off by factors of 8 each step from COGRAM to HUBRAM to SDRAM. Not to mention the difficulty of managing memory, as anyone who had to deal with x86 or Rabbit processors had to go through (which I did).