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Dracblade SBC with Catalina C, PropBasic, CP/M, MP/M, TRS80, wireless network, - Page 24 — Parallax Forums

Dracblade SBC with Catalina C, PropBasic, CP/M, MP/M, TRS80, wireless network,



  • Toby SeckshundToby Seckshund Posts: 2,027
    edited 2010-11-17 05:15
    The PLCC 44 chips are limited to 34 i/os, even though the innards are capable of 36. Even if a 9572 were used the pin outs would be the same, but you could do more tricky logic inside.
    The PLCC is good for the 50 thou pin pitch but becomes enormous with the 84 pin package (which would allow for all 72 i/o possibilities on a 9572 and upwards, but then the SM packages would have to be the obvious choise.

    I must get into the flow of the new age and go small at some point, but then it makes it so tricky to use the same chips over and over on several projects.


    With 8 data pins(in), 4 decoder pins(in), 19 address pins (out), /rd-/wr pins (out) and the DIAG pin (out) thats the lot!
  • Toby SeckshundToby Seckshund Posts: 2,027
    edited 2010-11-21 09:57
    Right, here is the intermediate experimental board. It is just as the last attempt but there are no air-wires, now it fires up CPM properly (as well as the other EMUs). I think that it was all the excess wirage.

    There are no user constraints used on the CPLD in that the pin out was chosen by the Xilinx software, hence this is only an interim. I will now have to experiment with the layout pin designations so that the address and data pins are easily wirable. As usual, for me, the datas and addresses are just picked to make the layout a bit easier. How I wish I could do 0.3mm vias and through hole plating!!!!

    No pics of the copper side due to shame, no mistakes but just a little rough (fortunately on unimportant bits)
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  • Dr_AculaDr_Acula Posts: 5,484
    edited 2010-11-21 14:28
    That is really quite clever!

    The dracblade also works with the graphics drivers that are being developed. Some pictures take a while to load off the sd card, and there may be scope to buffer them in external ram instead.

    I've also got an idea that an easy way to do this would be with Catalina running in external ram, and define a series of arrays to store that data. Catalina could be the engine that drives everything, freeing up virtually the entire hub ram for graphics sprites.

    This board you have developed looks ultra minimalistic. I presume there is a little programmer board for the CPLD?
  • Toby SeckshundToby Seckshund Posts: 2,027
    edited 2010-11-21 15:17
    The board does little than the base memory stuff, more I/O pins and flip-flops required for other stuff. A 9572 type I have would allow for those pins and have more room for the F-Fs.

    The Parallel III interface is fairly open source now and is nothing more than a couple of 74hc125s. That is the first "third" of this board, the second is the CPLD bits with some clock opions and the last is just a bunch of switces and LEDs for messing around. The PSU bits are on the rear.
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  • Dr_AculaDr_Acula Posts: 5,484
    edited 2010-11-21 15:41
    How I wish I could do 0.3mm vias and through hole plating!!!!

    We could get a board made if you like. BaggersBoard? BaggersBlade?

    What you could do is put a header on the board and bring out the lower 12 prop pins. Then you could always take that to an add-on board with its own decoder (discrete or another CPLD) to do more I/O.

    Then the minimalist board would be very simple - eeprom, propeller, cpld, ram.

    Would this programmer work? as I can't see a socket for the CPLD. Or is it better to homebrew that?
  • Toby SeckshundToby Seckshund Posts: 2,027
    edited 2010-11-22 03:35
    If it is Parallel III compatible then it should. The software (enormous) spots the interface, even through WinXP. I made my interface etc over a year ago.
  • Heater.Heater. Posts: 21,230
    edited 2010-11-22 03:57

    That's neat.

    Now that you have minimized the chip count can we grow this to a DracBlade with 1MByte RAM. Zog would love that:)

    How does one do the CPLD programming without out a par port? I have not seen one for half a decade and I would like not to have to get into USB/Par Port adapters.
  • Toby SeckshundToby Seckshund Posts: 2,027
    edited 2010-11-22 04:04
    There are Usb versions but they probably cost money (shudder). I hold onto my old MB , and P3 laptop, for that reason.

    I'll have a hunt around.

    There is the DIAG pin (unused on the 9536) so 1MB could be had with this minimal setup, but thats the end of them without a bigger package / going to SM.
  • BaggersBaggers Posts: 3,019
    edited 2010-11-22 13:10
    Dr_Acula wrote: »
    We could get a board made if you like. BaggersBoard? BaggersBlade?

    eh? what? did I miss something?
  • Toby SeckshundToby Seckshund Posts: 2,027
    edited 2010-11-22 13:40
    No. Nothing interesting going on here, move along please.

    Just me pratting about with some near obsolete chips, again. I thought that perhaps the Coolrunner range would be more up to date, then I saw the pin pitches, and the price. I fear the problem with programming them on a parallel port will leave all this a "me" only project.

    I am going to try another "interim board" this time with the pin designation set by the layout. This is a bit of a departure from all the years of looking into the chip data books for the pinouts.

    Dr_A is trying to temp me into the PLCC84 9572, which would allow for the ports and LCD bits that I keep missing off.
  • Dr_AculaDr_Acula Posts: 5,484
    edited 2010-11-22 15:33
    Re baggers, sorry, I was pulling in the other discussion on video, thinking this board could be a good demo for video. External ram should speed up buffering of graphics.

    Hmm - lots of people have contributed - really this will have to be a ClusoHeaterDracPullmollTobyBaggers blade with about 10 other people we need to add as well.

    Toby, what are the approx prices on those CPLD chips? Are the bigger ones PLCC as well?

    also, re programming on a parallel port, there are USB to parallel adaptors now for a very good price on ebay, so they make a parallel port more 'obsolete proof'. If we ever did do a board, it might be a two set board - one with the CPLD, one a simple programmer with a D25 and a few PLCC sockets, and include in the kit a usb to parallel adaptor.

    Heater - hmm, you could add another ram chip if you like. Just needs a little decoding on the highest order bit. One inverter I think. With DIP chips that is another chip. With CPLD it is a tiny bit more software.

    I think Toby is onto something very interesting here. How many I/O pins does that 84 pin chip have?
  • BaggersBaggers Posts: 3,019
    edited 2010-11-23 00:45
    lol no worries, I was joking, but that is a bit of a mouthful, maybe HeToPuDrBaCl-Blade a slight re-order of names ( first two letters ) to make it semi distinguishable lol
    so it sounds like "He To Pudder Backle Blade" :)
  • Toby SeckshundToby Seckshund Posts: 2,027
    edited 2010-11-23 01:15
    The 9572 that I have two of is PLCC84 and so has more area than the DIP40. The litlle 9536 in PLCC44 is only about £1.50 or so but the '72 was £6 so more expencive than the individual '373 chips etc. I think that there are 68 I/O pins on the PLCC84 so with 34 used so far that would leave the same for the ports latches ans LCD. The '72s I have are the 5Volt version and so is a bit heavy on the current (50mA indicated on the datasheet) but has 3.3V I/O options. With acommercial board the pin pitch of coolrunners ( or other CPLDs wouldn't be a problem. Leon prefers the Altera ones, I just used the Xilinx because I got hold of a couple and wanted to play, about a year and a half ago.

    I have had a quick look at the parallel port problems and the outlook, so far, is not that good. Either you go the official route and thats £150 (big ouch) or the Diligent route at £40 (glancing blow). The use of USB to parallel interfaces seems to be a no-no as they are not bi-dirrectional fully, this could be a ploy to sell the expencive ones though! An internal, PCI etc, would be cheaper.

    I will continue to look into it (and hold onto that old MB)

    Heater's 1MB ram would just need redeployment of the DIAG o/p
  • Dr_AculaDr_Acula Posts: 5,484
    edited 2010-11-23 01:41
    Yes the programmer might need some thinking about.

    It is a similar problem to the N8VEM project where you had to buy an eprom programmer.

    I'm still selling one or two dracblade boards a week, and getting a few requests for a kit rather than just a board, especially with all the unusual parts on the board (vga socket, sd card socket etc).

    If one had a kit, it could come with the CPLD pre-programmed?

    @Baggers, might have to add RossH and Jazzed to that weird hybrid name. See the catalina thread for some code Ross is working on. Fascinating stuff.

    And with Toby's super simple board, much quicker to solder up.
  • BaggersBaggers Posts: 3,019
    edited 2010-11-23 03:13
    HeRoToPuBaDrClJaBlade it is then :D

    or "Hero To Pub a Dracle Ja Blade"
  • Toby SeckshundToby Seckshund Posts: 2,027
    edited 2010-11-23 05:07
    Simple Toby bored, more like.

    (at work)
  • Dr_AculaDr_Acula Posts: 5,484
    edited 2010-11-23 05:26
    Simple Toby bored, more like. (at work)

    When you get home, check out the code Baggers just posted on the full color tile thread.

    Quite amazing to think the prop can display at this resolution, and handle smooth sprite movement too.

    I can't wait to see where this is going to go.
  • Toby SeckshundToby Seckshund Posts: 2,027
    edited 2010-11-23 05:48
    I did push it into the "lunchbox" (a demoboard (ish)) but I saw no VGA pics. The syncs must have been there as the monitor stayed on. I'll have another go on Thursday.
  • Toby SeckshundToby Seckshund Posts: 2,027
    edited 2010-11-29 07:13
    Version 2 of the experiment. This one is not really that different to the last one but does allow for putting the CPLD on the end of the PCB and the move of the 5V to 3.3V reg. This will allow for the next experiment using the 9572 chip allowing for the LCD and I/O port stuff. This time I have treied to get A0 actually on A0 etc, but the data bits are still jumbled up, next time ... I have compiled the CPLD bits but have yet to test it.

    The 9572 chips I have are the 5V version so the 5V reg is better nearer it, and using the CPLD to translate the voltages on its I/Os

    (Picture didn't make it through the works PC)
  • Toby SeckshundToby Seckshund Posts: 2,027
    edited 2010-11-29 16:18
    just the pic.
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  • Dr_AculaDr_Acula Posts: 5,484
    edited 2010-11-29 17:31
    This looks remarkably compact. I see the board has the sd card as well.
  • Toby SeckshundToby Seckshund Posts: 2,027
    edited 2010-11-30 00:47
    I didn't start out thinking double sided, but when I thought about using the area above the CPLD for the regulator's heatsink, I used it for the SD card (and the 3-5 Volt reg went underneath it.

    Today, if I get a chance, I will prog the CPLD and see it the trail is still being followed.

    What is the latest cct for the DracBlade, ie the one with LCD and ports. That should be the next attempt with a bigger CPLD.
  • Dr_AculaDr_Acula Posts: 5,484
    edited 2010-11-30 02:41
    Attached is the version 9 schematic. I have had 10 of these made, but I haven't soldered one up yet.

    The unconnected headers on the schematic are to make up a prototyping area.

    There is a mouse socket with a jumper to select mouse or serial port 2.

    I've got a range of regulator options as some people have found it hard to find the switchers.

    For the CPLD - the main thing is the addition of one more latch and one input buffer. I chose to connect these to a parallel port but you could also bring them out as 8 generic inputs and 8 generic outputs.

    A question - say you do go for the bigger CPLD - I looked up the prices - are two smaller ones cheaper than one bigger one?
  • Toby SeckshundToby Seckshund Posts: 2,027
    edited 2010-11-30 07:31
    You just do not understand this, do you. The ethos is, to one by one remove a chip from your design, until there is just a regulator talking to a VGA socket. :^)

    Two tidlers would be possible but at the expense of more involved PCB tracks. On a commercial board with proper vias and feed throughs that probably wouldn't be a problem ... but with the ironing? The good thing of the prog logic is that all that is internal and the pinouts can be bent to suit the layout, making the ironing easier. This project will have to turn more and more SM anyway.

    I have stuck up the Xmas tree, and strung it with lights .... so PERHAPS I can now get around to pushing the code into the CPLD (as soon as the bench PC stops coming up with "BOOT DISK FAILURE" !!!) :^(
  • Toby SeckshundToby Seckshund Posts: 2,027
    edited 2010-11-30 12:24
    As I am only taking tiny steps, each time, the second version runs CP/M etc ok. So onto the 9572 version (v3).

    I have Xilinx ISE 12.x on the bench computer, but version 7.x on the laptop. The code in the 9536 is from the laptop work I played with whilst things were quiet at work. I tried to re-do all of it on the bench, this afternoon, but couldn't get it to take the user constaints properly, I have had this problem before so I will have to learn to run ISE properly. It might be me, but it is a PITA.

    Onward and upwards.
  • Dr_AculaDr_Acula Posts: 5,484
    edited 2010-11-30 13:44
    You just do not understand this, do you. The ethos is, to one by one remove a chip from your design, until there is just a regulator talking to a VGA socket. :^)

    Yes, sorry, a thousand pardons. I will let the master work!
  • Toby SeckshundToby Seckshund Posts: 2,027
    edited 2010-11-30 14:41
    But then, I would enter a world of ever decreasing circles. We all know where that ends.
  • Toby SeckshundToby Seckshund Posts: 2,027
    edited 2010-11-30 15:22
    One thing that has dawned on me is that the LCD latch has a 5V feed, that would not be poss with the one big chip. TTL thresholds should be poss with the 3.3 Volts...

    You have used the PC parallel form as the ports, was there a reason for that? or was it just a compatable plug/lead thing?

    I ventured into looking at EAGLE for a layout, so at last you could see what I was doing and to allow others to take the same foolish journey. I thought that the ISE was a PITA !!!!!!
  • Dr_AculaDr_Acula Posts: 5,484
    edited 2010-12-01 20:05
    Yes, good point re the TTL 5V levels.

    Re the parallel port, no good reason except that it is a standard, and there are boards out there to interface the parallel port to the real world (relays etc) and because I had some D25 sockets to hand. I could have brought out the 8 inputs and outputs to headers - thoughts on this would be appreciated.

    Say if you want some help with Eagle. There are about 20 tricks you need to know but once you know them it is very easy to use.

    See the attached photo - this is the soldered up v9 board.

    1) Prototyping area. Who knows what that could be useful for, but I've got some ideas testing A to D and D to A, as well as testing out serial 8 pin ram chips.
    2) Mouse. Winnie is the only PS2 mouse I have to hand and was a reject from the children (my kids have moved up to optical mice, and much faster computers than I do).
    3) Audio out.
    4) TV or VGA - (TV not soldered up).
    5) Sockets for three types of 3V regulator and three types of 5V regulator.
    6) Plus all the usual goodies - sd card, keyboard, vga, dual serial ports, external memory.

    I've tested most things. External ram with Catalina and CP/M. Mouse and keyboard with Kye's combo mouse/keyboard object. Serial ports. VGA. LCD display. Playing movies.

    I haven't tested parallel port yet but the code will be almost identical to the LCD display. I want to build some binary loadable cog code for catalina so hopefully will be able to load up a cog with a parallel port driver (eg overwrite the sd card driver), send out some bytes, get things back, then reload the sd card driver.
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  • Toby SeckshundToby Seckshund Posts: 2,027
    edited 2010-12-02 00:55
    The I/Ps of the 95xx are 5V tolerant, even when in 3.3V I/O mode, it will be the other things such as the LCD that may throw a wobbler. If the external stuff is TTL compatible then all should be well.

    I will just bring the 8 ins and the 8 outs to a header, there is no point in lowering the number because with the 84 pin version of the 9572 I have spares. The chips I have were intended for the Z80 and nascom rebuild and so are the 5V ones, these are shown on the spec sheets to use more current than the XL (3.3V) ones. They do give 20+mA outputs though. I will have do a comparison of the 74HCxxx, 9536xl and 9572 power requirements.

    My next PCB's size will have to be bigger, mainly due to the sockets.

    I will have to get on with EAGLE, I suppose, and start getting bits together to try photo sensitive PCBs.

    Meanwhile I'm off to sweep the dishes, again.
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