Might it be worth Fedexing a chip to Peter so he can test too? He knows the pcb and has parts.
That sounds like a good idea...
They are about to place parts, so if they are 100% certain of pin 1, maybe send Peter a placed board ?
Correct Pin 1 verify, should be checkable with a uA meter on RSTn to test the pullup, when powered.
Might it be worth Fedexing a chip to Peter so he can test too? He knows the pcb and has parts.
That sounds like a good idea...
They are about to place parts, so if they are 100% certain of pin 1, maybe send Peter a placed board ?
Correct Pin 1 verify, should be checkable with a uA meter on RSTn to test the pullup, when powered.
Yes, i have all the parts and didn't have any problems with simple hand assembly plus i have used chips before with large thermal pads so i know what to expect. I'd let it reflow in the oven but otherwise I'd use a big fat iron and some wetting solder if i had to encourage it.
If you are still puzzled about 'Chip backwards' - why not simply measure the Pullup on the RESET pin ?
ie GND RST thru a uA meter. A 50K pullup, will show 66uA
The XI should not have that.
For GND TAB checking, measure the substrate diodes, to the GND plane.
For a more complete test, I'd suggest a 5R in the ground lead to the PCB. Connect a 1:1 scope probe across that, and you get 50mV drop at 10mA. If it goes over 50mV, lower the resistor.
Ramp Vcc core, with RST low, and watch Icc
Then pulse RST, and capture the current profiles (trigger on RST), which should show OSC / Loader stages.
Yes, i have all the parts and didn't have any problems with simple hand assembly plus i have used chips before with large thermal pads so i know what to expect. I'd let it reflow in the oven but otherwise I'd use a big fat iron and some wetting solder if i had to encourage it.
Yes, reflow in oven sounds best, (even better with a paste screen)...
I'm a little worried about the uneven thermal stresses of the point-heat GND tab approach Chip is trying, on the delicate samples.
Before hitting the part hard like that, I'd first meter the IO's substrate diodes to PCB GND plane, to check if it is really needed.
I'm not following the inverted reset issues, as the PCB has a CAP in the base of the Reset Trx, which makes it edge activated ?
ie a narrow pulse will reset, just on different edges. (few ms difference)
Congratulations on a live P2! Thanks for streaming the unboxing and first power-up. It's exciting to see this finally come to fruition. Can't wait to try one.
Getting your hands on a P2D2 mounted one should be straightforward.
How many more than 1 do you need ?
Did Chip say there were more die, & just 100 were currently being true-packaged ?
ie question becomes how many P2 die were actually run in this batch & what yields did OnSemi have ?
Larger volumes need to wait for the first production batch.... I'm sure Ken will be eager to hear volume forecasts
Of course, any Final Errata is still being defined - still to test are Xtal/PLL, and all PAD Ring functions, and all corners of the ROM / Boot straps etc.
I still think the fastest way to get the P2 tested is letting that guy from down under run some TACHYON/TAQOZ/FORTH whatever you want to call it on it.
Isn't that why TAQOZ is in ROM to do exactly that? Error diagnosis and checking out attached things?
Because that seems to me what TAQOZ is left to use for, since no interaction with other software was planned in, and people USING TACHYON will load a complete TACHYON instead of using TAQOZ.
So lets give @"Peter Jakacki" a chance to show what TAQOZ is for. Send him ASAP some chips, he has boards...
Comments
They are about to place parts, so if they are 100% certain of pin 1, maybe send Peter a placed board ?
Correct Pin 1 verify, should be checkable with a uA meter on RSTn to test the pullup, when powered.
Not to mention cracking the die with the mill-the-board approach. Surely a IO substrate diode can confirm GND connection ?
Still working from the Part 4 URL... Go back to the Forum page with that URL and try again.
dgately
ie GND RST thru a uA meter. A 50K pullup, will show 66uA
The XI should not have that.
For GND TAB checking, measure the substrate diodes, to the GND plane.
Connect a 1:1 scope probe across that, and you get 50mV drop at 10mA. If it goes over 50mV, lower the resistor.
Ramp Vcc core, with RST low, and watch Icc
Then pulse RST, and capture the current profiles (trigger on RST), which should show OSC / Loader stages.
Yes, reflow in oven sounds best, (even better with a paste screen)...
I'm a little worried about the uneven thermal stresses of the point-heat GND tab approach Chip is trying, on the delicate samples.
Before hitting the part hard like that, I'd first meter the IO's substrate diodes to PCB GND plane, to check if it is really needed.
There is no clock, but I think part 4: tab is still alive / current ?
Part 5 - Propeller 2 Attempt to Program 39 watching now
...and that one is now ended..
https://www.youtube.com/channel/UCRRnwtubciltfF7siUW4ZTQ
j
Part 6 - Propeller 2 Live Stream - We seem to have life! 34 watching now
ie a narrow pulse will reset, just on different edges. (few ms difference)
UPS 24 hour worldwide does include down under or not?
Enjoy!
Mike
Some DOCs are in post 1 here
https://forums.parallax.com/discussion/162298/prop2-fpga-files-updated-2-june-2018-final-version-32i/p1
and some more docs here
https://forums.parallax.com/discussion/168574/p2-documentation/p1
Congratulations Chip, Ken and the rest of the team at Parallax!
Getting your hands on a P2D2 mounted one should be straightforward.
How many more than 1 do you need ?
Did Chip say there were more die, & just 100 were currently being true-packaged ?
ie question becomes how many P2 die were actually run in this batch & what yields did OnSemi have ?
Larger volumes need to wait for the first production batch.... I'm sure Ken will be eager to hear volume forecasts
Of course, any Final Errata is still being defined - still to test are Xtal/PLL, and all PAD Ring functions, and all corners of the ROM / Boot straps etc.
Isn't that why TAQOZ is in ROM to do exactly that? Error diagnosis and checking out attached things?
Because that seems to me what TAQOZ is left to use for, since no interaction with other software was planned in, and people USING TACHYON will load a complete TACHYON instead of using TAQOZ.
So lets give @"Peter Jakacki" a chance to show what TAQOZ is for. Send him ASAP some chips, he has boards...
Enjoy!
Mike