P2 hardware reference design and choices

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  • Peter JakackiPeter Jakacki Posts: 7,704
    edited June 11 Vote Up0Vote Down
    Double sided plated through hole vs multi-layer, or plain single sided. There are so many terms, just like FRB is Fiber Resin Board and normally FR-4 grade. Then there's the weight of the copper, the soldermasks, whether they're routed or v-grooved (that's what I call it) and why pcb laminate is "green" but not really and the copper finish is HAL or plated etc. Actually I don't know why I just started because I think I could write a book about it easily enough even though I hardly know any of the terms they use. Probably @WBA Consulting could tell you a lot more about the industry I guess.

    Warning! Rant....
    Actually, when I use matrix board for prototyping I always use tinned DSPTH uncommitted pad per hole for a lot of very good reasons. I wish they would stop selling that bendy brown SS stuff as FR-4 DSPTH can be very cheap these days and if you want to have a "track" you just strip some wire and tack it along the pads. No need to cut track as it is messy and leaves shavings and all that is such a carry over from the early 1960's and Veroboard strip.

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  • Re current PCB layout, would it be worthwhile aligning the Serial header to the same 0.1" grid as the I/O headers? Shouldn't the dpi info in the png file be ~ 600 dpi?
    Formerly known as TonyB
  • TonyB_ wrote: »
    Re current PCB layout, would it be worthwhile aligning the Serial header to the same 0.1" grid as the I/O headers? Shouldn't the dpi info in the png file be ~ 600 dpi?

    Yes, I've been caught before forgetting to check my alignments before manufacturing. Most of the time it doesn't matter but this may be mounted on matrix board, so it ought to line up. Thanks.

    The png file is just a screenshot for the moment but I should be able to generate some high quality images I guess.


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  • Durp... of course. I should remember not to try and think before my first morning coffee.
  • Heater. wrote: »
    Durp... of course. I should remember not to try and think before my first morning coffee.

    Whaaatt! in a way Zoolander might say, you tried to think BEFORE your first morning coffee. Bad doggie!

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  • I think you will find the xtal 3225 usually requires the two other pads are connected to gnd.
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  • Peter JakackiPeter Jakacki Posts: 7,704
    edited June 11 Vote Up0Vote Down
    It seems the 3225 fits inside a 5032 without really needing to change the pads. Maybe I will scrap the two pin crystal and just use a 5032 footprint although I would have to strap pin 4 for gnd or supply. That TXO at Digikey is very cheap but I'm not sure why jmg is linking to parts that have zero stock and not on order.

    The cheapest 12MHz 10ppm 3225 XO I found at Digikey was around $1 in 100s. I think I might need to have two 5032 footprints, one for XOs and one for 4-pin crystals. Or I could leave it as such since the XO is a much better option and the two large pads that I have for my crystals are easy to solder to, in fact I have soldered tiny cylindrical crystals to them many times before.

    So, taking all this into account I could leave the pcb as is, no breakaways, and just polish it up while generating the various files from it. We are in no hurry and when we have weighed up a few more options I could make the changes then. It would be good to have some boards made up and tested ready for a P2 chip. It isn't to hard to add the P2 after a couple of units have already been assembled. Once that puppy is mounted I could throw a TAQOZ party and get P2 up singing and dancing.

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  • Peter,
    I don't understand why my pcb manufacturers question why I don't have designators but I do know that they seem to expect them because everybody else does.
    As far as I can tell silkscreening any useful information onto PCBs is old school now a days. Take a look at MacBook motherboards for example.

    After all you would not want to make it easy for anyone to repair your kit now would you?
  • Cluso99Cluso99 Posts: 13,896
    edited June 11 Vote Up0Vote Down
    On my P8X2Blade I put 2 vias on the xtal tracks. These will take a watch can xtal comfortably.
    There are plenty of 3225 xtal and osc available nowadays, so I don't see the need for other footprints any more.
    Not forget if you use an osc you need a bypass cap at the power pin. See the data sheet for recommended footprint for the osc I links previously.

    When I get time to do my pcb, I will be placing components on both sides. I've been doing that for a few years now without problems.
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  • Re: Identifiers

    An image can be generated with them. Overlay layer in graphics program, done, next.

    This will be open and that means having more than the board available. Anyone can generate this data, should it somehow be required.

    Seems to me screening for identifiers would complicate a compact design.

    Looks like a smart choice in this scenario.



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  • Peter JakackiPeter Jakacki Posts: 7,704
    edited June 11 Vote Up0Vote Down
    Latest update is that I have added these things:
    1 - a transistor reset circuit to the serial port which means you can use those cheap ebay usb-serial cables.
    2 - Convert free pads to two 40-pin 0.05" strips
    3 - Added more caps for P2 plus one for the XO.
    4 - Series shunt or cap from XO
    5 - The 5032 XO footprint also handles 3225s easily. (Haven't finalized this area yet)
    6 - realigned the serial connector to the 0.1" grid.

    The schematic needs a bit of tidying up too.

    P2D2-CV3.pngP2D2-SCH.png
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  • jmgjmg Posts: 12,042
    It seems the 3225 fits inside a 5032 without really needing to change the pads. Maybe I will scrap the two pin crystal and just use a 5032 footprint although I would have to strap pin 4 for gnd or supply.
    It does not matter if you keep the xtal, but I would make the 4-pad footprint have narrow channels, to allow almost any size to drop in.
    That TXO at Digikey is very cheap but I'm not sure why jmg is linking to parts that have zero stock and not on order.
    As I explained above, that part is an indication of size/price trends, and my Digikey shows stock arriving in August.
    I linked to another ASVTX-11-121-19.200MHZ-T part that is in stock, and I see another one has arrived since....
    Epson TG-5035CJ-13N 19.2000M3 (2.00mm x 1.60mm) ±500ppb

    I see that one has Function Standby (Power Down) on a /ST pin, unclear if that pin 1 has a pullup, or if it needs a strap to Vcc.Pin4 ?


    So, taking all this into account I could leave the pcb as is, no breakaways, and just polish it up while generating the various files from it. We are in no hurry and when we have weighed up a few more options I could make the changes then. It would be good to have some boards made up and tested ready for a P2 chip. It isn't to hard to add the P2 after a couple of units have already been assembled. Once that puppy is mounted I could throw a TAQOZ party and get P2 up singing and dancing.

    I would make the Osc footprint take the (2.00mm x 1.60mm) packages too, but you may be planning that already ?

    It many be good to pause until Chip has some Icc numbers to nail down the regulators.

    USB can be set for 500mA, so it would be nice to push the Linear regulators up toward that space.
    TO-252 are the best thermally, but they need a longer PCB - so I have pushed the SOT223 around and added more pour areas, and below is the same-pcb-size fit, that has copper areas on both sides to spread the heat.
    Pretty much all of a strip on both sides is now via-thru copper-cooling, and from there, heat can spread to the larger GND area too.
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  • jmgjmg Posts: 12,042
    5 - The 5032 XO footprint also handles 3225s easily. (Haven't finalized this area yet)

    The X1 footprint can of course take a 3225 Xtal rotated 45 degrees, using just the 2 used terminals, for evaluation.

    If you extend the pads under X1 somewhat, quite small crystals could be fitted there & that keeps the tracks simpler.

    eg Murata XRCGB series are (2.00mm x 1.60mm) packages, needing 6pF load.
    I see those ~ 15c/3k at ±40ppm, and a few cents more for XRCGB24M000F1H00R0 24.0000MHZ 6PF $0.22425/3k ±10ppm
    I'm curious to see what MHz those deliver, connected to a real P2 - ie how close the Load C can be, to what Murata design for.


  • jmgjmg Posts: 12,042
    edited June 12 Vote Up0Vote Down
    2 - Convert free pads to two 40-pin 0.05" strips

    That's great, now I can round-trip netlist inside kiCad PCB :)

    The report file does give this
    Info: Checking netlist symbol footprint "C62::0603A_3".
    Clearing component “C62:” pin “1” net name.
    Clearing component “C62:” pin “2” net name.
    Info: Checking netlist symbol footprint "C62::0603A_3".
    Changing footprint "C62:" pad "1" net name from "" to "3V3C".
    Changing footprint "C62:" pad "2" net name from "" to "GND".
    

    and close inspection shows you have two C62's ;) (easily fixed)

    Issue #1 : I also notice GND has only one entry for U1, (pin 1) and is missing the U1.G PAD ? - is that the export, or does your design not connect PAD yet ?
    (or maybe it is 'P' on the SCH and 'G' in the PCB ?)

    More:
    Checking KiCad's NET import, it behaves as I hoped, with good difference reporting - example
    (re) Import with new node gives
    Changing footprint "U1:" pad "G" net name from "" to "GND".
    then (re) import with node removed
    Clearing component “U1:” pin “G” net name.

    If the design is identical, & no conflicts or empty fields, there are no change lines, just the info: lines.

    So that's good, as it means a .NET snapshot can be exported, and then checked, after some edits. (because there is no SCH side here yet..)

    Issue #2: I also notice a tendency to increment a suffix, which may be an export/translation artifact ?
    eg 0603A_9 0603A_3, but it does not always increment. Does not seem to be rotation based ? - does the original design have this ?
  • This design is mostly finished I think except for changes I probably will make to the crystal footprints at some time plus I may add a small support micro for my own use although it is not necessary for other designs. I went through and re-annotated all the designators for the physical layout, moved all hidden designators to mechanical layer 4, all hidden values to mechanical layer 3, cleaned them up for display purposes, and other general stuff like that. I have now generated exports and gerbers.

    To do:
    Next to do is to clean up the schematic layout. I will run design rule checks etc on the pcb too to make sure but it looks good. Oh yes, I need to check and maybe redistribute my thermal vias too.

    Here is a gerber view (using gerbv) to look at the component value layer together with the visible component overlay (plus mechanical layer 1 which is the actual board outline vs keepout which is only for copper pours).

    P2D2-COMP-GERB.png
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  • Peter JakackiPeter Jakacki Posts: 7,704
    edited June 12 Vote Up0Vote Down
    This is a very rough mock-up but mainly done to check scale. Not actually having any real P2 chips I've used any 100 pin chip I could find.
    Just imagine those pins headers cut off and the board surface mounted flat to "your board" :)



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  • TubularTubular Posts: 3,116
    edited June 12 Vote Up0Vote Down
    hi Peter

    The DIL headers are almost pinout compatible with the Parallax P123 boards - P32~63 is, with the exception of the Vcc pins you've added

    I was checking the 32 led test boards we did for the P123 and these will work fine with your board too, because the power led only uses the outermost pad (so doesn't short across to the new Vcc)

    However if I rotate the PCB 180 degrees and plug into your other DIL header (P0~P31) the odd/even pin order is different - P0=P33 and P1=P32

    Would it be possible to switch the odd row (P1~31)with the even row (P0~30) so future plug-in boards will work regardless of being plugged into "port A" or "port B" ? This only needs tweaks between the castellations and the DIL pads.

    33led_small.jpg
    (aside: the P123 P0~31 runs in reverse order, as per photos, but nothing we can do about that. At least GPIO are in compatible locations)

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  • jmgjmg Posts: 12,042
    This design is mostly finished I think except for changes I probably will make to the crystal footprints at some time plus I may add a small support micro for my own use although it is not necessary for other designs. I went through and re-annotated all the designators for the physical layout..

    Cool - that's fixed the duplicate RefDes, and now connects the P2.PAD to GND ok :)

    One minor point - usually convention has the 'primary' IC is called U1, then the next most important U2 etc - the last re-annotate has flipped it, so P2 is now U2 & Flash is U1 ?

    This is my KiCad net export check report summary
    #Comment  KiCad NET export using PcbNew_Export_PcbNew_NET.py v1.02, from Kicad design: C:\..\Parallax\PJ\P2D2-PCAD_M12.kicad_pcb
    #Comment: Parts:56, Nets:82, PinsConected:395, TotalPads:403, Ref Skipped:0
    
  • Wow! That's small. Nice work Peter.

    I had envisioned it 2x thst size. The SD card really reset all that.
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  • Cluso99Cluso99 Posts: 13,896
    edited June 12 Vote Up0Vote Down
    potatohead wrote: »
    Wow! That's small. Nice work Peter.

    I had envisioned it 2x thst size. The SD card really reset all that.

    NAH. It's huge!

    We need Chip to chat with OnSemi. If we shrink to 80nm and use 0.25mm pitch we should be able to make that pcb the size of the SD Card ;)

    And at 10nm and VFBGA we should get to the microSD size ;) ;) ;)
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  • Tubular wrote: »
    hi Peter

    The DIL headers are almost pinout compatible with the Parallax P123 boards - P32~63 is, with the exception of the Vcc pins you've added

    I was checking the 32 led test boards we did for the P123 and these will work fine with your board too, because the power led only uses the outermost pad (so doesn't short across to the new Vcc)

    However if I rotate the PCB 180 degrees and plug into your other DIL header (P0~P31) the odd/even pin order is different - P0=P33 and P1=P32

    Would it be possible to switch the odd row (P1~31)with the even row (P0~30) so future plug-in boards will work regardless of being plugged into "port A" or "port B" ? This only needs tweaks between the castellations and the DIL pads.

    33led_small.jpg
    (aside: the P123 P0~31 runs in reverse order, as per photos, but nothing we can do about that. At least GPIO are in compatible locations)
    I haven't heard about the 32 LED test boards for the P123. Are they available for sale?

  • More than happy to send you some, David. Just PM
  • Cluso99 wrote: »
    potatohead wrote: »
    Wow! That's small. Nice work Peter.

    I had envisioned it 2x thst size. The SD card really reset all that.

    NAH. It's huge!

    We need Chip to chat with OnSemi. If we shrink to 80nm and use 0.25mm pitch we should be able to make that pcb the size of the SD Card ;)

    And at 10nm and VFBGA we should get to the microSD size ;) ;) ;)

    Looks like we might be able to match an SD card by moving the flash under the microsd (and finding a suitable switching topology at upper left)

    You know, if you asked me to nominate what was bigger out of a basic/spin stamp and a SD card, I would have said the basic stamp, but its actually the SD card. Weird



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  • Tubular wrote: »
    More than happy to send you some, David. Just PM
    Thanks for the offer but I suspect there are others who can make better use of these if you're giving them away.

  • jmgjmg Posts: 12,042
    edited June 13 Vote Up0Vote Down
    Tubular wrote: »
    I was checking the 32 led test boards we did for the P123 and these will work fine with your board too, because the power led only uses the outermost pad (so doesn't short across to the new Vcc)

    However if I rotate the PCB 180 degrees and plug into your other DIL header (P0~P31) the odd/even pin order is different - P0=P33 and P1=P32

    Would it be possible to switch the odd row (P1~31)with the even row (P0~30) so future plug-in boards will work regardless of being plugged into "port A" or "port B" ? This only needs tweaks between the castellations and the DIL pads.

    Sounds like a very good idea to make those symmetric, and looks quite easy to do, but the latest files posted by Peter do not yet do that ?

    Addit: thinking about footprints, this board is now the same connector length as a RaspPi Zero, so it could make sense to add a Pi 40 pin header to one side ?
    Or even better both sides, to show P2 as a Pi-Bridge - ie can connect two Pi-Zero's together ? That would get some attention !

  • jmgjmg Posts: 12,042
    Tubular wrote: »
    Looks like we might be able to match an SD card by moving the flash under the microsd (and finding a suitable switching topology at upper left)
    I'm not quite following - the board actually takes microsd, right ?
    So the size of SD outline is for reference purposes only, another size ref could be a business card / credit card & the existing PCB is under half that size ?

  • Yes, it takes a microsd my sliding it across the surface of the P2 and into the molex socket.

    And yes, the SD outline is for reference/comparison purposes only
  • David Betz wrote: »
    Tubular wrote: »
    More than happy to send you some, David. Just PM
    Thanks for the offer but I suspect there are others who can make better use of these if you're giving them away.

    You're far too humble, David. We have a drawer full of these already made up sans stackable header, so there would still be plenty left. It'd really be no trouble to send you a couple, it'd just take a week and a half to get to the USA
  • Peter JakackiPeter Jakacki Posts: 7,704
    edited June 13 Vote Up0Vote Down
    I haven't looked at swapping the row of pins to suit the led board. If it is easy enough then no problem. I went through and fixed a few design rule violations and filled the thermal pad with a 7x7 thermal via array.

    <P2D2 documentation link>

    P2D2 features:
    • All 64 I/O arranged as two headers of 16x2 or 2 strips of 32 for half-hole castellations.
    • Single sided components - surface mountable
    • Small sized 2"x1.5" (max = two SD card sizes) or 2"x1" in SMD configuration
    • Large ground and thermal plane on bottom layer
    • On-board regulators for 3.3 and 1.8V including on-board SMPS option
    • Sheltered MicroSD (faces inward and protected from damage)
    • SPI Flash
    • Serial disable or priority jumpers (resistors).
    • Power and status LED
    • Full thermal via array
    • Prop Plug compatible header with extra pins for USB 5V power
    • On-board transistor reset circuit allows cheap Arduino type USB serial modules to be used
    • Crystal or Oscillator option
    • Current limit protected serial lines.
    • 15 decoupling caps surrounding the P2 + many others
    • 1.8V power ring + two 3.3V power buses

    So you can plug in your cheap CP2102 ebay serial cable and power this board immediately while still having full access to all I/O. Evaluate and use the same module as a surface mount component on your matrix board or simple PCB.

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  • jmgjmg Posts: 12,042
    I haven't looked at swapping the row of pins to suit the led board. If it is easy enough then no problem.
    It would mean both connectors are compatible, with inner-most being the same ordering. I've not checked which side needs swap to match the LED boards.

    Taking that further, it could be clearer to make the connectors 40 way, and ensure the same pin number is Vcc etc on each side, so a (eg) 40 pin ribbon cable can plug into either side.

    Ideally, the ribbon number increments with the pad number, and they are plug swapable

    Doing that means pin1 is top-right and bottom left and Vcc needs to swap ends on one connector.

    To make this connector pin number and ribbon-cable-friendly (linear order) I make that P32..P63 need to pair swap, and P0..P31 map OK to pins 5 thru 36, in a linear fashion.
    That may not be the same as the LED boards, but I think the ribbon cable standard trumps a custom PCB. - it just needs a sticker to fix the PCB (one list is backwards anyway, so a sticker is already called for ).
    • 15 decoupling caps surrounding the P2 + many others
    You mentioned adding caps optional on underside - are they there yet ?

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