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P2 hardware reference design and choices

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  • Peter JakackiPeter Jakacki Posts: 7,467
    edited June 9 Vote Up0Vote Down
    There are still plenty of caps to work in on the same side and for sure one up near the microSD, especially since my regulators are on the other end. Btw, this board it's only just one of several versions i am doing, it is the most basic one suitable for prototyping and as a reference. Other ones will have more dedicated devices and connectors.
    Having dual row headers allows ribbon cable to be attached easily or even jumper cables but for anything more specialised i would just plug the board, one or both sides directly into some matrix board which would have the right connectors etc. I'm looking forward to designing those aio smps chips in too.
    I just had a coffee :)

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  • jmgjmg Posts: 11,675
    .. I'm looking forward to designing those aio smps chips in too.
    I just had a coffee :)

    What PCB Layout SW are you using here ?

  • Still using Protel99SE since i have so many components designed into it and it is easy to use and certainly not lacking in features. I have tried many different other ones but even if i build up new libraries, they still lack the usability of Protel imo.

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  • jmgjmg Posts: 11,675
    Still using Protel99SE since i have so many components designed into it and it is easy to use and certainly not lacking in features. I have tried many different other ones but even if i build up new libraries, they still lack the usability of Protel imo.

    Can that version of Protel export P-CAD ASCII files ? (KiCad can import P-CAD ASCII )
  • The dual row is pretty much the way to go these days when you have lots of pins. The problem with SIL is that there is to much space taken up, and routing the pins in sequence becomes a nightmare.

    I use a slightly older version of Protel too. I think the only usable export is gerbers. Like Peter, I have all my components designed. It is easy to route - I always hand route. I can import my netlist, although with small pcbs, I often create a netlist as I go, without schematics. When you have used Protel for more than 20 years you get to know it fairly well. Over recent years I have looked at kicad, but each time I give up and just fall back to my comfort zone.
  • jmgjmg Posts: 11,675
    Cluso99 wrote: »
    I use a slightly older version of Protel too. I think the only usable export is gerbers.

    Google suggests ACCEL (P-CAD) was sold to Protel in 2000, and retired in 2006, which suggests something sightly newer than Protel99SE is needed (if that 99 means 1999 release )

    I have managed to import this P-CAD PCB file fine into KiCad v5. Needed minor cleanups of rules, clearances, and trace-ends to get to 0 DRC and 0 unconnected in the reports.
    ie it looks a worthwhile pathway.
  • How so? Just because they bought an opposition doesn't mean they used any of it.

    Protel is still around but it became too expensive to upgrade. I had used Autotrax under DOS before they called it Protel.
  • jmgjmg Posts: 11,675
    Cluso99 wrote: »
    How so? Just because they bought an opposition doesn't mean they used any of it.

    There is a P-CAD exporter in Altium, the question is around which version.

  • jmg wrote: »
    Cluso99 wrote: »
    I use a slightly older version of Protel too. I think the only usable export is gerbers.

    Google suggests ACCEL (P-CAD) was sold to Protel in 2000, and retired in 2006, which suggests something sightly newer than Protel99SE is needed (if that 99 means 1999 release )

    I have managed to import this P-CAD PCB file fine into KiCad v5. Needed minor cleanups of rules, clearances, and trace-ends to get to 0 DRC and 0 unconnected in the reports.
    ie it looks a worthwhile pathway.

    Have a try at this export into PCAD 2000 ASCII and a few different formats but didn't seem to be able to bring them up in Kicad, which I don't have any experience with btw.

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  • jmgjmg Posts: 11,675
    Have a try at this export into PCAD 2000 ASCII and a few different formats but didn't seem to be able to bring them up in Kicad, which I don't have any experience with btw.

    Thanks, I'll try later when I'm back at the kiCAD PC..

  • Btw, DIPTRACE seems to handle those files well but I will have to have more of a look at it later

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  • jmgjmg Posts: 11,675
    Have a try at this export into PCAD 2000 ASCII and a few different formats..
    The .pcb one has this header

    ACCEL_ASCII "H:\Dropbox\Tachyon\P2\PCB\P2PCB\P2PCB-PCAD.pcb"

    and that seems to import just fine into my KiCad :)

    Image and status bar parts/vias etc report attached.

    1152 x 648 - 59K
  • jmgjmg Posts: 11,675
    ... and this shows how KiCad's Shove Router works. Here, I just pick the via, and drag it, and the traces all bend out of the way...
    Kicad also has a nice pad-entry centering algorithm ( I think they call that magnetic pads..)
    610 x 550 - 44K
  • kwinnkwinn Posts: 7,883
    jmg wrote: »
    ... and this shows how KiCad's Shove Router works. Here, I just pick the via, and drag it, and the traces all bend out of the way...
    Kicad also has a nice pad-entry centering algorithm ( I think they call that magnetic pads..)

    Thanks for posting that. I have just recently downloaded KiCad to my laptop (running Mint) and this helps to motivate me to stick with it in spite of the learning curve.
    In science there is no authority. There is only experiment.
    Life is unpredictable. Eat dessert first.
  • jmgjmg Posts: 11,675
    Have a try at this export into PCAD 2000 ASCII and a few different formats..

    Since that worked so well, (PCB -> PCB), the next step is to look for

    a) A Two way pathway ...
    KiCad can export to Specctra, whcih was a ripup/retry router that Altium also supported
    Attached below is a Specctra /DSN file, maybe Altium/Protel can import that format ?

    b) Netlist export / import for revision checking
    Somewhere, I have a Python script to export a netlist from within PCB side - just have to find that...

    Attached below is the native kiCad netlist minimal format, which is something Altium/Protel may already support ?
    Is there a report script engine in Altium ?
  • Protel netlist is an extremely simple text file. I create mine manually.
  • Peter JakackiPeter Jakacki Posts: 7,467
    edited June 10 Vote Up0Vote Down
    Cluso99 wrote: »
    Protel netlist is an extremely simple text file. I create mine manually.

    Glutton for punishment is all I can say to that when it is so simple to create a proper schematic in the first place, especially in Protel99SE. I've used all the early versions of Protel and I used to just create the PCB as I went and I didn't always have a proper schematic. But I did some work for one company that required it done properly with named netlists using Protel99SE. I growled and I grumbled but became used to it in no time and I haven't looked back. How many times has that schematic helped me avoid mistakes on my pcb and I have a nice schematic at the same time. Although I miss the freedom of just running a track from this pad instead of that pad etc it is only a simple matter of making the change on the schematic and updating the pcb. However I have never met an autoplacer/autorouter which I respected, especially the autoplacer since it has no real idea about connectors and packaging etc. Once I place all the components properly then make a few changes to the schematic, I usually find that it becomes very easy and a pleasure to route manually.

    One thing I always find amusing with many smd pcbs that I see is the visible component designator which must be the most useless and unnecessary thing in the world. In the old old days the designator was useful for manual assembly and for those armies of repair technicians armed with all their training and service manuals. But now the parts are so small that there is no room for designators and as for manual assembly and repair I have the component overlay and values etc printed up to fill a sheet so it can be easily viewed, even on a tablet.

    Here's an example of an pcb assembly "overlay" where the values and designators are not visible on the actual pcb itself.
    Screenshot%20from%202018-06-10%2011-41-16.png

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  • Here's the latest pcb layout for my P2D2 pcb :)
    There are still more caps to go and better grounds, plus SMPS options and footprints but it's coming together.
    P2D2.png
    1202 x 901 - 127K

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  • jmgjmg Posts: 11,675
    ...But I did some work for one company that required it done properly with named netlists using Protel99SE. I growled and I grumbled but became used to it in no time and I haven't looked back. How many times has that schematic helped me avoid mistakes on my pcb and I have a nice schematic at the same time...

    I think Altium/Protel has a ECO tab, where you can compare a design with a net-list ? That would give a means to check the translate/import worked correctly.
    What format net-lists can that ECO support on your system ?
    If you give example(s) of simple netlists that can be used on one side of the compare, I'll see if I can get kicad to generate one. (PADS format netlist I can already generate)
    I've found my older python to generate a netlist, tho V5rc KiCad seems to have dropped a couple of dtabase access script features ?


  • jmgjmg Posts: 11,675
    Here's the latest pcb layout for my P2D2 pcb :)
    There are still more caps to go and better grounds, plus SMPS options and footprints but it's coming together.
    Looks nice.
    Can you add an (optional) series C between the Oscillator module pin3 and the P2 XI pin ? - that allows Clipped sine oscillators. (replace with 0R or SMOD osc, remove for xtal.. )

  • jmg wrote: »
    ...But I did some work for one company that required it done properly with named netlists using Protel99SE. I growled and I grumbled but became used to it in no time and I haven't looked back. How many times has that schematic helped me avoid mistakes on my pcb and I have a nice schematic at the same time...

    I think Altium/Protel has a ECO tab, where you can compare a design with a net-list ? That would give a means to check the translate/import worked correctly.
    What format net-lists can that ECO support on your system ?
    If you give example(s) of simple netlists that can be used on one side of the compare, I'll see if I can get kicad to generate one. (PADS format netlist I can already generate)
    I've found my older python to generate a netlist, tho V5rc KiCad seems to have dropped a couple of dtabase access script features ?

    All these files including any exports and reports and netlists are freely available even right now in my P2/PCB Dropbox folder although I will probably wait until I clean up the design and then I will generate all the extra reports.


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  • I really like the simplicity of your board layout. Makes it straightforward from a design AND usage standpoint. It should also be easy to assemble for a wide range of users. I realize it's a bit too early to dial things in solid, but I applaud your efforts thus far.

    We (as in my EMS employer) use older Protel CAD files from customers frequently with our Aegis Fusion MES software (manufacturing software to convert CAD/gerber/BOMs/DWGs in to usable work instructions for the production floor, machine programs, defect data collection paths, etc, etc). We do this by utilizing ASCII CAD data available from Protel. I am not sure what level of design integrity (traces/nets) remains, but it works well for many needs we have.
    Here is what our CAD Import Guide says for Protel 98/99SE:
    PROTEL 98/99 ASCII PCB File ver 3
    Extraction Procedure:
    Within Protel, select the File menu->Save As.
    When in the File Format dialog, select ASCII .PCB
    Common File Extension: *.pcb
    
    File Header:
    |RECORD=Board|FILENAME=D:\Shoebox\PCB_design\SwitchTest\Backup of Copy of SW_2.PCB|KIND=Protel_Advanced_PCB|VERSION=3.00|DATE=24-May-2001|TIME=11:52:14|ORIGINX=2050mil|ORIGINY=2250mil|BIGVISIBLEGRIDSIZE=10000000.000|VISIBLEGRIDSIZE=100000.000|ELECTRICALGRIDRANGE=0.5mil|ELECTRICALGRIDENABLED=TRUE|SNAPGRIDSIZE=5000.000000|SNAPGRIDSIZEX=5000.000000|SNAPGRIDSIZEY=5000.000000|TRACKGRIDSIZE=50000.000000|VIAGRIDSIZE=200000.000000|COMPONENTGRIDSIZE=5000.000000|COMPONENTGRIDSIZEX=5000.000000|COMPONENTGRIDSIZEY=5000.000000|CURRENTWORKINGLAYER=BOTTOM|DOTGRID=TRUE|DISPLAYUNIT=1|PLANE1NETNAME=(No Net)|PLANE2NETNAME=(No Net)|PLANE3NETNAME=(No Net)|PLANE4NETNAME=(No Net)|PLANE5NETNAME=(No Net)|PLANE6NETNAME=(No Net)|PLANE7NETNAME=(No Net)|PLANE8NETNAME=(No Net)|PLANE9NETNAME=(No Net)|PLANE10NETNAME=(No Net)|PLANE11NETNAME=(No Net)|PLANE12NETNAME=(No Net)|PLANE13NETNAME=(No Net)|PLANE14NETNAME=(No Net)|PLANE15NETNAME=(No Net)|PLANE16NETNAME=(No Net)
    

    The ASCII.PCB files will also import in to Altium fairly clean. (We use Altium occasionally to manipulate design data to create cleaner gerber exports for stencils, create panelization files for fabs we purchase, etc.
    One thing I always find amusing with many smd pcbs that I see is the visible component designator which must be the most useless and unnecessary thing in the world.
    That's interesting Peter. Reference designators are the defacto standard for silkscreen nomenclature for PCBAs in OEM/EMS environments. So much so, that I have turned products away because they were missing reference designators. We have built product without reference designators, but it causes issues with inspection and verification processes on the production floor. Everything is always built in accordance to a fully detailed BOM, so all of the pertinent data is readily available by looking up the reference designator.
    On the flip side, home building of boards can be made simpler by using silkscreen nomenclature that matches the physical parts. So, for a 10k 0805 resistor, rather than have "R1", it would make more sense to have "103" since the part should be marked that way.

    As a reference item I like to share, IPC has a nice free design checklist for anyone designing rigid PCBs. Not everything will apply, but you can trim it down for your needs. the PDF is here: http://www.ipc.org/4.0_Knowledge/4.1_Standards/PCBA-Checklist18.pdf , but it's linked on this page: http://www.ipc.org/ContentPage.aspx?pageid=Standards
    I wish I could share some of my IPC specs related to design, but they are paid/licensed PDFs.


  • @WBA Consulting - a final PCB has to be functional first. If we are spacing components out just for component IDs then we are compromising the pcb layout. It is easy enough to work from an oversized printed overlay but PnP machines don't require anything printed on the pcb other than registrations. I've never seen a PnP machine that required component IDs and I don't think I've ever seen repair manuals printed these days for the vast majority of pcbs either. If I need to repair a board I use my oversized overlay print. How do you think you'd ever fit the text "10k 0805" in for every component on packed boards, let alone be readable? Besides I do use 0603s a lot. The old TH boards were never any problem though as there was always plenty of room for component ids.

    It looks like Protel's exports work well in Kicad and Diptrace so I'm sure that from the Protel master we should be able to have the files in different formats. Although then your company may turn these boards away because of lack of component id on the pcb itself, but others won't :)

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  • The P2D2 pcb is nearing completion as I have added a narrow strip to the left side for boot option resistors and LEDs. I may also add the SMPS options to a narrow strip on the right side that can be broken off if not needed, or even broken off and soldered onto the current end of the pcb using the connecting pads. This board will probably be produced in half thickness pcb of 0.030" which makes it easier to surface mount since it is still a small board.

    Screenshot%20from%202018-06-10%2017-24-33.png

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  • 0.8mm might be a little thin for a 2" pcb. What about 1.0mm or even 1.2mm?
    I haven't used 1.6mm for some time. Amazing how much weight it saves for shipping the bare pcbs. And for tiny pcbs they look so much better with thinner pcbs.
  • Cluso99 wrote: »
    0.8mm might be a little thin for a 2" pcb. What about 1.0mm or even 1.2mm?
    I haven't used 1.6mm for some time. Amazing how much weight it saves for shipping the bare pcbs. And for tiny pcbs they look so much better with thinner pcbs.

    I'll look into it, the main thing is that there is no need for standard thickness and as long as it's thinner as it also aids smd mounting when using the castellations. I will have to think about mask and id colors, something distinctive I hope.


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  • TubularTubular Posts: 2,983
    edited June 10 Vote Up0Vote Down
    Here's my first attempt at a SIL adapter that can plug in where a DIP P1 (0.6") would normally go. So we can use existing P1 designs, or breadboards.

    To get the spacing right i'm using 'magic zigzag headers' (samtec tsm), surface mount design, but mounted through hole, which each add 57 mil of offset. That brings the spacing back to standard 0.1" of the P1

    I didn't start out thinking 'servo headers', but the design bulges out a bit around the middle, and in the end it works well for power routing

    It turns out that there is room for vias inside in addition to an 18 mil 'ring main' for the 1.8v bus.

    The connector at right is a standard 2 row Pmod. There's quite a few spare pins, it may be possible to place a hyperram or playground area on the back.

    p2_D_top.png
    808 x 485 - 19K
  • jmgjmg Posts: 11,675
    edited June 11 Vote Up0Vote Down
    All these files including any exports and reports and netlists are freely available even right now in my P2/PCB Dropbox folder ..
    Is there a link for that ?

    The P2D2 pcb is nearing completion as I have added a narrow strip to the left side for boot option resistors and LEDs. I may also add the SMPS options to a narrow strip on the right side that can be broken off if not needed, or even broken off and soldered onto the current end of the pcb using the connecting pads.

    An extra break off area sounds a good idea. Common here is a route/partially cuts breakoff appx a hacksaw blade width. (eg Nuvoton )

    Can you fit onto that breakoff, a (couple? of ) USB-UART module header pinouts ? ( should straddle any SMPS stuff fine ? )

    A modern low cost module (~$8) is the CP2102N-MINIEK , with Flash reconfig, can set to 500mA USB
    This is DIP20-600 footprint, and is good to 2-3MBd without handshake and 4MBd with handshake, 3V TTL pins.

    Next step up is maybe the FT4232H Mini Module, which is 1.0" dual row outer pin spacing, x13x4 pins, then possibly the MM930Mini Module, different pinout, same 1.0" space and x15x4 pins.
    FT4232H gives 4 x 12MBd channels, but costs more at $29.
    MM930Mini is annoyingly vague on abilities, and default settings, and may dictate using a UMFTPD2A module to update it....

    Also easy to support looks the 6 pin PL2303HXD Cable on eBay (US$3+) - a simple 0,1" header, with Red +5 V Black GND White RXD Green TXD Yellow RTS Blue CTS
    (not clear if that has 5V TTL ?)
    - Looks like older PL2303 differed, but the new PL2303HXD specs a 3v3 IO pin, and VOh > 2.4V , but it has an OTP config memory, just 2x PGM cycles, so is less flexible than CP2102N

  • @Tubular,@Peter
    Nice layouts guys!
    Makes me want to drop everything and get into some PCB design myself. :)
    Melbourne, Australia
  • Peter JakackiPeter Jakacki Posts: 7,467
    edited June 11 Vote Up0Vote Down
    Bring it on fellas!

    My first design is fairly simple but the goal was to use standard pcb manufacturing technology, so 8mil design rules etc and DSPTH but standard components on one side only. The smallest components are 0603s which can even be hand soldered although I prefer paste, place, and toast. Also every I/O is available on the edge as well as a standard or enhanced Prop Plug connection. So the board is designed to be powered externally from 5V or from the USB port if you are using one of my Prop Plug cables with the extra power pin. Because I may max out the power requirements for testing I have included not only the LDOs but also the SMPS option too.

    @jmg - I did up a footprint for the SC202A SMPS module. Man, it's small. I will look into putting some other useful stuff on the breakouts such as the USB cable etc. All the files are in my public Tachyon folder but here is a link to the P2 folder, just look in PCB and P2PCB etc although I haven't done a final export yet.

    BTW - here are shots of the board as it is now while I'm still thinking about the smps regulator as it looks like I could squeeze in onto the main pcb itself although I will still have an extra breakaway section.
    P2D2-CV.pngP2D2-TL.pngP2D2-BL.png

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