Open Propeller Project #6: Open Source Verilog for Propeller 1

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  • jmgjmg Posts: 13,917
    KeithE wrote: »
    I just ran across this board:

    https://www.cnx-software.com/2018/09/04/licheetang-anlogic-eg4s20-fpga-board-targets-risc-v-development/

    It might be an interesting target for P1V. It's supposedly only $13. The FPGA is from a Chinese company Anlogic and I believe that they are located in Shanghai. I only mention this because some documentation and tools might not yet be translated.

    The main Chinese player in FPGA is Gowin, and they announced a FPGA very similar....
    http://www.gowinsemi.com/product/arora/

    this may be a re-badge of that ? (or even the illusion of a second source)
    The DRAM included on the Gowin Arora parts is certainly appealing...

    Imagine P1V and some smart pins... :)
  • well, the smart pins are not complete on the FPGA of the P2, so I think they are way to analog to get done in Verilog.

    And since the P2 is now silicon I do not see any need for a 8 COG P1 with 32K RAM vs a 8 COG P2 with 512K RAM to use Smart Pins.

    And a P2 might be cheaper as a comparable FPGA.

    Mike
    I am just another Code Monkey.
    A determined coder can write COBOL programs in any language. -- Author unknown.
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    The key words "MUST", "MUST NOT", "REQUIRED", "SHALL", "SHALL NOT", "SHOULD", "SHOULD NOT", "RECOMMENDED", "MAY", and "OPTIONAL" in this post are to be interpreted as described in RFC 2119.
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