potatohead wrote: »
__red__ wrote: »
... so it is true that the actual **coded instruction** is still encoded in bytes but its assembly analog is written in longs?
(and the next location of code that should execute after a JMP is (encoded value/4)-1?
'+++++++++++++++++++++++++++++++++++++++++ orgf $018
loc ptra, #palette ' $0005c
loc ptra, #@palette ' $00178
loc ptra, #palette ' $00054
loc ptra, #\palette ' $00018
loc ptra, #\@palette ' $00060
mov ptra, #palette ' $018
mov ptra, ##palette ' $00018
mov ptra, ##@palette ' $00060
palette long $12345678
Not sure, but I was under the impression that it had something to do with byte/long alignment between hub and cog execution.
Yes, as I remember bytes are the common denominator. With that encoding, there is a quick computation done in COG or HUB, allowing code to run either way.
Seems odd when looking at other chips. Makes sense on the P2 and the different addressing spaces.
Can't find the thread on mobile... but, it may be just a shift for the COG, or in VERILOG, taking the upper bits only. It is an add for the HUB.
Not sure how to read that, but PC-relative is with respect to the instruction following the branch. ie: Program counter is already incremented and next instruction is fetched by the time the branch is executing, so the distance to jump is taken from that.
Might have the other piece you were asking for, after having just pondered the addressing modes a little further in another topic - https://forums.parallax.com/discussion/169317/hub-ram-below-400-and-in-rom-area?/p1
EDIT: The $178 address, like previous case, is way wrong: https://forums.parallax.com/discussion/comment/1454261/#Comment_1454261
EDIT2: More learning and clarification here - https://forums.parallax.com/discussion/comment/1457026/#Comment_1457026