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Parallax P2 Eval Board

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  • jmgjmg Posts: 15,140
    cgracey wrote: »
    jmg wrote: »
    cgracey wrote: »
    It is done. This 3D rendering makes the text look less aligned than it actually is.
    I do not see provision for Clipped Sine Oscillator ? ( A simple AC coupling cap to X1 is all that is needed, as done in P2D2)
    I thought you selected a TCXO as the default Oscillator ? there is minimal price impact, and it shows off P2 capabilities nicely.

    Is there a SCH for this anywhere ?

    I looked into it, but we do, at least, need a crystal in place. The problem is that we cannot input a clock into XI without driving XO. So, the crystal's presence precludes the use of a clipped-sign oscillator feeding into Xi.

    I'm not following ? Why do you 'need a crystal in place' ? - just some External Clock source is needed ?
    - I thought you had a 4 pin Xtal or Oscillator footprint option, but the PCB seems to have changed again there ?
    P2D2 has a 2 pin xtal footprint, and a 4 pin, wide package choice oscillator footprint (4 pin Xtals can mount onto the 2 pin at 45', if someone has a favourite xtal they want to test)

    This Eval Board is massive, but strangely tight and limited, in places where it need not be so... ?
  • cgracey wrote: »
    msrobots wrote: »
    could you also squeeze in two LEDs for RX and TX like on the PC-USB side? Not really important but it disturbs the symmetry...

    Mike

    They are there. Upper right.
    jmg wrote: »
    msrobots wrote: »
    could you also squeeze in two LEDs for RX and TX like on the PC-USB side? Not really important but it disturbs the symmetry...
    Those TX & RX are from the FTDI part, there is no equivalent FTDI on the other USB, so no TX/RX exist there - that package merely looks like a FTDI (caught me out too..)

    OK, I see, so the right USB is for serial communication via FTDI and the left one is just for power?

    My thinking was that the left one can be used to work with @garryj's P2 USB Implementation without using a FTDI part.

    If just used for power, could there be some headers to connect the other pins to P2 pins via jumper cable?

    Mike
  • cgraceycgracey Posts: 14,133
    edited 2018-11-07 19:18
    jmg wrote: »
    cgracey wrote: »
    jmg wrote: »
    cgracey wrote: »
    It is done. This 3D rendering makes the text look less aligned than it actually is.
    I do not see provision for Clipped Sine Oscillator ? ( A simple AC coupling cap to X1 is all that is needed, as done in P2D2)
    I thought you selected a TCXO as the default Oscillator ? there is minimal price impact, and it shows off P2 capabilities nicely.

    Is there a SCH for this anywhere ?

    I looked into it, but we do, at least, need a crystal in place. The problem is that we cannot input a clock into XI without driving XO. So, the crystal's presence precludes the use of a clipped-sign oscillator feeding into Xi.

    I'm not following ? Why do you 'need a crystal in place' ? - just some External Clock source is needed ?
    - I thought you had a 4 pin Xtal or Oscillator footprint option, but the PCB seems to have changed again there ?
    P2D2 has a 2 pin xtal footprint, and a 4 pin, wide package choice oscillator footprint (4 pin Xtals can mount onto the 2 pin at 45', if someone has a favourite xtal they want to test)

    This Eval Board is massive, but strangely tight and limited, in places where it need not be so... ?

    Most customers will want to see an SMT crystal in use, as that's the most cost-effective clock source. We are using a +/-10ppm crystal here.

    To use a clipped-sign oscillator, you would have to desolder that crystal and bring the signal, capacitively coupled, into XI.

    I want to kind of steer things towards use of a 20MHz clock source, as it easily divides and multiplies to many needed frequencies. Our crystal oscillator and PLL were designed for 20MHz.

    The smallest SMT crystals can be had in the common 20MHz frequency.

    I know you don't agree with this.
  • jmgjmg Posts: 15,140
    msrobots wrote: »
    My thinking was that the left one can be used to work with @garryj's P2 USB Implementation without using a FTDI part.
    It does, Chip has said it connects to P2 USB pins. He is checking the D+/D- ordering.

    Some care might be needed here, with permanent P2 pins to a USB header, and some new USB chargers being able to deliver 5/9/12/20V, purely on what levels they see on D+/D-

    Here is someone playing about with this ability :

    http://blog.deconinck.info/post/2017/08/09/Turning-a-Quick-Charge-3.0-charger-into-a-variable-voltage-power-supply


    P2 could manage that signaling via DACs easily enough, but the SMPS side might go *poof* (along with your P2) if it is not rated to the higher voltages.
  • I an going to run 180, same as David. Want to test tools and wite some code to exercise them.

    I like the board a lot.
  • My concern is that using the same P2 pins connected to both USB connectors will prevent the USE of P2-USB because there is already a FDTI USB chip connected to the same pins.

    Like that sad reset problem one has on almost all parallax P1 boards when using serial out without having the USB connected to a PC. Stray currents power on the FTDI and boom it resets the propeller.

    Now we have two connectors on the board and it would be nice to use one with the FTDI part on the boot pins, and the second one to use @garryj's driver. Thus one needs different pins.

    Sure one can connect a third USB connector to do so, but there are already two there?

    If the left one is pure for power supply, at least all other pins should go out on some header. It is a dev board, isn't it?

    Even more if d+/d- are used to tell a USB charger what to do, doing that AFTER booting in software with the DACs might be to late to prevent 'poof', having the pins on a header might allow to prevent that.

    just asking,

    Mike
  • jmgjmg Posts: 15,140
    msrobots wrote: »
    My concern is that using the same P2 pins connected to both USB connectors will prevent the USE of P2-USB because there is already a FDTI USB chip connected to the same pins.
    Where do you get that ?
    Chip said this "P56 and P57. I need to confirm the order of DP and DM." ie which are separate P2 pins from the TX & RX pins.

  • garryjgarryj Posts: 337
    edited 2018-11-07 20:21
    cgracey wrote: »
    msrobots wrote: »
    where is P2-USB connected to?

    Mike

    P56 and P57. I need to confirm the order of DP and DM.
    The upper (odd) pin should be DP, the lower DM.

    Edit: the doc mentions that the 1.5K and 15K resistors would be in the silicon - I'm assuming this is this still true?
  • cgraceycgracey Posts: 14,133
    garryj wrote: »
    cgracey wrote: »
    msrobots wrote: »
    where is P2-USB connected to?

    Mike

    P56 and P57. I need to confirm the order of DP and DM.
    The upper (odd) pin should be DP, the lower DM.

    Edit: the doc mentions that the 1.5K and 15K resistors would be in the silicon - I'm assuming this is this still true?

    Yes, the resistors are in the silicon.

    Good thing this polarity thing came up (Jmg), because the board was wrong! It had DM going to P57 and DP going to P56. That is getting fixed.

    Meanwhile, even a new pic:

    1706 x 1663 - 327K
  • Publison wrote: »
    I'm trying to get the dimensions as we speak. I will post if I can.

    All I can get for dimensions right now is 3.5" x 3.5" .
  • cgraceycgracey Posts: 14,133
    Publison wrote: »
    Publison wrote: »
    I'm trying to get the dimensions as we speak. I will post if I can.

    All I can get for dimensions right now is 3.5" x 3.5" .

    Yes, it's 3.5" x 3.5".

    The fan holes have been expanded to 0.125" and they are 50mm apart on the diagonals.
  • cgraceycgracey Posts: 14,133
    edited 2018-11-07 20:33
    There are 27-ohm resistors in series with the AUX USB connector's DP and DM. Those can be left off to remove the likelihood that some crazy power event occurs. There is an octal CMOS TTL-input-level buffer (for P[63..56] LEDs) that runs off that 5V input from the USB connectors. If that were to get to 12V, it wouldn't be good.
  • cgraceycgracey Posts: 14,133
    I'm going to post the P2 Eval board schematic here in a few minutes. I'm hoping you guys could look it over and see if any red flags pop up.
  • Yeah, I would have the default case be that those data pins are not connected, and allow the end user to connect them if wanted. In fact, I would just have them go to a 2 pin header spot someplace, and let the user decide which prop pins to connect them to.
  • Cluso99Cluso99 Posts: 18,066
    Roy Eltham wrote: »
    Yeah, I would have the default case be that those data pins are not connected, and allow the end user to connect them if wanted. In fact, I would just have them go to a 2 pin header spot someplace, and let the user decide which prop pins to connect them to.

    Yes. Sounds like the better option to me too.
    On second thoughts, use 0603 resistors for links. Then for connection, 0R or solder blob will work.

    Can there be a solder link to allow the FTDI USB connector to supply 5V? An 0603 resistor pads works for this. Then anyone who wants the FTDI USB to supply power can just solder a blob to short the 0603 pads. Perhaps do the same on the other USB and fit a 0R. Then that can be removed (for safety) if the other is used for power.
  • RaymanRayman Posts: 13,799
    Those 2-pin headers... On one of them, one pin labelled Vdd and the other labelled 1V8.
    But, I think one is actually ground, right?
  • cgraceycgracey Posts: 14,133
    Here it is. Do you guys see any problems?

  • jmgjmg Posts: 15,140
    Rayman wrote: »
    Those 2-pin headers... On one of them, one pin labelled Vdd and the other labelled 1V8.
    But, I think one is actually ground, right?

    I though that was for series current measurement, usually jumpered ? (fitted jumper not shown)
  • RaymanRayman Posts: 13,799
    Is that reset just a capacitor to DTR# and a 10k pullup?

    Didn't expect something so simple...
  • cgraceycgracey Posts: 14,133
    jmg wrote: »
    Rayman wrote: »
    Those 2-pin headers... On one of them, one pin labelled Vdd and the other labelled 1V8.
    But, I think one is actually ground, right?

    I though that was for series current measurement, usually jumpered ? (fitted jumper not shown)

    You were correct. A jumper boot normally goes on there, but it can be removed for current measurements.
  • cgraceycgracey Posts: 14,133
    edited 2018-11-07 22:07
    It looks like Common_VDD_FB and Common_VIO_FB signals don't have labels tying them back to the FB pins on the switcher chips. That probably means they are not routed. Contacted VonSzarvas about this, just now. He might have gone to bed, already.
  • W9GFOW9GFO Posts: 4,010
    ...
    Publison wrote: »
    OK.... who is going to be the first for 3D print or laser cut enclosure?
    I don't know if I will be first but I do want to design a laser cut enclosure for it.

    I assume the design software can output a 3d model of that board, can we get that 3d model?
  • cgraceycgracey Posts: 14,133
    W9GFO wrote: »
    ...
    Publison wrote: »
    OK.... who is going to be the first for 3D print or laser cut enclosure?
    I don't know if I will be first but I do want to design a laser cut enclosure for it.

    I assume the design software can output a 3d model of that board, can we get that 3d model?

    I'll ask him. Okay, I just asked him about that.
  • Cluso99Cluso99 Posts: 18,066
    edited 2018-11-07 22:16
    Why such low value R's on the LEDS?
    These days I use 5K (4K99) as a minimum.

    Looks good to me.
  • jmgjmg Posts: 15,140
    cgracey wrote: »
    Here it is. Do you guys see any problems?
    That PDF is not searchable ?

    Comments:
    * That's a lot of 4.7uF caps you have allocated ?
    * 5V on the headers, and no 3v3, seems strange and an accident waiting to happen ?
    * R304 is labeled 27R, but 220/240 R has been discussed / tested by Peter ?
    * P2_RESN travels a long way, and seems to have no decoupling ? (but does have 100nF to FTDI out ?)
  • Cluso99Cluso99 Posts: 18,066
    Didn't see the usual P1 transistor reset circuit. Did I miss it?
  • cgraceycgracey Posts: 14,133
    cgracey wrote: »
    W9GFO wrote: »
    ...
    Publison wrote: »
    OK.... who is going to be the first for 3D print or laser cut enclosure?
    I don't know if I will be first but I do want to design a laser cut enclosure for it.

    I assume the design software can output a 3d model of that board, can we get that 3d model?

    I'll ask him. Okay, I just asked him about that.

    He said he'll get to this next week.
  • cgraceycgracey Posts: 14,133
    Cluso99 wrote: »
    Why such low value R's on the LEDS?
    These days I use 5K (4K99) as a minimum.

    Looks good to me.

    Yes, those resistors need to go higher. We don't want to be blinded.
  • cgraceycgracey Posts: 14,133
    Cluso99 wrote: »
    Didn't see the usual P1 transistor reset circuit. Did I miss it?

    A negative transition on the USB chip's DTR output capacitively couples to RESn.
  • cgraceycgracey Posts: 14,133
    jmg wrote: »
    cgracey wrote: »
    Here it is. Do you guys see any problems?
    That PDF is not searchable ?

    Comments:
    * That's a lot of 4.7uF caps you have allocated ?
    * 5V on the headers, and no 3v3, seems strange and an accident waiting to happen ?
    * R304 is labeled 27R, but 220/240 R has been discussed / tested by Peter ?
    * P2_RESN travels a long way, and seems to have no decoupling ? (but does have 100nF to FTDI out ?)

    * Apparently, those 0402-size 4.7uF caps are pretty low-ESR and quite inexpensive.

    * The headers have 5V to power some special circuits,if need be, as well as those pins' VIO.

    * We will change R304 to 220 ohms.

    * The FTDI chip drops DTR to reset the P2 chip.


    What do you think?
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