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Meaning of Vss and Vdd and Vcc — Parallax Forums

Meaning of Vss and Vdd and Vcc

LawrencLLawrencL Posts: 49
edited 2005-02-25 01:10 in BASIC Stamp
Can any one tell me what the ss, dd and cc actually refer to?

I've been told that ss means substrate refering to a physical level with in the chip.

Thanks,

Lawrence

Comments

  • Chris SavageChris Savage Parallax Engineering Posts: 14,406
    edited 2005-02-25 00:05
    Beau Scwabe said...
    I believe it refers to the technology or process used...
    A CMOS transistor has a Source and Drain connection thus Vss corresponds to the Source and Vdd corresponds to the Drain.
    A Bipolar transistor has a Collector and an Emitter thus Vcc corresponds to the Collector and Vee corresponds to the Emitter.
    I am not exactly sure why there is a double stamp representation unless it represents a hierarchical nomenclature.
    This is actually from another thread...I found it via the search function <hint, hint>· wink.gif

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    --==<{Chris}>==--
  • Tracy AllenTracy Allen Posts: 6,656
    edited 2005-02-25 01:10
    The abbreviations refer to the configuration for n-channel fets and npn transistors.

    positive Vdd ----/\/\---Vd----|n-fet|----Vs
    /\/\--- Vss most negative

    There is a resistor in the drain circuit (where the output is usually taken in the common source circuit), and there is a resistor in the source circuit (which stabilizes the bias or provides a common source unity gain output).

    Vdd = voltage supplied to the "top" of the nfet drain resistor
    Vd = voltage at the n-fet drain terminal
    Vg = voltage at the n-fet gate terminal
    Vs = voltage at the n-fet source terminal
    Vss = voltage at the "bottom" of the n-fet source resistor.

    Same thing for NPN bipolar transistor
    Vcc = voltage supplied to the "top" of the npn collector resistor
    Vc = voltage at the npn collector terminal
    Vb = voltage at the npn base terminal
    Ve = voltage at the npn emitter terminal
    Vee = voltage at the "bottom" of the npn emitter resistor.

    The fun comes when you add p-fets or pnp bipolars to the mix. The most positive volage is still called Vdd, or Vcc, even though it is connected to the source (emitter) terminal of the p-fet (pnp). In CMOS circuits (like the Stamp), there are both types of transistors in a totem pole arrangement. The p-fet serves as the drain resistor for the n-fet, and vice versa. The output comes from the junction in the middle where the p-fet drain meets the n-fet drain, and that is usually called Vout. The most positive voltage is still called Vdd and the most negative Vss.

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    Tracy Allen
    www.emesystems.com
  • So what must you do to the Vcc Pin on the BS2 to supply power?
  • Actually, the BS2 doesn't have a Vcc pin. Here is a pointer to the BS2 reference manual.

    You can power the BS2 from the Vin pin (5.5-12 volts) in which case it can supply 5.0v on Vdd, or
    you can power the BS2 from the Vdd pin with 5 volts nominal.

    Have a look at page 15.

  • Lawrence

    VDD is 5 volts regulated.

    VCC is whatever is coming in on your power supply.Unregulated.

    VSS is ground or 0 volts.

    I assume your are talking about pin headers on a Stamp board or something like it.
  • The actual terms derive from what they connect to inside an integrated circuit. In a bipolor inverter, say, Vcc powers the transistor's collector (through a resistor). The less-frequequently-used Vee connects to its emitter.

    In an NMOS inverter, Vdd powers the transistor's drain (through a resistor); Vss, its source, viz:

    inverters.gif

    In CMOS ICs, the Vdd designator is somewhat a misnomer, since it powers the sources of the complementary PMOS transistors. But the nomenclature has stuck. Besides, whadya gonna do? Have two Vss's?

    -Phil
    393 x 260 - 2K
  • Heater.Heater. Posts: 21,230
    I don't recall ever seeing Vee on a datasheet. It's a thing though.

    Next question then is: why the duplicated subscripts cc, ee, dd, ss ?

    I found the answer to that in a wonderfully detailed reply to a question here:
    https://electronics.stackexchange.com/questions/17382/what-is-the-difference-between-v-cc-v-dd-v-ee-v-ss

    It's all laid down in as standard from the IEEE in 1963: "Letter Symbols for Semiconductor Devices" (IEEE Std 255-1963).

    Specifically section 1.3.2

    Supply voltage may be indicated by repeating the
    terminal subscript. The reference terminal may then be
    designated by the third subscript.

    Examples : VEE, VCC, VBB, VEEB, VCCB. VBBC, VKK


    Obviously we should have that standard to hand all the time:
    http://www.rom.by/files/ieee_std_255-1963.pdf



  • Heater.Heater. Posts: 21,230
    Ah, wait, I think I have seen Vee used. Sometimes circuits will have a negative supply (wrt ground), Vee.
  • Vee is often used when it's negative w.r.t. a different ground reference.

    -Phil
  • Thanks all.
    VDD is 5 volts regulated.

    VCC is whatever is coming in on your power supply.Unregulated.

    VSS is ground or 0 volts.
    So, I would connect Vcc to Vin? Correct?

  • Or Vdd if I am powering the Stamp through that pin?
  • My BOE Rev D calls Vdd, Vcc next to the Stamp plugin.
    1280 x 720 - 247K
  • My Problem is solved! I connected Vcc/Vdd to 5v, Vin to 6v, and Vss to Gnd.
  • Are you supplying 5v to Vdd or using Vdd to supply 5v to other circuitry?
  • I applied 5v to Vdd/Vcc on the stamp. that supply also ran all of my other 5v stuff.
  • AwesomeCronk,

    Page 14 of the BASIC Stamp manual says that Pin 21 of the BS2 module is Vdd.

    The Vdd header pins connect to the BS2 module but are powered from the voltage regulator on the BOE.
    The Stamp regulator is designed to power the Stamp so it can't power much more.
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