Meaning of Vss and Vdd and Vcc
LawrencL
Posts: 49
Can any one tell me what the ss, dd and cc actually refer to?
I've been told that ss means substrate refering to a physical level with in the chip.
Thanks,
Lawrence
I've been told that ss means substrate refering to a physical level with in the chip.
Thanks,
Lawrence
Comments
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--==<{Chris}>==--
positive Vdd ----/\/\---Vd----|n-fet|----Vs
/\/\--- Vss most negative
There is a resistor in the drain circuit (where the output is usually taken in the common source circuit), and there is a resistor in the source circuit (which stabilizes the bias or provides a common source unity gain output).
Vdd = voltage supplied to the "top" of the nfet drain resistor
Vd = voltage at the n-fet drain terminal
Vg = voltage at the n-fet gate terminal
Vs = voltage at the n-fet source terminal
Vss = voltage at the "bottom" of the n-fet source resistor.
Same thing for NPN bipolar transistor
Vcc = voltage supplied to the "top" of the npn collector resistor
Vc = voltage at the npn collector terminal
Vb = voltage at the npn base terminal
Ve = voltage at the npn emitter terminal
Vee = voltage at the "bottom" of the npn emitter resistor.
The fun comes when you add p-fets or pnp bipolars to the mix. The most positive volage is still called Vdd, or Vcc, even though it is connected to the source (emitter) terminal of the p-fet (pnp). In CMOS circuits (like the Stamp), there are both types of transistors in a totem pole arrangement. The p-fet serves as the drain resistor for the n-fet, and vice versa. The output comes from the junction in the middle where the p-fet drain meets the n-fet drain, and that is usually called Vout. The most positive voltage is still called Vdd and the most negative Vss.
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Tracy Allen
www.emesystems.com
You can power the BS2 from the Vin pin (5.5-12 volts) in which case it can supply 5.0v on Vdd, or
you can power the BS2 from the Vdd pin with 5 volts nominal.
Have a look at page 15.
Lawrence
VDD is 5 volts regulated.
VCC is whatever is coming in on your power supply.Unregulated.
VSS is ground or 0 volts.
I assume your are talking about pin headers on a Stamp board or something like it.
In an NMOS inverter, Vdd powers the transistor's drain (through a resistor); Vss, its source, viz:
In CMOS ICs, the Vdd designator is somewhat a misnomer, since it powers the sources of the complementary PMOS transistors. But the nomenclature has stuck. Besides, whadya gonna do? Have two Vss's?
-Phil
Next question then is: why the duplicated subscripts cc, ee, dd, ss ?
I found the answer to that in a wonderfully detailed reply to a question here:
https://electronics.stackexchange.com/questions/17382/what-is-the-difference-between-v-cc-v-dd-v-ee-v-ss
It's all laid down in as standard from the IEEE in 1963: "Letter Symbols for Semiconductor Devices" (IEEE Std 255-1963).
Specifically section 1.3.2
Supply voltage may be indicated by repeating the
terminal subscript. The reference terminal may then be
designated by the third subscript.
Examples : VEE, VCC, VBB, VEEB, VCCB. VBBC, VKK
Obviously we should have that standard to hand all the time:
http://www.rom.by/files/ieee_std_255-1963.pdf
-Phil
Page 14 of the BASIC Stamp manual says that Pin 21 of the BS2 module is Vdd.
The Vdd header pins connect to the BS2 module but are powered from the voltage regulator on the BOE.
The Stamp regulator is designed to power the Stamp so it can't power much more.