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Propeller II update - BLOG - Page 71 — Parallax Forums

Propeller II update - BLOG

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  • User NameUser Name Posts: 1,451
    edited 2013-08-20 06:49
    mindrobots wrote: »
    Chip said some really neat things about the Propeller 2 and the status of Spin2 on the Skype call that Jeff had at the Propeller Powered Expo! It was all very exciting and encouraging! :thumb:

    Can one, at the very least, assume that the chips passed the etest mentioned by Beau?
  • mindrobotsmindrobots Posts: 6,506
    edited 2013-08-20 08:42
    I'm not an official spokes model, and the Skype wasn't the greatest at times and my memory has seen better days (anyone that remembers better from Saturday's Skype or is an official spokes person, please correct me) but:

    I believe at least 1 wafer is heading off to be packaged - so they at least passed enough testing to warrant being packaged up for chip level testing.
    (I'm not sure of the yield numbers - 500 chips per wafer? either 10 wafers this run or 10 wafers total with this mask set before they make a "production" mask set) - the number of 500 to 5000 packaged chips was thrown around.

    They need to be packaged up and tested at the chip level (electronically, they would be good but all the functionality needs to be tested then). The tester itself is inexpensive - Chip said a P1 with a handful of parts but the ZIF socket is a few hundred $$'s. There was talk at this point about just putting the chips on carrier boards and several possible test scenarios were discussed to get things out to the community as soon as possible.

    Chip talked a bit about Spin2 - the compiler is nearing completion. It should be using the full HUB memory space and has a bunch of exciting features. Chip envisions it should be possible to load PASM code into a COG to support video, keyboard and mouse AND the SPIN interpreter effectively giving you a single COG SPIN application with KVM support! The interpreter also makes use of the CLUT for stack space and since it isn't stacked in HUB any more it is MUCH faster.

    The new counters sound simply amazing. Chip has started documenting them several times and either gets taken away for other things or gets to a point where he's not sure how to explain all the features! He said documentation should be coming once he buttons up Spin2 and the testing program starts.

    It sounds like the development board (Prop, crystal, 1.8/3.3v regulators and probably memory is first planned using the PCI connector to bring out I/O pins, power, reset and RX/TX.

    It sounds like the next several years will be busy exploiting all the P2's features and abusing it to perform the impossible tasks we've all been saving!

    If anyone remembers more or different, please add what you got from the Skype presentation. I didn't think of recording it but maybe someone did.
  • LoopyBytelooseLoopyByteloose Posts: 12,537
    edited 2013-08-20 11:01
    By the time they hit the streets I will be away in Europe for a month, oh, the agony... oh, the pain....
    Maybe I will just get my pcbs manufactured and order the P2s when I'm away so that I can get straight into it when I get back.
    This is so exciting.

    Arrgh.. I was hoping to try the P2 out with Tachyon Forth straightaway.
  • Cluso99Cluso99 Posts: 18,066
    edited 2013-08-20 15:07
    Chip:

    Could you just post what you have on the counters on a new thread??
    Then we can pull it apart, etc. Ask questions and so on. Just don't read this thread until you have time to read & answer (we know you are busy with testing P2 and Spin2).
    At least this way we can get started with trying out new things.

    Are limited numbers of the P2 pcbs likely to be available quickly?
    If so, time to order some connectors and a small breakout pcb (connector to 4 rows 0.1"x0.1" pads)
  • dr hydradr hydra Posts: 212
    edited 2013-08-20 15:36
    Hopefully...a large number of p2 pcbs will be available soon...I have been looking forward to the p2 for years
  • RaymanRayman Posts: 13,767
    edited 2013-08-22 03:33
    A little quiet here... Hopefully, that's a good sign...
  • BaggersBaggers Posts: 3,019
    edited 2013-08-22 04:37
    I agree with Rayman, it's gotta be good news right? as, if it was a fail, I'm sure they'd have said already! so testing will still be ongoing, but in a good way :D
    That's my guess anyway!

    Be patient guys it'll be ready when it's ready! there's a LOT in this chip to test, software and hardware!
  • rjo__rjo__ Posts: 2,114
    edited 2013-08-22 05:55
    Just got my head above water after returning from the Prop Expo in the Amish country of Central Ohio. I took route 30 home. In Indiana, why are the mile markers all related to each county and not the distance to or from the State line?

    On the Skype call, Chip recalled that on the first pass at the Prop1, there was a problem with the bit ordering of ROM memory, which sounds like a pretty simple thing to debug... but was a major pain, which depended upon
    serendipity and intuition to find. Chip also said that he wouldn't be surprised if the first pass at the Prop2 had some problem at some level... since it is a fairly complicated piece of work... he was rubbing his head as he said it:)

    The conversation then turned into a fun call as Chip considered the "what ifs" of success... yield testing etc.

    There is now enough info to proceed at almost every level of development. SPIN2 is just around the corne, and it sounds really neat: will be a lot faster and sounds like it will directly support large memory models.
    There will be enough memory left in Cog1 to run inline assembly... woohoo!!!

    If SPIN2 is released before the Prop2 chip, I am guessing Terasic will see a sudden surge of sales.

    Chip also said that the Prop2 should directly support digitizing NTSC signals... but then wondered if the world had moved beyond NTSC. Not my world, I have a bundle of $5 cameras sitting on my shelf! Chip had some interesting things to say about signal processing, including a brief description of external charge balancing, which will allow one to pick out a particular signal from a swamp of noise.

    Every time Chip talks... the Prop2 seems more and more amazing.


    Rich
  • evanhevanh Posts: 15,091
    edited 2013-08-22 06:46
    rjo__ wrote: »
    Chip had some interesting things to say about signal processing, including a brief description of external charge balancing, which will allow one to pick out a particular signal from a swamp of noise.

    That'll become important due to one of the problems with reading non-isolated sensitive signals is major amounts of common mode injection. Eg: Thermocouples are a right pain without electrical isolation.

    Another one is unwanted RF noise, I had this happen badly with a hall-effect current probe ...
  • rjo__rjo__ Posts: 2,114
    edited 2013-08-22 08:11
    I have almost no background... except what I have learned studying the Prop1, which was a perfect place for me to start.
    I wish I had kept a list of all of the core concepts I have bumped into along the way... my mantra should be: gees, I didn't know that:)
  • jazzedjazzed Posts: 11,803
    edited 2013-08-22 11:02
    Rayman wrote: »
    A little quiet here... Hopefully, that's a good sign...
    If I recall correctly from another post, the chips must be packaged before they are ready for mounting on a PCB.
  • Jeff MartinJeff Martin Posts: 751
    edited 2013-08-22 12:37
    The first five Propeller 2 wafers just arrived!

    They are tightly sealed in a semi-translucent box and then vacuum-sealed on top of that. See the picture of Daniel carefully holding them up. Don't they look amazing!?

    We sure wish we could open them, but we have to wait. :innocent: This is like being a kid waiting for Christmas to come.

    Now they are being sent to our packager, then the packaged chips will be returned to us for the first tests.

    First Propeller 2 Wafers 2013-08-22.jpg
  • GadgetmanGadgetman Posts: 2,436
    edited 2013-08-22 13:00
    Christmas?
    You mean that overly commercial homage to an old Coca Cola advert?

    This is bigger... And better... And we all already know what we're getting; lots of 32bit awesomeness.
    The surprise will be figuring out just exactly what it can do...
  • David BetzDavid Betz Posts: 14,511
    edited 2013-08-22 13:00
    The first five Propeller 2 wafers just arrived!

    They are tightly sealed in a semi-translucent box and then vacuum-sealed on top of that. See the picture of Daniel carefully holding them up. Don't they look amazing!?

    We sure wish we could open them, but we have to wait. :innocent: This is like being a kid waiting for Christmas to come.

    Now they are being sent to our packager, then the packaged chips will be returned to us for the first tests.

    First Propeller 2 Wafers 2013-08-22.jpg
    Very cool! Congratulations!
  • Heater.Heater. Posts: 21,230
    edited 2013-08-22 13:19
    Christmas?

    No, "Chipmas!"

    P.S. I never figured out how Coca Cola and Turkey fit together.
  • SRLMSRLM Posts: 5,045
    edited 2013-08-22 13:20
    The first five Propeller 2 wafers just arrived!

    How many chips to the wafer?
  • Daniel HarrisDaniel Harris Posts: 207
    edited 2013-08-22 13:34
    Heater. wrote: »
    P.S. I never figured out how Coca Cola and Turkey fit together.

    Coca Cola melts turkey (and teeth) :P
  • Cluso99Cluso99 Posts: 18,066
    edited 2013-08-22 13:38
    No - this suspense is worse than Christmas! We have to wait for the "other kids" (ie Chip & co) to open their presents and tell us how they work before we can participate ;)

    Thanks for the update Daniel.
  • Jeff MartinJeff Martin Posts: 751
    edited 2013-08-22 14:46
    SRLM wrote: »
    How many chips to the wafer?

    I don't know if we have the details on that, but I'm calculating around 350. The amount of usable die from any wafer is less than the amount of visually complete die because of process variations. In practice, the most reliable parts are usually near the center of the wafer.

    We are having 40 die packaged from this set; I think from one wafer. The rest can be packaged later if we deem them valuable enough to do so.

    By comparison, there are about 524 visibly complete die on the Propeller 1 wafers, with around 400 of them passing our tests for use.
  • Oldbitcollector (Jeff)Oldbitcollector (Jeff) Posts: 8,091
    edited 2013-08-22 16:18
    Woot!!! Real Prop 2 chips! Break out the salsa! Oh yeah!

    Congrats! Perhaps a milestone has been reached? :)

    Jeff
  • Cluso99Cluso99 Posts: 18,066
    edited 2013-08-22 16:35
    Thanks for the info Jeff.

    Just wondering...
    For the P1 wafers, do you know statistically where the good ~400 come from (ie their position on the wafers)?
    Do you package all the ~524 before you can test for the ~400 good ones?
  • RaymanRayman Posts: 13,767
    edited 2013-08-22 18:16
    looks like 12cm wafers...
  • rjo__rjo__ Posts: 2,114
    edited 2013-08-22 19:03
    I won't be surprised if there are 40 perfect chips in the first batch:)
  • cgraceycgracey Posts: 14,131
    edited 2013-08-22 21:23
    We are thinking that we should have packaged chips by the beginning of September. Either there will be 75% good chips, or 0% good chips. A single design error can render all chips useless. If there is any design error, let's hope it's one that doesn't leave the chip unable to be programmed.
  • jmgjmg Posts: 15,140
    edited 2013-08-22 22:30
    cgracey wrote: »
    We are thinking that we should have packaged chips by the beginning of September. Either there will be 75% good chips, or 0% good chips. A single design error can render all chips useless. If there is any design error, let's hope it's one that doesn't leave the chip unable to be programmed.

    Were you able to get any useful info from the first batch, by careful probing, and even cutting, or brute force supply ...?
  • cgraceycgracey Posts: 14,131
    edited 2013-08-22 22:41
    jmg wrote: »
    Were you able to get any useful info from the first batch, by careful probing, and even cutting, or brute force supply ...?

    Not much. We confirmed that the 1.8V core was a giant shorting block and that the 3.3V ports could be powered up with minimal quiescent current.
  • SapiehaSapieha Posts: 2,964
    edited 2013-08-22 23:50
    Hi Chip.

    My feeling are that You test them in September -- So I can test that one in Oktober.

    Good look

    cgracey wrote: »
    We are thinking that we should have packaged chips by the beginning of September. Either there will be 75% good chips, or 0% good chips. A single design error can render all chips useless. If there is any design error, let's hope it's one that doesn't leave the chip unable to be programmed.
  • Cluso99Cluso99 Posts: 18,066
    edited 2013-08-22 23:55
    Chip:

    Fingers crossed that they are a complete success. But if not, then at least usable to do some significant testing. So I guess its Septmas.

    BTW Please don't throw out the first batch. If you intend to discard them, I would love one to hang on the shelf :)
  • GadgetmanGadgetman Posts: 2,436
    edited 2013-08-23 03:11
    Cast each of the chips from batch 1 in clear plastic and hand them out as rewards whenever someone does something not even Chip himself could envision...
  • Cluso99Cluso99 Posts: 18,066
    edited 2013-08-23 04:07
    Actually a dice (correct?) encased in clear resin would be fantastic, but I don't know if there were spare die.
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