tab1_ org $ '';direct commands Byte"list"' Any place in assembly codeWord list ''shr 8 + 128,list and 255 ' Any place in assembly codeByte"run"Word run ''shr 8 + 128,run and 255 '<----------------- Original in 8080 assembly BYTE,BYTE
010111 ZCR 0 CCCC DDDDDDDDD SSSSSSSSS JMPRETD D,S ''jump to S, store return in D 1000111 ZCR 0 CCCC DDDDDDDDD SSSSSSSSS JMPRET D,S ''jump to S, store return in D 4 *
000111 ZCR 1 CCCC DDDDDDDDD nnnnnnnnn JMPRET D,#n ''jump to 0..511, store return in D 4 *
111010000 I CCCC DDDDDDDDD SSSSSSSSS | CFGPINS | D/#n | Setup pins masked by register “D (0-511)” to register
111010 ZCR I CCCC DDDDDDDDD SSSSSSSSS | INCMOD | D,S#n | Increment D between 0 and S. Wraps around to 0 when above S
Yes. The interpreter uses the top half (actually, less) of cog RAM, as well as the top part of the stack RAM, PTRB, INDB, and SPB. This leaves free for PASM code (which could be multitasking): the first half+ of cog RAM, the first part of stack RAM, PTRA, INDA, and SPA.
Yes. The interpreter uses the top half (actually, less) of cog RAM, as well as the top part of the stack RAM, PTRB, INDB, and SPB. This leaves free for PASM code (which could be multitasking): the first half+ of cog RAM, the first part of stack RAM, PTRA, INDA, and SPA.
Comments
Andy
How I can in PNut write that table.
tab1_ org $ '';direct commands Byte "list" ' Any place in assembly code Word list ''shr 8 + 128,list and 255 ' Any place in assembly code Byte "run" Word run ''shr 8 + 128,run and 255 '<----------------- Original in 8080 assembly BYTE,BYTE
Forget it.
I found my problem --- If I use WORD's it adds 0 to fill LONG's --- That disturbed my scan routine.
Now That are fix
That function for me.
tab1_ org $ '';direct commands Byte "list" byte $80+list>>8,list ''shr 8 + 128,list and 255 Byte "run" byte $80+run>>8,run ''shr 8 + 128,run and 255
Are $1F6,$1F7 (INDA, INDB] direct addressable else can this position can be used for other usage ?
And INDA, INDB can only be addressed by SETINDA,SETINDB
What are difference between this 2 RET instructions
And Can You give syntax examples on one that are different from Propeller 1
''000111 ZC0 1 CCCC 000000000 000000000 | RET | | ''Return from subroutine 4 * ''111010 001 1 1111 000000000 000000000 | RET | | ''Like JMP, but assembler handles details
There is opcode 111010 which is JMPRETD, a delayed JMPRET.
Thanks.
I have.
I see I need test them by PNut.
010111 ZCR 0 CCCC DDDDDDDDD SSSSSSSSS JMPRETD D,S ''jump to S, store return in D 1 000111 ZCR 0 CCCC DDDDDDDDD SSSSSSSSS JMPRET D,S ''jump to S, store return in D 4 * 000111 ZCR 1 CCCC DDDDDDDDD nnnnnnnnn JMPRET D,#n ''jump to 0..511, store return in D 4 * 111010 000 I CCCC DDDDDDDDD SSSSSSSSS | CFGPINS | D/#n | Setup pins masked by register “D (0-511)” to register 111010 ZCR I CCCC DDDDDDDDD SSSSSSSSS | INCMOD | D,S#n | Increment D between 0 and S. Wraps around to 0 when above S
Have You any updates on Instructions, counters block diagrams and other things we can have play with ?
Not yet.
I'm getting close to having the new Spin interpreter running. This is taking all my work time, for now.
see: http://forums.parallax.com/showthread.php/141706-Propeller-II?p=1122712#post1122712
Thanks,
Eldonb46
Thanks for reply.
Good look with SPIN
I think all of us are looking forward to Spin for Prop2 :-) so it is really nice to hear it is close!
Yes. The interpreter uses the top half (actually, less) of cog RAM, as well as the top part of the stack RAM, PTRB, INDB, and SPB. This leaves free for PASM code (which could be multitasking): the first half+ of cog RAM, the first part of stack RAM, PTRA, INDA, and SPA.
Look's as nice solution