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High Frequency Distortion? — Parallax Forums

High Frequency Distortion?

pjvpjv Posts: 1,903
edited 2006-05-03 21:08 in Propeller 1
Hello Chip;

I've been trying all day to find a work-around for what I believe is a problem with the Propeller counters; and so far the solution has eluded me. Perhaps I'm mis-understanding.......

What I am interested in doing is generating a high frequency·FM signal which for test purposes is in the 88 to 108 MHz band. I sort of managed to do that, using a counter·at 6 MHz in the PLL x 16 mode, and modulating·the value of the freq register,·but found that the spectrum was covered with "birdies". Now I know that some of that comes from intermodulation distortion in the receiver, as well as the somewhat squareness and impurity of the source waveform.

I decided to delete the modulation, to get a "pure" carrier, but in doing a FFT sweep, noted that the fundamental and odd harmonics were anything but pure.

That got me to thinking and poking, and discovered (in retrospect it should not have been a surprise) that the fundamental output from the NCO (PLL disabled) is not neccessarily a square wave. Hence a source of many of the "birdies". Originally I had some expectation that we might be able to use the propeller as a legal FCC approvable low power UHF transmitter, but I'm seriously having doubts.

I suspect that in the PLL mode, the NCO's jittery output is somehow averaged in the loop filter, and the results get improved, but by my reconing, for·any·frequencies over 2.5 MHz,·a mile off from an "approvable" situation. This is too bad.

Am I doing something wrong, or mis-understanding·in stating that in NCO mode (with or without PLL) the only times a square wave is generated is when $1_00_00_00_00 is evenly divisible by a binary number?

If that is the case, and there are no work-arounds for high speeds (at least as far as I have been able to determine), then I believe you urgently need to add to the next rev of silicon a·(fast)·NCO/PLL·counter mode that continuously: loads the FRQ register, counts down to zero, toggles·differential output bits, and reloads the counter with FRQ. All of course in a "set and forget" manner. This would give a true NCO output without distortion.

On the other hand, if I am doing something incorrectly, or have missed some·other way of dealing with this issue, then please enlighten me.

I truly do like this chip, but this one's got me baffled.....

Cheers,

Peter (pjv)





Post Edited (pjv) : 4/23/2006 6:17:09 AM GMT
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Comments

  • cgraceycgracey Posts: 14,133
    edited 2006-04-23 07:35
    Peter, you are doing things right.

    The problem is the nature of the NCO. It·is adding FRQ into PHS every COG clock and using the MSB of PHS as the the PLL's reference input. You are right that the only time you'll get a perfect square wave out of this system·is when FRQ can divide $1_0000_0000 to produce an integer. The PLL can clean up some NCO jitter, but sometimes this jitter manifests itself as sporadic phase advances which cause the PLL·to briefly speed·up·and then slow back down to re-lock. I don't think much can be done about this, unless there is some trick you can do in software to maybe modulate FRQ in·a way where the birdies are being spread out like mad at the expense of concentrated in-band energy. Maybe you could add a lot of white phase noise using an LFSR (takes only 2 instructions to step) to achieve this.

    The NCO/PLL system is dirt simple, and I guess I've imagined tolerating whatever shortcomings it might have. I would like to find·a way to improve it, though, since you're finding these limitations. I would like to try to keep·things binary at the I/O pins, though. Next generation is another story. Could you please explain more about making a narrow-band synthesizer digitally? I did not understand the last things you wrote, but I want to, because if this can be done, we will do it.



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    Chip Gracey
    Parallax, Inc.

    Post Edited (Chip Gracey) : 4/23/2006 8:46:31 AM GMT
  • cgraceycgracey Posts: 14,133
    edited 2006-04-23 08:43
    Peter,

    Before going to bed, I thought I'd try taking digitized microphone data on the new Propeller demo board and FM it at ~104MHz (rather quiet here) to see if I could receive it with·my little FM radio. It worked pretty well. With a little tweaking of the numbers, the distortion was pretty minimal.·Sometimes, I could actually hear little birdies in the background. Another thing I noticed was that I could pick it up·at many points on·the FM dial! This goes to show just how powerful those CTR's are, wouldn't you say? lol.gif

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    Chip Gracey
    Parallax, Inc.
  • Beau SchwabeBeau Schwabe Posts: 6,547
    edited 2006-04-23 13:07
    Peter,

    If I'm understanding you correctly.... A series LC tank tuned at the appropriate frequency will improve your situation greatly.
    Rather than using just the I/O pin, adding an LC tank, you can see almost x10 increase in transmission distance, as well as
    a nice sine wave on the output (antenna).

                   ANT
                    |
                    |
    I/O >----CAP----o----Coil----< GND
    
    



    For a fixed coil valie of .2uH, a capacitor range from 10 to 20pF will provide a tunable range from 79MHz to 112MHz

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    Beau Schwabe

    IC Layout Engineer
    Parallax, Inc.

    Post Edited (Beau Schwabe (Parallax)) : 4/23/2006 2:56:21 PM GMT
  • pjvpjv Posts: 1,903
    edited 2006-04-23 15:47
    Hi All;

    Thanks for the rapid responses.

    As I said, at first I thought "what am I doing wrong", and then it dawned on me.... "its the way the NCO works"; the PHSE register overflow is to blame. So let's find a way around that. And that can be done in software, but only at frequencies up to 2.5 MHz, and, so far at least, not at the frequencies I need to operate at (I'm looking to pick-off a 7th harmonic for 915 MHz). And besides, I want the carrier frequency generation to be a "set and forget" operation with no continual software intervention. The modulation of course will be software dependent, but much slower. Although with the other counter, one might even be able to make simple modulation also "set and forget".

    So now that apparently I'm understanding things correctly, I believe the answer lies in a new rev of silicon. So to describe it better Chip, the counters need another operating mode, possibly as follows:

    1. Copy the FRQ register into the PHAS register;
    2. Down-count the PHAS register by one per system clock to zero, at which point;
    3. The ouput differential pair are both toggled, and;
    4. Jump back to 1.

    Alternately, the sequence could start from zero, and count up until the PHAS matched the FREQ, then toggle the output bits, clear the PHAS counter, and start all over again. All set and forget.

    What is imperative is that the NCO's output be a pure square wave, and hence the toggle action to take care of that. I realize the "frequency" output of this scheme is half the FREQ period.

    Chip the "strong CTR" feature you mention is precisely its downfall for such an application as this. To pass FCC, you need to have the signal VERY clean, and thats not so easy, so you would rather start off on the best (cleanest) foot possible.

    Beau, you are absolutely right, and that is exactly what is required; a tuned filter. My expectation was to use a 915-ish MHz tank to pick off the 7th harmonic off a 130-ish MHz square wave.

    Jut some ramblings......

    Cheers,

    Peter (pjv)


    Beau
  • Beau SchwabeBeau Schwabe Posts: 6,547
    edited 2006-04-23 18:17
    Peter,

    That's a little bit out of my frequency range... What would you use for something like that? ...a 1pF capacitor and a 30nH inductor? What about temperature compensation?

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    Beau Schwabe

    IC Layout Engineer
    Parallax, Inc.
  • Tracy AllenTracy Allen Posts: 6,656
    edited 2006-04-23 19:06
    The reason for the jitter and the birdies in the PHS mode can be understood in the time domain. The number of cycles spent HIGH and the number of cycles LOW varies from cycle to cycle for all frequencies except those that are the clock frequency divided by a power of two. For example, with frqa:=CLKFREQ/2, the output is a square wave at a frequency 1/2 the master clock, and the HIGH time = LOW time.
    010101010101010101010101.....
    If the frqa:=CLKFREQ/2-1, which is the next lower available frequency, the sequence makes up the difference by inserting an exta 0 and an extra 1 at long intervals:
    001010101010101........1101010101010101
    That adds a weak subharmonic at 2/CLKFREQ. The whole cycle consists of CLKFREQ/2-2 cycels of 01 and one cycle of 001 and one cycle of 011. The 001 cycle occurs in this sequence: phsa=0,frqa,frqa*2,... And the 011 cycle occurs in this sequence: psha=1,frqa+1,2*frqa+1,...

    The number and strength of the subharmonics depends on the ratio n/m in CLKFREQ*n/m. There will be fewer subharmonics for simple ratios (small denominator, m), and for a given size denominator, there are more subharmonics when the continued fraction expansion of n/m has many small convergents. I.e., the highest subharmonic content occurs when the ratio is a convergent of the golden mean, (SQR(5)+1)/2, a Fibonacci number. The sequence of 0s and 1s is sometimes referred to as a Fibonacci Rabbit Sequence, a Fractal of sorts. I know about this because I wrote a couple of papers on it having to do with coupled oscillators. Here is a reference page that even has quick time movies and a listening post:
    www.mcs.surrey.ac.uk/Personal/R.Knott/Fibonacci/fibrab.html

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    Tracy Allen
    www.emesystems.com
  • cgraceycgracey Posts: 14,133
    edited 2006-04-23 19:58
    Peter,

    Okay, I understand what you're proposing: an auto-reloading down-counter that toggles the output(s) every reload. This system, while always producing a square wave, would have very good low-frequency resolution with big counts, but very poor high-frequency resolution with necessarily small counts. Do you see what I mean? I wonder if some sort of hybrid system could be devised that would smooth over the downsides of each technique, but offer both of the strengths. Maybe were on the cusp of some simple solution.
    pjv said...
    Hi All;

    Thanks for the rapid responses.

    As I said, at first I thought "what am I doing wrong", and then it dawned on me.... "its the way the NCO works"; the PHSE register overflow is to blame. So let's find a way around that. And that can be done in software, but only at frequencies up to 2.5 MHz, and, so far at least, not at the frequencies I need to operate at (I'm looking to pick-off a 7th harmonic for 915 MHz). And besides, I want the carrier frequency generation to be a "set and forget" operation with no continual software intervention. The modulation of course will be software dependent, but much slower. Although with the other counter, one might even be able to make simple modulation also "set and forget".

    So now that apparently I'm understanding things correctly, I believe the answer lies in a new rev of silicon. So to describe it better Chip, the counters need another operating mode, possibly as follows:

    1. Copy the FRQ register into the PHAS register;
    2. Down-count the PHAS register by one per system clock to zero, at which point;
    3. The ouput differential pair are both toggled, and;
    4. Jump back to 1.

    Alternately, the sequence could start from zero, and count up until the PHAS matched the FREQ, then toggle the output bits, clear the PHAS counter, and start all over again. All set and forget.

    What is imperative is that the NCO's output be a pure square wave, and hence the toggle action to take care of that. I realize the "frequency" output of this scheme is half the FREQ period.

    Chip the "strong CTR" feature you mention is precisely its downfall for such an application as this. To pass FCC, you need to have the signal VERY clean, and thats not so easy, so you would rather start off on the best (cleanest) foot possible.

    Beau, you are absolutely right, and that is exactly what is required; a tuned filter. My expectation was to use a 915-ish MHz tank to pick off the 7th harmonic off a 130-ish MHz square wave.

    Jut some ramblings......

    Cheers,

    Peter (pjv)


    Beau
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    Chip Gracey
    Parallax, Inc.
  • cgraceycgracey Posts: 14,133
    edited 2006-04-23 20:09
    Hey, maybe the solution to all this is to have programmable feedback in the PLLs. With really weak feedback, the PLL would track more slowly, but not hiccup as much because of the NCO's short-term jitter. We could use bits 21 and 22 in the CTR registers to select 4 levels of feedback. What do you think?


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    Chip Gracey
    Parallax, Inc.
  • Tracy AllenTracy Allen Posts: 6,656
    edited 2006-04-23 20:18
    Chip, you mentioned in an earlier thread that the PLL is a ring oscillator with a phase detector that locks in on "small" changes within several clock periods, or within 10 microseconds for large changes. One way to address the jitter issue would be to--optionally--stretch out the lock time to small changes by an order of magnitude. I don't know if that would be possible given the pll topology.

    P.S. Chip, I think you answered my question before I asked it!

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    Tracy Allen
    www.emesystems.com

    Post Edited (Tracy Allen) : 4/23/2006 8:27:33 PM GMT
  • cgraceycgracey Posts: 14,133
    edited 2006-04-23 20:30
    Yeah, that's what I was talking about. By decreasing the feedback, it would follow more slowly. It would be like having better shock absorbers on a bumpy road. I think one-, and even a two-order-of-magnitude feedback attenuation would be good. This should be possible and relatively easy to implement.
    Tracy Allen said...
    Chip, you mentioned in an earlier thread that the PLL is a ring oscillator with a phase detector that locks in on "small" changes within several clock periods, or within 10 microseconds for large changes. One way to address the jitter issue would be to--optionally--stretch out the lock time to small changes by an order of magnitude. I don't know if that would be possible given the pll topology.

    P.S. Chip, I think you answered my question before I asked it!

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    Chip Gracey
    Parallax, Inc.
  • pjvpjv Posts: 1,903
    edited 2006-04-23 22:11
    Hi Chip;

    Well, if that accomplishes what we need then I'm all for it.

    That said however, for numerous other applications I still believe it to be beneficial to have an NCO mode that give true square wave output such as the model I suggested. I do understand where the low resolution issue comes in. Might some clever scheme be devised that uses two counters in some differential or cascaded mode ? Not sure how though. Anyone??

    Beau...... the RF work I'm presently doing is in that range; direct sequence spread spectrum in the 902 to 928 MHz band. My pursuit is a "better" ZigBee-like product that will run for years on a couple of "AA" or a "D" cell. The current ZigBee products are much too power hungry for my taste.

    Cheers,

    Peter (pjv)
  • Tracy AllenTracy Allen Posts: 6,656
    edited 2006-04-24 00:05
    Chip, is it possible to roll phs(31) into the feedback? Or to have a feedback condition reset phs to zero, like Peter is suggesting? Or to have a feedback conditon add or subtract frq to phs? Here are a couple of speculative modes:

    ctr_ mode   description      accum frq to phs                          apin     bpin
    tbd???        selfquench       phs(31)                                        phs(31)  !phs(31)
    
    tbd???        selfsustain      phs := phs * (!a1 & a2 ^ 1) + frq           phs(31)  !phs(31)
    
    



    In selfquench mode, it could produce a pulsout of a certain length (duration < 2/clkfreq). Set frqa := 1 and phsa := -duration. That starts with phsa(31)=1, and when phsa reaches zero, the pulse self quenches without program intervention.

    In selfsustain mode, it would execute one cycle adding frq to phs, until phs(31), as reflected in the apin output, hits a negative transition, which would reset phs to zero. That could(?) generate a square wave output. (I haven't thought that through.) It seems like the states a1 and a2 are already maintained by the hardware. Is there a hardware mechanism to reset phs?

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    Tracy Allen
    www.emesystems.com
  • dkemppaidkemppai Posts: 315
    edited 2006-04-24 18:17
    Beau Schwabe (Parallax) said...
    Peter,

    If I'm understanding you correctly.... A series LC tank tuned at the appropriate frequency will improve your situation greatly.
    Rather than using just the I/O pin, adding an LC tank, you can see almost x10 increase in transmission distance, as well as
    a nice sine wave on the output (antenna).

                   ANT
                    |
                    |
    I/O >----CAP----o----Coil----< GND
    
    



    For a fixed coil valie of .2uH, a capacitor range from 10 to 20pF will provide a tunable range from 79MHz to 112MHz

    Peter,
    Overmodulating FM will push the sidebands way out beyond the center frequency...· ...possibly to the point that there will be very little energy in the RX's bandwidth...·· ...do you have an RF spectrum analyzer?


    Beau,

    Wouldn't you want to put the cap in series with the inductor, and that in series with the antenna?·The circuit as shown·should·increase radiation at frequencies above 108Mhz greatly. I'd suspect that the cap to the antenna from the I/O pin would allow high frequency harmonics (third, fifth,·etc.)·to the antenna. Still, In any case, this is probably not a·good way to·generate·FM...


    Now, if you someone wanted to·build an I/Q modulator to generate a nice FM IF, and then multiply it up with
    hardware, you may have something...··· ...oooh, you could use a second cog to do I/Q demodulation and offer a full duplex·TX/RX...····...is parallax planning on adding a few DSP cores to the thing in the future?

    OK, OK, OK, Now I'm finally starting to·think of uses for·this beast!

    -Dan

    ·
  • Paul BakerPaul Baker Posts: 6,351
    edited 2006-04-24 18:50
    dkemppai said...

    ····...is parallax planning on adding a few DSP cores to the thing in the future?
    Not precisely, but the next full version update will have single cycle hardware multiply in each cog. (Im not letting the cat out of the bag, Chip has already disclosed this in another thread).

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    1+1=10
  • pjvpjv Posts: 1,903
    edited 2006-04-24 18:50
    Hi Dan;

    Some of my measurements were with no modulation, and still there were "birdies" galore throughout the FM band on my radio receiver.

    And, yes, I'm set up for RF work; I have an Advantest R3162 (Tektronix) spectrum analyzer; good to 8 GHz, with a noise floor around minus 150 dBm.

    Regarding Beau's circuit, considering the I/O pin as low impedance, then the capacitor and coil can be thought of as "in parallel", and hence make up a resonant tank. I have not checked the calculations for values, but the connection is correct. However, depending on the antenna particulars, a matching network is likely required for proper or optimum performance.

    Regarding I/Q modulation, that will be one area I'll be pursuing with the Propeller; (DSP-like) baseband modulation upconverted to 130 MHz or so with one of the counter/pll units, and then picking off the 7th harmonic with a circuit somewhat like Beau's or possibly a 915 Mhz SAW (Surface Accoustical Wave) filter. We'll need to see how well that adheres to the rather stringent FCC requirements. Perhaps it will be too ugly. Or maybe not...... lots more experimentation to do!

    Cheers,

    Peter (pjv)
  • rokickirokicki Posts: 1,000
    edited 2006-04-24 19:11
    How much would a simple downcounter mode help, anyway? For instance, if we use the existing NCO mode but simply use values
    that are closest to what a downcounter would give us, those values probably are fairly clean. For instance, in a downcounter
    mode, with 16x PLL and generating 100MHz, the closest we could get with an 80MHz system clock is 6 clocks up and 6 clocks down.
    (That would give us 106.677MHz---not very accurate.) But in any case, we could simply use NCO with a value of 2^32/6 or
    715827883. With this value, less than one in a billion of the square waves will be distorted; you'd get a small tick every ten
    seconds or so. (Of course the PLL may react poorly to this for a few cycles.)

    If we used 7 clocks up and 7 clocks down (our only other real option) we'd be at 91.428MHz. So essentially with a downcounter
    we'd be restricted to a total of two points on the 88-108MHz FM band.

    Then there's something like 7 clocks up and 6 clocks down---this would even have some DC bias! I wonder what the spectrum of
    such an asymmetric waveform would be. Or (7,6,6,7,6,6).

    I'd be interested to see how clean the 106.667MHz or 91.428MHz signal is.

    Anyway, this post is more or less what Tracy says above, but my point is that a simple downcounter approach may not
    actually help that much, since you can simulate it extremely closely with the existing NCO mode if you just limit yourself to
    the frequencies that the downcounter approach could generate.
  • pjvpjv Posts: 1,903
    edited 2006-04-24 19:49
    Hi Rokicki;

    You are correct about the number of possibilites. However, for lower frequencies where there are lots of counts, we still should be able to expect an NCO mode where a true square wave comes out. I can see all kinds of applications in using such an output as the input to the other counter operated in various modes; for example "logic" mode for hands-off frequency counting frequency counting etc. etc. The possibilities are endless.

    Chip, perhaps we need the ability of one counter's pll driven by the output of a different counter. In other words;

    1- use one counter to generate a (PLL up- cranked) high frequency square wave pulse train
    2- use a second counter to count the number of those pulses over a programmable period of time
    3- let the second counter compare to a setpoint value or reference frequency to determine frequency/phase error relative to the set point
    4- drive the PLL loop of 1 with the error signal of 3

    This is more in line with traditional high frequency RF synthesizers, and should be a ble to generate any frequency up to the limit of the PLL.

    I realize it's asking a bit much to consider counters as oscillators, but Chip, you're sooooo close.......

    Cheers,

    Peter (pjv)
  • cgraceycgracey Posts: 14,133
    edited 2006-04-24 22:49
    pjv said...

    1- use one counter to generate a (PLL up- cranked) high frequency square wave pulse train
    2- use a second counter to count the number of those pulses over a programmable period of time
    3- let the second counter compare to a setpoint value or reference frequency to determine frequency/phase error relative to the set point
    4- drive the PLL loop of 1 with the error signal of 3
    Peter,

    Whatever frequency the NCO runs at will be perfectly multiplied by 16 in the PLL, and even phase-locked. The phase-locked part doesn't mean much·in the short-term when the NCO has a non-power-of-two in the FRQ which causes jittery MSB transitions. Averaged, though, everything is perfect. Just in the short-term it gets squirly. I might be missing something, but it seems this approach will only insure what's already the case: the PLL is, over the long-term, 16x the frequency of the NCO.

    I think weakening the feedback current in the VCO's charge pump is the way to get better RF performance. It's very simple and has the most 'analog' effect, which is what's desired. I am going to see if we can make a test chip, or perhaps use the 64-pin version as the guinea pig for this feedback modification.

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    Chip Gracey
    Parallax, Inc.
  • pjvpjv Posts: 1,903
    edited 2006-04-24 23:03
    Hi Chip;

    I have no way to predict how well the looser coupling VCO will work, so we'll rely on your experience. My understanding is that long-term the average will be correct; I just fear that short-term excursions are still going to cause "birdies", and prevent FCC approvals.

    Furthermore, have you any insight how this method would impact rapid modulation by software alteration of the FREQ register?

    Cheers,

    Peter (pjv)
  • cgraceycgracey Posts: 14,133
    edited 2006-04-25 00:18
    Peter,

    Have you tried playing with tank circuits, at all? Maybe a small fixed inductor and a variable cap would work effectively. I'm really curious to know if it would help the birdie situation.
    pjv said...
    Hi Chip;

    I have no way to predict how well the looser coupling VCO will work, so we'll rely on your experience. My understanding is that long-term the average will be correct; I just fear that short-term excursions are still going to cause "birdies", and prevent FCC approvals.

    Furthermore, have you any insight how this method would impact rapid modulation by software alteration of the FREQ register?

    Cheers,

    Peter (pjv)

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    Chip Gracey
    Parallax, Inc.

    Post Edited (Chip Gracey) : 4/25/2006 3:00:22 AM GMT
  • pjvpjv Posts: 1,903
    edited 2006-04-25 02:30
    Hi Chip;

    While I have done quite a lot of RF work, tank circuits included of course, I have not yet put a tank in this circuit, but it seems to me Beau has.

    My expectations are that it will improve things, but to what degree? These things, especially at 915 MHz (and later at 2.4 GHz) are a REAL bear to quieten down. The spurious levels permitted by the FCC are very low, and it's just plain tough to get below them. So the natural desire is to startwith the least the minimum spurs to begin with.

    That said, in a while I will have a go at trying it, because we all need to know. Time sure is precious these days, and there is so much more Propeller stuff to learn. Please keep us informed on your quest to "loosen" the grip the NCO has on the VCO.

    Would, or could you consider putting a "proper" phase locked loop RF oscillator on board at some future date? The topologies for the reference and divider chains are well established, and virtually any frequency up to some maximum can be genereated with crystal stability.

    Man, what we could do if that were a reality!

    Cheers,

    Peter (pjv)
  • Beau SchwabeBeau Schwabe Posts: 6,547
    edited 2006-04-25 02:59
    Peter,
    You said...

    ...I have not yet put a tank in this circuit, but it seems to me Beau has.

    I have, only in some frequency ranges though...

    "AM broadcast band"
    "some shortwave"
    27MHz
    49MHz
    72MHz
    75MHz
    "FM broadcast band"

    ...I have not gone much higher in frequency than this.

    In most of my tank circuits, I have observed anywhere from 50V to 100V pk-pk when the circuit is in resonance.
    this is when it is excited from a 3.3V to GND square wave signal on the Propeller I/O pin. The transmission distance
    has been roughly 200ft-300ft

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    Beau Schwabe

    IC Layout Engineer
    Parallax, Inc.

    Post Edited (Beau Schwabe (Parallax)) : 4/25/2006 3:05:55 AM GMT
  • dkemppaidkemppai Posts: 315
    edited 2006-04-25 03:20
    Not precisely, but the next full version update will have single cycle hardware multiply in each cog. (Im not letting the cat out of the bag, Chip has already disclosed this in another thread).
    hmmm, this thing is starting to look more powerful...· ..single cycle multiply...··...Ok, when can I get one!



    Peter,

    I'm pretty sure that circuit isn't what you want.·(Try it)

    For a·ground referenced load·such as your antenna, the·capacitor and inductor will need to be swapped.
    Think of the impedance of each component at each of the harmonics of the modulator 'square' wave you
    are feeding into the circuit. As you go higher in frequency, more of the voltage appears at the
    junction between the two devices (at the antenna terminal).·Another way to look at it is as an LC low pass filter.·The load should be parallel to the capacitor, not the inductor.


    The other unfortunate side effect of this·series resonant circuit·is that at the resonant frequency,
    the 'modulator' sees a very low impedance to ground...· ...lots of current draw at the resonant
    frequency...··...then again it's late and maybe I've got my head elsewhere. [noparse]:)[/noparse]


    In any case, to get FCC approvals from·a single stage filter you're gong to need·a really high Q circuit. I've never used any SAW's, but I seem to remember they have some nice steep slopes. Most of my RF work is
    low enough in frequency SAW's just aren't avaliable.


    -Dan

    (P.S. if you'd like to continue this discussion,·let's PM this so as not to pollute the thread any more...)
  • cgraceycgracey Posts: 14,133
    edited 2006-04-25 05:08
    pjv said...

    I have no way to predict how well the looser coupling VCO will work...have you any insight how this method would impact rapid modulation by software alteration of the FREQ register?
    Well,·for narrow-band FM it should be perfect. For rapid and big frequency hops, it might be slow. If we make it programmable, you could pick the best compromise. BTW, this programmable feedback takes the form of how much current the charge pump deals to the bias caps in the VCO's ring oscillator. More current = rapid response and·high jitter, less curent = slow response and·low jitter.

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    Chip Gracey
    Parallax, Inc.

    Post Edited (Chip Gracey) : 4/25/2006 5:11:07 AM GMT
  • Tracy AllenTracy Allen Posts: 6,656
    edited 2006-04-25 06:31
    Peter, in your first post in this thread, you mentioned setting of a COG counter to 6mhz with pll16, to get into the FM band. That would put the carrier at 96mhz. Was that also with the Propeller chip running on the demo board with the 5mhz xtal in xtal + pll16 mode, 80mhz main clock? And what value of frqa? I'm just trying to establish the ratios involved, because the subharmonic content is closely related to the ratio.

    If that is the case,
    2^32 * 6 / 80 gives frqa := 322122547. (with a remainder of 0.2)
    Adding that into phsa cycles through 2^32 in between 13 and 14 iterations.

    NCO has to synthesize a waveform having period 166.6666... nanoseconds (1/6 mhz) out of high and low times of 12.5 nanoseconds (1/80mhz). The ratio of periods is 80/6 = 13.33333... = 40/3. The total period has to average out to 13.3333.. time slots, and to do that with integers, it has to be made up of periods of 13 and 14, or half periods of 6 and 7. Here is how it works out numerically:
    0,3,6,9,12,15,18,21,24,27,30,33,36,39,2,5,8,11,14,17,20,23,26,29,32,35,38,1,4,7,10,13,16,19,22,25,28,31,34,37,0,...
    0000000111111100000011111110000000111111 <--- these are values of phsa(31)
    776776 <--- these are runs of zeros or ones
    The repeating cycle consists of 40 12.5 nanosecond time slots, 7 zeros, 7 ones, 6 zeros, 7 ones, 7 zeros, 6 ones. Then repeating. There is thus a strong subratio component with a period of 40 time slots (500 nanoseconds, 2 megahertz) as well as the components that correspond to period 14, period 13 and period 12. I don't know how the pll will react to that, but its averaging interval will have to be greater than 40*12.5 ns, in order to average out the lowest major subcycle.

    Observaiton #1: It probably will not matter whether we use frqa=322122547 or frqa=322122548. Either 322122547/2^32, or 322122548/2^32, is a good approximation to 40/3. That is the exact ratio we need to achieve, but with a denominator of 2^32. Those will each have a slightly differnent very long subharmonic content. The main cycle will still be the 40/3 cycle, with an infrequent but periodic correction (add or delete a 1 or a 0).
    Corollary. Those different values of frqa _should_ represent different averaged frequencies, but for all practical purposes they are the same. The pll response can't be made slow enough to average those out, and the adjustments will appear as minor transient phase bumps, albeit periodic.

    How long is long enough for the PLL averaging? I don't know. The example has a major cycle of 40 clock periods, so would 400 clock periods be enough?

    Okay, enough number theory. Except to reiterate the point that some ratios give a more complicated spectrum, like the Fibonacci sequence I mentioned in a previous post. For example, say for some reason you wanted to hit an NCO frequency of 8.09016994375 megahertz from an 80 mhz master clock. That is the golden mean (1.61803398875) times 5 megahertz. Set frqa := 434337691. That should give quite a complicated spectrum, with closely spaced subharmonic components out to long periods. At least, that is what the theory predicts. If I get a chance I'll take a look. I don't have a spectrum analyzer though.

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    Tracy Allen
    www.emesystems.com

    Post Edited (Tracy Allen) : 4/25/2006 6:50:59 AM GMT
  • Phil Pilgrim (PhiPi)Phil Pilgrim (PhiPi) Posts: 23,514
    edited 2006-04-25 07:07
    Tracy,

    I wonder what this all implies for looser coupling of the PLL. Some values of frqa will have short-period repetition cycles, which would barely disturb a loosely-coupled PLL; whereas with other values the repitition period could be much longer. This would seem to imply that simply lengthening the time constant of the PLL by some arbitrary amount may not, in itself, be adequate for stability across the domain of possible frqa values -- or even clusters within a small range of frequencies. If the value in frqa is such that "corrections" occur only occasionally (compared to the average NCO period), that would result in a more or less permanent phase shift (compared to the same time scale). Am I overlooking something obvious?

    -Phil

    Post Edited (Phil Pilgrim (PhiPi)) : 4/25/2006 7:10:52 AM GMT
  • Tracy AllenTracy Allen Posts: 6,656
    edited 2006-04-25 17:37
    Phil,

    I think there would have to be a compromise between averaging and responsiveness in the PLL. A PLL with a response time of minutes could average out the long cycles, but that would not be too useful for FM! On the other hand, a responsive system with a time constant that allows, say, audio modulation, would appear to lock onto the dominant ratio, and with small variations in frqa, it would tend to jerk from ratio to ratio rather than follow small variations continously. That too could be problematic for continuous FM, although it could work to advantage for FSK. Subcycles commensurate with, or longer, than the averaging period would appear as birdies in the frequency domain and periodic phase blips in the time domain. A pll lock time option longer than a few cycles could help with some situations, but it would not be a panacea.

    The alternative is a deterministic square wave, but that still has to be quantized in units of the master clock. So with an 80 mhz clk, we would only get symmettric periods from phs(31) of 25ns, 50ns, 75ns,..., 25*N. With the NCO we already get those (with very long subcycles when N is not a power of 2), and also intermediate ratios that could be filtered with a longer pll average. I don't see any way around it, except to modulate the master clock itself.

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    Tracy Allen
    www.emesystems.com
  • Phil Pilgrim (PhiPi)Phil Pilgrim (PhiPi) Posts: 23,514
    edited 2006-04-25 18:20
    Tracy,

    I had thought that summing two counters of the same frequency but offset phases might help. This would not only make the output more "sine-like", but it might divide up the phase corrections in such a way that they would, at least partially, cancel. For any given frequency, it should be possible to find the phase offset that minimizes some utility function of energy in the frequency domain (e.g. total energy outside the fundamental, value of maximum harmonic, etc.). In NCO mode, this worked quite well, if my scope's FFT is to be believed. But in PLL mode, it was impossible to establish or maintain any phase relationship between the two counter outputs. Without more than a casual analysis, I'm not sure why this is the case.

    -Phil
  • pjvpjv Posts: 1,903
    edited 2006-04-25 21:06
    Hi All;

    I think Tracy nailed it by saying to modulate the master clock. While that itself is not a good approach as then all insructions in other cogs would be affected, and determinism would pretty much go out the window, however we can achieve the same effect.

    I believe if the reference for the PLL frequency/phase comparator were to be the programmable divide output of one counter, and the second frequency/phase comparator input were a programmable divide output from the VCO, then we have exactly what we need....... effectively what Tracy stated in his last senence, but without actually modifying the base system frequency.

    This is exactly what is done in standard RF synthesizers. There already are two programmable counters in every COG; "just" some different interconnection is required, and a square wave (toggle perhaps) outputs to feed the frequency/phase comparator with time-steady signals.

    This would improve the NCO for other applications requiring square waves to boot!

    How awesome is that !? I'm keeping my fingers crossed.

    Cheers,

    Peter (pjv)
  • cgraceycgracey Posts: 14,133
    edited 2006-04-26 06:13
    Peter,

    I want to understand what you guys are talking about:
    pjv said...


    I believe if the reference for the PLL frequency/phase comparator were to be the programmable divide output of one counter, and the second frequency/phase comparator input were a programmable divide output from the VCO, then we have exactly what we need....... effectively what Tracy stated in his last senence, but without actually modifying the base system frequency.

    This is exactly what is done in standard RF synthesizers. There already are two programmable counters in every COG; "just" some different interconnection is required, and a square wave (toggle perhaps) outputs to feed the frequency/phase comparator with time-steady signals.

    This would improve the NCO for other applications requiring square waves to boot!

    How awesome is that !? I'm keeping my fingers crossed.
    Don't you already have this same frequency-phase-detector hookup? One of the reference inputs is already connected to a division (fixed 1/16) of the VCO output. The other input is connected to PHS[noparse][[/noparse]31]. If you divide PHS[noparse][[/noparse]31], would it give you anything qualitatively different than PHS[noparse][[/noparse]31] with·a scaled·value in FRQ? If you are talking about programmable dividers, they would allow you to hit close to many frequencies with a real square wave, but they would be no less gracefull at·FM'ing +/-50KHz at 100 MHz, right? Please help me to understand.


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    Chip Gracey
    Parallax, Inc.
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