@Rayman said:
Can't seem to make it work... yet...
One problem is that my power pin works the opposite way, has to be high to turn on power. Think hacked that to be on, but still doesn't work.
One note: I get "Mount OK", even if the uSD is not connected. Is that right?
Yes, mount() only sets the pin assignments. The real mounting is delayed until first file is opened.
add -D SD_DEBUG to the compile line. That'll give you more info. eg:
Set pins: CLK_PIN=21 CMD_PIN=20 DAT_PIN=16 POW_PIN=23 LED_PIN=22
mount: OK
Card detected ... power cycle of SD card
power-down threshold = 37 pin state = 1
power-down slope = 26225 us pin state = 0
power-up threshold = 209 pin state = 0
power-up slope = 1095 us pin state = 1
SD clock divider set to sysclock/900. 'rxlag' compensation is 0
Card idle OK
OCR register c0ff8000 - Valid SDHC/SDXC Card
Data Transfer Mode entered - Published RCA 00010000
4-bit data interface engaged
...
I can certainly change the software. The actual control in the software is just two instructions. A DRVH, for off, and a FLTL, for back on.
Post a schematic of your control circuit, as designed. EDIT2: Post the whole schematic. I'm trying to imagine how your card-detect is functioning too. Is there pull-ups on everything? It pretty much relies on the CLK pin having a pull-up for power cycling. CMD and DAT pins also must return high for the idle states to be triggered correctly.
EDIT: The code could be improved too. There is no timeout on that slope. It just assumes that a card will droop below the threshold in a reasonable interval.
The "pin state" is wrong before that too. That's the CLK pin level. It shouldn't start low and then take 1.5 seconds to be detected as still low!
And then powering up shouldn't be starting as high already! And weirder still is the software takes no action between the second and third lines. There's no reason for the state to change like that.
Ok, it's better with pullups but gets stuck going to 4bit mode it seems:
Card detected ... power cycle of SD card
power-down threshold = 149 pin state = 1
power-down slope = 34179 us pin state = 0
power-up threshold = 209 pin state = 0
power-up slope = 1031 us pin state = 1
SD clock divider set to sysclock/750. 'rxlag' compensation is 0
Card idle OK
OCR register c0ff8000 - Valid SDHC/SDXC Card
Data Transfer Mode entered - Published RCA aaaa0000
4-bit data interface engaged
Also, the volts pins is not getting as low as yours so had to change this...
@Rayman said:
Ok, it's better with pullups but gets stuck going to 4bit mode it seems:
The 4bit interface is reporting good. The next step after that is High-Speed. You can disable High-Speed select by setting CLK_POL = 1 in the enums at top of driver file.
Also, the volts pins is not getting as low as yours so had to change this...
That shouldn't be needed. The spec is clear that 0.5 Volts is the threshold to meet.
Pull-ups again, on CMD/DAT pins, are the key to this working. They help discharge the storage capacitor after power is switched off.
@Rayman said:
Re: That shouldn't be needed. The spec is clear that 0.5 Volts is the threshold to meet.
Could this be because of the missing series resistor?
Just need pull-ups on the five CMD/DAT pins. Oh, those pull-ups need to be on the card side of the power switch. It doesn't work if they go to the Prop2 side of the power switch.
Basically, copy Roger's schematic and you're good.
@Wuerfel_21 said:
Does that at all correlate to having an A2 logo on the card?
Bang on, yes. two A2, three A1, and two non-A.
Wikipedia mentions A1/A2 class cards only have a 10MB/s sustained requirement. Do your cards have a U1 or U3 marking on them as well?
I'm pretty sure they all do. The point of including that in the A rating I think is just so that you don't need the old Class 10 rating anymore, freeing up valuable space on those tiny cards.
@Wuerfel_21 said:
I'm pretty sure they all do. The point of including that in the A rating I think is just so that you don't need the old Class 10 rating anymore, freeing up valuable space on those tiny cards.
Yeah the free printing area for labelling is getting real crowded on these cards. So many ratings schemes shown.
@Rayman said:
Oh, is there a special kind of card needed here?
Maybe that’s my problem…
Actually, think all of mine are U1, so that should be OK, right?
I'd expect so. I don't expect evanh's code is going to be that selective. As long as it can do 4bit IO which is a standard feature then hopefully his code should work. Seems like your circuit might be the issue as it differs from what evanh is working with. As you've found already many of the resistors I put in are going to be needed. If you want high speed performance some series resistors may be needed although at lower clock speeds it might not be a problem.
@Rayman said:
@rogloh Assuming my issue isn't using PortB instead of PortA, seems need one of your boards...
Are you planning on selling them?
Not really planning to but hoping Parallax and/or @VonSzarvas might want to take up the same/similar design, once evanh's code is shown fully working perhaps and if there's demand. It's a fairly simple circuit to replicate if you have PCB skills - for others following this, the original circuit is shown on post #1 in this thread.
It expects SDHC or newer command set, and uses no newer features. That's old, older than any uSD card. The A2 features will be the first even attempted.
I have some 2GB µSDs laying around somewhere. These use the original non-HC protocol, I'm pretty sure. Just need to left-shift your addresses by 9 and all is fine.
Do they really just work like that? If a new 1 GB card was made it'd be non-HC conformant? That won't work with my driver. I've completely ignored the byte addressing stuff.
Yes, lower capacity cards use byte addressing. I think 1/2 GB are still being made somewhere deep below Shenzhen where the sun doesn't shine. There's probably enough legacy equipment that requires them. You can certainly buy some for cheap.
Comments
Yes, mount() only sets the pin assignments. The real mounting is delayed until first file is opened.
add
-D SD_DEBUGto the compile line. That'll give you more info. eg:Tried added a pulldown to the p-channel mosfet, so would behave similar to yours, but it's definitely not happy:
I can certainly change the software. The actual control in the software is just two instructions. A DRVH, for off, and a FLTL, for back on.
Post a schematic of your control circuit, as designed. EDIT2: Post the whole schematic. I'm trying to imagine how your card-detect is functioning too. Is there pull-ups on everything? It pretty much relies on the CLK pin having a pull-up for power cycling. CMD and DAT pins also must return high for the idle states to be triggered correctly.
EDIT: The code could be improved too. There is no timeout on that slope. It just assumes that a card will droop below the threshold in a reasonable interval.
It looks like it's waiting for the clock pin to rise above 2.7 V, but it never does...
then gives volts missing error
I see you have pullups in your circuit, maybe that's it...
I'll try adding those in...
Yes, I did add a timeout to the second stage. There is a spec (35 ms) for rise time taking too long at power on.
The "pin state" is wrong before that too. That's the CLK pin level. It shouldn't start low and then take 1.5 seconds to be detected as still low!
And then powering up shouldn't be starting as high already! And weirder still is the software takes no action between the second and third lines. There's no reason for the state to change like that.
Ok, it's better with pullups but gets stuck going to 4bit mode it seems:
Also, the volts pins is not getting as low as yours so had to change this...
//threshold = (int)(0.5 / 3.4 * 255.0); // 0.5 Volts threshold = (int)(2.0 / 3.4 * 255.0); // 0.5 Voltsthis is with 10k pullups. I'll change to 20k to see if that helps...
The 4bit interface is reporting good. The next step after that is High-Speed. You can disable High-Speed select by setting CLK_POL = 1 in the enums at top of driver file.
That shouldn't be needed. The spec is clear that 0.5 Volts is the threshold to meet.
Pull-ups again, on CMD/DAT pins, are the key to this working. They help discharge the storage capacitor after power is switched off.
It does get further that way:
Re: That shouldn't be needed. The spec is clear that 0.5 Volts is the threshold to meet.
Could this be because of the missing series resistor?
That's working. Those CMD10 errors are normal. That's the calibration measuring its boundaries.
Just need pull-ups on the five CMD/DAT pins. Oh, those pull-ups need to be on the card side of the power switch. It doesn't work if they go to the Prop2 side of the power switch.
Basically, copy Roger's schematic and you're good.
Ok, yes, moving the pullups to the other side of power switch fixed that threshold issue.
Now, I'm trying to figure out why it seems to be hanging at fopen()...
Probably the same reason it hung at High-Speed too. Time to flip back to CLK_POL = 0 and troubleshoot that step.
I need to hit the sack. It's now almost 9 AM. The sun's up.
Maybe it needs to be on lower 32 pins?
My dat0 pin is 40
Maybe that’s a no go ?
Wikipedia mentions A1/A2 class cards only have a 10MB/s sustained requirement. Do your cards have a U1 or U3 marking on them as well?
I'm pretty sure they all do. The point of including that in the A rating I think is just so that you don't need the old Class 10 rating anymore, freeing up valuable space on those tiny cards.
Yeah the free printing area for labelling is getting real crowded on these cards. So many ratings schemes shown.
Oh, is there a special kind of card needed here?
Maybe that’s my problem…
Actually, think all of mine are U1, so that should be OK, right?
I'd expect so. I don't expect evanh's code is going to be that selective. As long as it can do 4bit IO which is a standard feature then hopefully his code should work. Seems like your circuit might be the issue as it differs from what evanh is working with. As you've found already many of the resistors I put in are going to be needed. If you want high speed performance some series resistors may be needed although at lower clock speeds it might not be a problem.
@rogloh Assuming my issue isn't using PortB instead of PortA, seems need one of your boards...
Are you planning on selling them?
Not really planning to but hoping Parallax and/or @VonSzarvas might want to take up the same/similar design, once evanh's code is shown fully working perhaps and if there's demand. It's a fairly simple circuit to replicate if you have PCB skills - for others following this, the original circuit is shown on post #1 in this thread.
It expects SDHC or newer command set, and uses no newer features. That's old, older than any uSD card. The A2 features will be the first even attempted.
I have some 2GB µSDs laying around somewhere. These use the original non-HC protocol, I'm pretty sure. Just need to left-shift your addresses by 9 and all is fine.
Do they really just work like that? If a new 1 GB card was made it'd be non-HC conformant? That won't work with my driver. I've completely ignored the byte addressing stuff.
Yes, lower capacity cards use byte addressing. I think 1/2 GB are still being made somewhere deep below Shenzhen where the sun doesn't shine. There's probably enough legacy equipment that requires them. You can certainly buy some for cheap.