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P2 power sequencing — Parallax Forums

P2 power sequencing

knivdknivd Posts: 102
in Propeller 2

I could not find information about this in the documentation. What is the proper sequence? Vcore->Vio, or Vio->Vcore? Or always both at the same time?

Comments

  • VonSzarvasVonSzarvas Posts: 3,450
    edited 2022-01-04 18:17

    I don't believe it matters, but you need both active to be able to run code. (OR at least you need Vcore and two of the Vxxxx ranges, V5663 and V2431).

    This would be a good question for the next P2LF forum when Chip is online and able to explain directly the nitty gritty.
    What I can say is that in testing we run all sorts of unusual power-up sequences without issue.

  • knivdknivd Posts: 102

    Thanks!

  • evanhevanh Posts: 15,915
    edited 2022-01-04 23:13

    I can think of two three questions to confirm/clarify:

    • The reset circuit, powered from V5663, presumably has logic from both VDD and itself for delayed release of power-on-reset.
    • RCFAST oscillator, powered from V2431, is also needed for anything to happen. I'm guessing oscillator power-up is independent of POR though, and stability of RCFAST is left to pauses in software.
    • Any hard reset has a 3 ms release delay. Not sure if it's a dedicated R-C timer or possibly timed from RCFAST.
  • YanomaniYanomani Posts: 1,524

    @VonSzarvas said:
    I don't believe it matters, but you need both active to be able to run code. (OR at least you need Vcore and two of the Vxxxx ranges, V5663 and V2431).

    This would be a good question for the next P2LF forum when Chip is online and able to explain directly the nitty gritty.
    What I can say is that in testing we run all sorts of unusual power-up sequences without issue.

    and...

    @evanh said:
    I can think of two three questions to confirm/clarify:

    • The reset circuit, powered from V5663, presumably has logic from both VDD and itself for delayed release of power-on-reset.
    • RCFAST oscillator, powered from V2431, is also needed for anything to happen. I'm guessing oscillator power-up is independent of POR though, and stability of RCFAST is left to pauses in software.
    • Any hard reset has a 3 ms release delay. Not sure if it's a dedicated R-C timer or possibly timed from RCFAST.

    Since they address almost the same subject, perhaps also a good opportunity to get that two-month-old-thread fully clarified:

    https://forums.parallax.com/discussion/173986/unused-3-3v-vio-pins

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