are you doing GIO and VIO calibration at nearly the same time as taking ADC data samples?
Remember the trails you plotted for every pin for VIO vs GIO calibration?
Some have a slope, but some are more point stable with respect to temperature
As part of my servo project I also did some experiments with ADCs and calibration. I use SINC2 filtering and 8192 clocks sampling period. I had some problems with the autocalibration that suffered from some offset variations from channel to channel. But there were no glitches and fairly low noise.
Hehe, sorry, no, I didn't explain my aim did I. There is only vague references so far. I'm explicitly aiming to see if there is a reliable way to measure the die temperature using the ADC's drift characteristics.
First thing I've noted is VIO level readings are more stable than GIO level readings so I've ignored GIO altogether.
EDIT: I guess, in the end, the biggest issue will simply be calibrating an absolute reference temperature. Each prop2 part I run this on will likely have a relatively large offset to other prop2s.
I also noticed that VIO was more stable than the GIO in the calibration readings
The VIO and GIO are somewhat correlated, and its the 'low' values which seem to have the most appropriate (more linear) temperature slopes ripe for exploit. So perhaps a strategy of choosing a pin with lowest or near lowest VIO calibration value then watching that pin for excursions could work
It doesn't appear sometimes. It was only when I was comparing all pins that I picked up there was a problem. I strongly advise you do add the de-glitching code.
I've just had a shot at sampling "fast" driven pins in place of VIO and GIO input sources in an attempt to remove differences in source select resistors. Chip mentioned to try that in the other topic ManAtWork linked to.
Comparing the two sources, they have the same varied DC levels numerically. Where a particular pin's GIO has as a relatively low reading, then so does that pin input when driven low with that pin's 20 ohm output drive. Likewise for VIO vs high output.
The measurement method is slow. I wait 250 microseconds with the ADC operating and smartpin in Sinc2 Filter mode. This provides a warm-up for the ADC hardware as per Chip's recommendations. Then take 20 consecutive samples, discarding the first four to fill the "diff" variables, and use the remaining 16 samples for that pin's reading. I'm operating at 10 MHz sysclock, for the moment, and each sample is 11585 clocks. So that's a measurement duration of 1.1585 x 16 = 18.536 ms for each source.
I conclude the source select resistors are not the reason for differences between pins.
PS: Also, the difference of VIO - GIO verses pin high - pin low also track each other well on a per pin basis.
So the min/max variations there is about 5% of full-scale for GIO and 4% of full-scale for VIO. That's a tad wild. And that's just one part at one temperature. Hence the obvious recognition of always needing to calibrate for instrumentation use.
I should build a binary for others to gather reports and post them here ...
Evanh, thanks. I've been looking at your comments in the doc, trying to fully understand the ramifications of this. It would seem just the MSBs would be bad, but is there more to it? I ask because I remember this coming up a while back, and there seemed to be more to it.
Just the 5 most significant bits (for a 27-bit to 32-bit translation). I had thought it was worse at the very start but that was quickly narrowed down, thanks to Ariba, to just a rollover problem affecting the extended bits only.
I've now even done a mock example on paper, just doing a regular spaced summing using 3-bit to 4-bit, and get the same effect of the extended bit toggling.
@evanh said:
Just the 5 most significant bits (for a 27-bit to 32-bit translation). I had thought it was worse at the very start but that was quickly narrowed down, thanks to Ariba, to just a rollover problem affecting the extended bits only.
I've now even done a mock example on paper, just doing a regular spaced summing using 3-bit to 4-bit, and get the same effect of the extended bit toggling.
Can't this whole thing be solved by ignoring the top 5 MSBs of the final result?
That's effectively what both options achieve - Removal of those extra bits so they won't mess up anything later. Ie: You don't want those extraneous bits present when further filtering, or scaling, or even a simple print.
If not documented, it'll catch a lot of people out. Sure had me for a while. It's actually a generic binary maths thing but just one I've not dealt with until now surprisingly.
Maybe the documenting around it could be written more that way. That here's two simple solutions to translating between circular integer word sizes.
Actually, in hindsight, I have dealt with this before but it was couched within some servo hardware where I had to derive the encoder count from its error counter. This was all in C also. The error counter was 13 bits wide and so I used a bunch of masking to handle the translation to 32-bit. Didn't even think how relevant that might be to other situations. EDIT: On the other hand, the error counter wasn't circular in nature, even if the encoder was.
It's not a smartpin problem at all. It's just the nature of circular maths arithmetic when mixing different word sizes. Ie: It's just in the software summing, the ADD and SUB.
Here's the 3-bit to 4-bit hand written paper version copied of the non-corrected software. It is simulating a fixed internal increase of 5 per decimation from the RDPIN:
It's amusing reading my evolving understanding. I wasn't fully on to real issue for quite some time. And even when I did get it completely I didn't post a clarification until now.
What I failed to do was print the suscessive components, as per above, in my early testing. I didn't know that RDPIN was producing a clean 27 bits. I guess I didn't know it was meant to be 27-bit either to be fair.
@evanh said:
It's amusing reading my evolving understanding. I wasn't fully on to real issue for quite some time. And even when I did get it completely I didn't post a clarification until now.
What I failed to do was print the suscessive components, as per above, in my early testing. I didn't know that RDPIN was producing a clean 27 bits. I guess I didn't know it was meant to be 27-bit either to be fair.
For the RDPIN, yes.
Not for the resulting post-diff'd sample. Read my simulated example above (I've fleshed it out a little more). It shows the resulting diff'd "sample" as containing extraneous high-order bits. It should be consecutive 5's but has sporadic 13's in there. If using an &7 to mask it, it would be all 5's.
PS: I've been trying to make it clear that it's just a word size conversion issue in the software. The extra instruction is needed as part of doing circular arithmetic and bridging between word sizes.
EDIT: Actually, it's not even about bridging. It's just managing circular arithmetic at a non-native word size. The other method of scaling with a SHL converts to native word size and therefore doesn't need further masking.
Cool. My editing in the Google Doc was looking messy anyway. Suggestion mode leaves a trail of overlapping edits. Best to prep it elsewhere then do a single paste.
Chip,
In your updating, please do make it clear that the RDPIN decimations are 27-bit wide. Not knowing that ahead of troubleshooting definitely slowed down diagnosing of this issue.
PS: This whole issue has a lot of commonality with motion control on rotary equipment. I did tons of this stuff more than a couple decades back. Certainly wasn't expecting this conclusion when I starting problem solving this - an ADC in a microcontroller.
Here's a little piece of BASIC code from the servo controller of the first two wrapping machines, last updated in 1998. I don't think I could do this now. I loved the work at the time but it was strenuous thinking all the time. There was very limited memory in the servo controller and all source was on board so comments had to be small. It was kind of cool because you could pop open a dumb terminal and edit the whole program with that. It tokenised upon RUN.
#fastpos : REM (Dropped to 0v)
REM Picture sync received
REM -----------------------------------------------------------------
IF !PicOset | (FASTPOS.1 - PicPls < PackEnc * .75) THEN RETURN
PackEnc = PackEnc + ((FP.1-PicPls+PackEnc*.5)%PackEnc-PackEnc*.5) * PicGn
IF PackEnc > PackMax THEN PackEnc = PackMax
PackR = PackEnc / InRev
cam1(2) = INT(PackEnc / FinSect)
PicPls = FASTPOS.1
RETURN
What that is doing is dynamically recalibrating the nominal motion pack length, PackEnc, to match the measured distance between printed images on the wrapping, FASTPOS.1 - PicPls.
But to make that work as circular arithmetic requires to wrap (pun ) the measured distance to the existing pack length first. That's the modulo'd part, (..)%PackEnc. Just like masking a word size.
@evanh said:
Chip,
In your updating, please do make it clear that the RDPIN decimations are 27-bit wide. Not knowing that ahead of troubleshooting definitely slowed down diagnosing of this issue.
PS: This whole issue has a lot of commonality with motion control on rotary equipment. I did tons of this stuff more than a couple decades back. Certainly wasn't expecting this conclusion when I starting problem solving this - an ADC in a microcontroller.
Here's a little piece of BASIC code from the servo controller of the first two wrapping machines, last updated in 1998. I don't think I could do this now. I loved the work at the time but it was strenuous thinking all the time. There was very limited memory in the servo controller and all source was on board so comments had to be small. It was kind of cool because you could pop open a dumb terminal and edit the whole program with that. It tokenised upon RUN.
#fastpos : REM (Dropped to 0v)
REM Picture sync received
REM -----------------------------------------------------------------
IF !PicOset | (FASTPOS.1 - PicPls < PackEnc * .75) THEN RETURN
PackEnc = PackEnc + ((FP.1-PicPls+PackEnc*.5)%PackEnc-PackEnc*.5) * PicGn
IF PackEnc > PackMax THEN PackEnc = PackMax
PackR = PackEnc / InRev
cam1(2) = INT(PackEnc / FinSect)
PicPls = FASTPOS.1
RETURN
What that is doing is dynamically recalibrating the nominal motion pack length, PackEnc, to match the measured distance between printed images on the wrapping, FASTPOS.1 - PicPls.
But to make that work as circular arithmetic requires to wrap (pun ) the measured distance to the existing pack length first. That's the modulo'd part, (..)%PackEnc. Just like masking a word size.
More detail on the SINCn would be appreciated...
I tried to use filtering modes but got nonsense...
Also, it's not clear whether or not one must retrieve a sample when in goes high.
You don't need to do this with the sampling SINC2 mode.
Maybe this is what I did wrong as I was just grabbing a value once per second...
@Rayman said:
More detail on the SINCn would be appreciated...
I tried to use filtering modes but got nonsense...
Also, it's not clear whether or not one must retrieve a sample when in goes high.
You don't need to do this with the sampling SINC2 mode.
Maybe this is what I did wrong as I was just grabbing a value once per second...
You need to handle each sample, otherwise you'll lose track of the ongoing measurements.
@Rayman said:
Can I take, say, 5 samples in a row and then just use the last one as the result?
No, the syncN filters need to process all 5 samples. You can store the 5 values in an array an process them all together after 5 samples, but the sync filters only work if every value is taken into account.
With Sync2 Sampling, the smartpin hardware does this for you, that's why you can read the ADC result whenever you want in this mode.
Comments
Remember the trails you plotted for every pin for VIO vs GIO calibration?
Some have a slope, but some are more point stable with respect to temperature
First thing I've noted is VIO level readings are more stable than GIO level readings so I've ignored GIO altogether.
EDIT: I guess, in the end, the biggest issue will simply be calibrating an absolute reference temperature. Each prop2 part I run this on will likely have a relatively large offset to other prop2s.
I also noticed that VIO was more stable than the GIO in the calibration readings
The VIO and GIO are somewhat correlated, and its the 'low' values which seem to have the most appropriate (more linear) temperature slopes ripe for exploit. So perhaps a strategy of choosing a pin with lowest or near lowest VIO calibration value then watching that pin for excursions could work
Comparing the two sources, they have the same varied DC levels numerically. Where a particular pin's GIO has as a relatively low reading, then so does that pin input when driven low with that pin's 20 ohm output drive. Likewise for VIO vs high output.
The measurement method is slow. I wait 250 microseconds with the ADC operating and smartpin in Sinc2 Filter mode. This provides a warm-up for the ADC hardware as per Chip's recommendations. Then take 20 consecutive samples, discarding the first four to fill the "diff" variables, and use the remaining 16 samples for that pin's reading. I'm operating at 10 MHz sysclock, for the moment, and each sample is 11585 clocks. So that's a measurement duration of 1.1585 x 16 = 18.536 ms for each source.
I conclude the source select resistors are not the reason for differences between pins.
PS: Also, the difference of VIO - GIO verses pin high - pin low also track each other well on a per pin basis.
I should build a binary for others to gather reports and post them here ...
I've just added this info about 32-bit vs 27-bit summing rollover to the silicon document as a suggestion. It needs vetted for viewing/printing still.
[bah, testing wrong code]
Nothing to see this time
Evanh, thanks. I've been looking at your comments in the doc, trying to fully understand the ramifications of this. It would seem just the MSBs would be bad, but is there more to it? I ask because I remember this coming up a while back, and there seemed to be more to it.
Just the 5 most significant bits (for a 27-bit to 32-bit translation). I had thought it was worse at the very start but that was quickly narrowed down, thanks to Ariba, to just a rollover problem affecting the extended bits only.
I've now even done a mock example on paper, just doing a regular spaced summing using 3-bit to 4-bit, and get the same effect of the extended bit toggling.
Can't this whole thing be solved by ignoring the top 5 MSBs of the final result?
That's effectively what both options achieve - Removal of those extra bits so they won't mess up anything later. Ie: You don't want those extraneous bits present when further filtering, or scaling, or even a simple print.
If not documented, it'll catch a lot of people out. Sure had me for a while. It's actually a generic binary maths thing but just one I've not dealt with until now surprisingly.
Maybe the documenting around it could be written more that way. That here's two simple solutions to translating between circular integer word sizes.
Actually, in hindsight, I have dealt with this before but it was couched within some servo hardware where I had to derive the encoder count from its error counter. This was all in C also. The error counter was 13 bits wide and so I used a bunch of masking to handle the translation to 32-bit. Didn't even think how relevant that might be to other situations. EDIT: On the other hand, the error counter wasn't circular in nature, even if the encoder was.
I'm looking at my Verilog source code and I put in comments that those bits would always be zeroes. Weird.
Does this affect SINC2 conversion mode or just SINC2/SINC3 raw modes?
It's not a smartpin problem at all. It's just the nature of circular maths arithmetic when mixing different word sizes. Ie: It's just in the software summing, the ADD and SUB.
Here's the 3-bit to 4-bit hand written paper version copied of the non-corrected software. It is simulating a fixed internal increase of 5 per decimation from the RDPIN:
The middle "sample" is the resulting "x". It holds the apparent glitching ADC reading that still needs masked back to 3 bits.
Of note is the slightly surprising stored 4-bit copy of the decimation always fits in 3 bits. ie: The restoring addition cancels the glitch.
It's amusing reading my evolving understanding. I wasn't fully on to real issue for quite some time. And even when I did get it completely I didn't post a clarification until now.
What I failed to do was print the suscessive components, as per above, in my early testing. I didn't know that RDPIN was producing a clean 27 bits. I guess I didn't know it was meant to be 27-bit either to be fair.
So, the 5 MSBs really are zeros?
For the RDPIN, yes.
Not for the resulting post-diff'd sample. Read my simulated example above (I've fleshed it out a little more). It shows the resulting diff'd "sample" as containing extraneous high-order bits. It should be consecutive 5's but has sporadic 13's in there. If using an &7 to mask it, it would be all 5's.
PS: I've been trying to make it clear that it's just a word size conversion issue in the software. The extra instruction is needed as part of doing circular arithmetic and bridging between word sizes.
EDIT: Actually, it's not even about bridging. It's just managing circular arithmetic at a non-native word size. The other method of scaling with a SHL converts to native word size and therefore doesn't need further masking.
I understand now. Thanks for explaining this, Evanh. I think what we need is a table to show SHR and ZEROX values to be used to trim each sample size.
Cool. My editing in the Google Doc was looking messy anyway. Suggestion mode leaves a trail of overlapping edits. Best to prep it elsewhere then do a single paste.
Chip,
In your updating, please do make it clear that the RDPIN decimations are 27-bit wide. Not knowing that ahead of troubleshooting definitely slowed down diagnosing of this issue.
PS: This whole issue has a lot of commonality with motion control on rotary equipment. I did tons of this stuff more than a couple decades back. Certainly wasn't expecting this conclusion when I starting problem solving this - an ADC in a microcontroller.
Here's a little piece of BASIC code from the servo controller of the first two wrapping machines, last updated in 1998. I don't think I could do this now. I loved the work at the time but it was strenuous thinking all the time. There was very limited memory in the servo controller and all source was on board so comments had to be small. It was kind of cool because you could pop open a dumb terminal and edit the whole program with that. It tokenised upon RUN.
What that is doing is dynamically recalibrating the nominal motion pack length, PackEnc, to match the measured distance between printed images on the wrapping, FASTPOS.1 - PicPls.
But to make that work as circular arithmetic requires to wrap (pun ) the measured distance to the existing pack length first. That's the modulo'd part, (..)%PackEnc. Just like masking a word size.
Super! I will update the doc today.
More detail on the SINCn would be appreciated...
I tried to use filtering modes but got nonsense...
Also, it's not clear whether or not one must retrieve a sample when in goes high.
You don't need to do this with the sampling SINC2 mode.
Maybe this is what I did wrong as I was just grabbing a value once per second...
You need to handle each sample, otherwise you'll lose track of the ongoing measurements.
Can I take, say, 5 samples in a row and then just use the last one as the result?
No, the syncN filters need to process all 5 samples. You can store the 5 values in an array an process them all together after 5 samples, but the sync filters only work if every value is taken into account.
With Sync2 Sampling, the smartpin hardware does this for you, that's why you can read the ADC result whenever you want in this mode.
Andy
Ok, I see this is more complicated than I thought... Guess I need to look at the code examples...