Propeller 2 GPIO Pin low level control and parrent pins
calm
Posts: 3
in Propeller 2
Hi,
for the P2 the smart pin even in pure input and output as digital one has a lot of options and raises also a few questions.
First:
I can use the pin configuration to swith a pin as input and do logic combinations with a parent pin ( + / - 3 ) . If i use pin 0 and set the B pair to be -1 will it be pin 63, meaning do we a wrapp around 63 / 0 or will it be within one pingroup ?
Second:
For the low level manipulation i can set pull up and pull down resistor values between 1.5k and float. What will the setting FAST do ? Faster level transition ( meaning faster fall and rise time ? )
Third:
If i set the pin to be digital input / output and set the bits for DAC mode, will those be ignored? And what bits will be used for the digital part?
This are just the first three that make teh most questionmarks, sure more to follow. Generic question: Is there somewhere a Q'n'A dedicated to the smart pins ?
Best Regards
CalM
for the P2 the smart pin even in pure input and output as digital one has a lot of options and raises also a few questions.
First:
I can use the pin configuration to swith a pin as input and do logic combinations with a parent pin ( + / - 3 ) . If i use pin 0 and set the B pair to be -1 will it be pin 63, meaning do we a wrapp around 63 / 0 or will it be within one pingroup ?
Second:
For the low level manipulation i can set pull up and pull down resistor values between 1.5k and float. What will the setting FAST do ? Faster level transition ( meaning faster fall and rise time ? )
Third:
If i set the pin to be digital input / output and set the bits for DAC mode, will those be ignored? And what bits will be used for the digital part?
This are just the first three that make teh most questionmarks, sure more to follow. Generic question: Is there somewhere a Q'n'A dedicated to the smart pins ?
Best Regards
CalM
Comments
1. Yes the pins wrap, Ozprop makes use of this with MicroPython to redirect serial
2. "Fast" is the strongest drive available, the driving fet has a resistance of around 19 ohms
3. What are you aiming to do here? Or are you just trying to understand what is in control?
A pin can be in either traditional digital output mode (with one of the 8 "drive strengths" for each of high and low state), or it can be outputting a DAC voltage (with 75/123/600/990 ohm source impedance). However there is also a 'bitdac' mode, where the digital output signal is translated into configurable high and low voltage levels. This bitdac mode might be useful for talking to 1v8 logic, for instance. Because it uses the DACs (min 75 ohms), its not quite as fast as the 19 ohm digital output drive
If you've not already encountered it, this link may be of use regarding Smartpins. John Titus has done a lot of work describing them.
https://drive.google.com/file/d/1iTA4dwbntgaUVnpt0-9pDcFCVSsvCUnU/view?usp=sharing
for the WRPIN command i need to calculate the equvalent bits. As the low level control also applies using the pin as input and the table for the lowlevel control bits P12..0 is also in the linked document described as "difficult to read" i just try to understand what evil things will happen if messing arround with those bits. E.g. using a pin as input and configuring the pin as input with pullup should be possible using the 1.5k drive and set the corresponding output to high ?
Also that would mean if i use "fast" i will have a 19R "pull-up" or "pull-down" reseistor ?
The given table is a bit confusing when it comes to allowed bit combinations and functions. Also it currently is not telling if combinations are not allowed in certain usecase.
Best Regards
CalM
Also, inputting is always active. When a pin is used for output it still can be read as an input at the same time.
I rewrote the low level mode list in what I thought was a more readable form - https://forums.parallax.com/discussion/comment/1452036/#Comment_1452036
And Rayman did a straight copy, of Chip's blue sheet, to DTP page layout - https://forums.parallax.com/discussion/171420/smartpin-diagram-now-with-p-p-bit-mode-table/p1
Okay that helps a bit better to understand what is the chip doing internally.
Best Regards
CalM
There is details hidden in many of the blocks but there is plenty still to glean from it. I made a number of corrections to my block diagram after Chip posted that.