As I mentioned earlier I'd like one with all the options. I am in the US so would like to be part of the group buy @Publison.
Just let me know where to send payment and official order.
Thank you all for your support, I can see that these orders plus bulk orders means my first run of 50 are well and truly committed and I will have to do another run immediately afterwards. If you haven't mentioned your country could you edit your posts or pm me so I can work out how best to consolidate shipping and packaging to keep these costs low.
I've looked at the costings which I still need to finalize but I think that I will make the Flash a 4MB device instead with the Winbond W25Q32JVSSIQ for just 15 cents more or so. I just need to order these as long as they don't hold up shipping P2D2s otherwise I ship them with the 1MB W25Q80.
Also standard except for special orders will be the RV-3028 RTC with the tiny supercap even if it does add a few dollars extra and it is so useful.
With the Si5351A-B I have a preprogrammed part that I thought would output 25MHz on power-up but that's incorrect so I decided I would just use the blank devices and program the OTP via I2C using the TAQOZ ROM but apparently isn't possible as this can only be done in the factory!!. However the EFM can load it up at power-up with reset held and perhaps I could just set the output frequency to 20MHz then for compatibility. My plan B is to leave off the resistor link that couples this chip to the P2 and use a 25MHz direct.
Left to do in the meantime is to make sure the EFM chip works properly otherwise for my plan B I have the CP2102N which handles USB serial up to 3M baud although there is no DTR style reset from that chip. BTW, I always do a manual reset with the P2 since I never like the idea of the coms link resetting the Prop which may be fine on the test bench, but never in a working product.
The first post will be updated with this information which also has the pcb layouts added for reference.
I would have expected that Si5351A-B04486-GT to output 24MHz on CLK1 at power up, from 25MHz Xtal, (or 24.960MHz from 26MHz source)
but I think you say that does not happen ?
addit: I did find this in a Silabs Forum Silabs: "You could also try to find a factory pre-programmed Si5351 that is not exactly what you desire but still generates some kind of compatible clock on the outputs at power-up, then have an MCU write the actual desired configuration via I2C." which certainly sounds like pre-programmed parts are designed to power-up active/preset, as one would expect ?
Left to do in the meantime is to make sure the EFM chip works properly otherwise for my plan B I have the CP2102N which handles USB serial up to 3M baud although there is no DTR style reset from that chip. BTW, I always do a manual reset with the P2 since I never like the idea of the coms link resetting the Prop which may be fine on the test bench, but never in a working product.
Having the serial DTR reset is handy for people who may want to automate things or be just able to type "make run" to download etc. It also means you don't have to have an accessible reset switch nearby or need to yank power each time. Though I do understand that not all USB serial transceivers support DTR. Hopefully you'll get it going with some DTR support (which chip doesn't support DTR, EFM or CP2102N?). RTS reset is another way, but that needs further software support to get it to work in different tools etc.
In my particular case I think I'll probably have another micro on my own motherboard that pulses reset and acts as the external USB serial port and also as some type of Wifi serial mux for future wireless downloading should that one day become possible, so DTR reset is not critical but it is a very nice thing to have.
Having the serial DTR reset is handy for people who may want to automate things or be just able to type "make run" to download etc. It also means you don't have to have an accessible reset switch nearby or need to yank power each time. Though I do understand that not all USB serial transceivers support DTR. Hopefully you'll get it going with some DTR support (which chip doesn't support DTR, EFM or CP2102N?). RTS reset is another way, but that needs further software support to get it to work in different tools etc.
In my particular case I think I'll probably have another micro on my own motherboard that pulses reset and acts as the external USB serial port and also as some type of Wifi serial mux for future wireless downloading should that one day become possible, so DTR reset is not critical but it is a very nice thing to have.
The EFM8UB3 code I gave Peter, manages a DTR -> Pin13 Pulse for 100us reset so that should work as you hope.
Checking CP2102N, I see it has less IO in the QFN20 package, so drops DTR but it does have RTS/CTS pins.
The DTR reset is pretty important when working with the onboard bootable Flash EEPROM. The 100 ms timeout isn't very practical without the downloader software automating it.
PS: I'm assuming the P2D2 has this boot medium as an option.
Flash is stock standard. I only mentioned the lack of DTR on the CP2102N option. I need to customise the EFM firmware to generate smart reset pulses.
As for the clock while there are preprogrammed parts I think I want to use 20MHz output as standard now rather than some oddball frequency. This entails having the EFM load it via i2c during reset.
As for the clock while there are preprogrammed parts I think I want to use 20MHz output as standard now rather than some oddball frequency. This entails having the EFM load it via i2c during reset.
As best I can tell, Digikey indicate a MOQ of 50 on the custom-code Si5351A variants. ($0.88140/50) That's quite low MOQ.
My notes have these listed :
Si5351A-B02075-GT Crystal Frequency: 27 MHz Internal Load Capacitance (CL): 10pF I2C Address = 0x6F
CLK0 = 24.576 MHz, Reference = Crystal
CLK1 = OFF
CLK2 = OFF
Si5351A-B04486-GT Crystal Frequency (MHz): 25.000000000 Internal Load Capacitance (pF): 10 Default I2C address: 0x62 << well stocked choice. Now in P2D2(pi)
Output Clock Configuration:
CLK0 (MHz): 49.152000000 from PLLA
CLK1 (MHz): 24.000000000 from PLLB
CLK2 (MHz): 45.158400000 from PLLB
Si5351A-B04943-GT Crystal Frequency (MHz): 25.000000000 Internal Load Capacitance (pF): 10 SSC: Disabled Default I2C address: 0x60
CLK0 (MHz): Disabled
CLK1 (MHz): 24.000000000 from PLLA
CLK2 (MHz): Disabled
Si5351A-B04146-GT Crystal Frequency (MHz): 25.000000000 Internal Load Capacitance (pF): 10 SSC: Disabled Default I2C address: 0x60
CLK0 (MHz): 20.000000000 from PLLA
CLK1 (MHz): Disabled
CLK2 (MHz): Disabled
Si5351A-B05830-GT Crystal Frequency (MHz): 27.000000000 Internal Load Capacitance (pF): 10 SSC: Disabled Default I2C address: 0x60
CLK0 (MHz): 24.000000000 from PLLA
Si5351A-B05565-GT Crystal Frequency (MHz): 27.000000000 Internal Load Capacitance (pF): 10 SSC: Disabled Default I2C address: 0x60
CLK0 (MHz): 27.000000000 from PLLA
CLK1 (MHz): Disabled
CLK2 (MHz): Disabled
I think you can generate custom order codes yourself, so I'll try that tomorrow.
A good idea could be to default to Xtal pass thru so CLK1 has the Xtal directly, and that would operate the same as Eval-B, and not need i2c config.
I'll see what that gives.
I would like to have 3 of them, but can wait for the second batch.
As for reset, my opinion since YEARS is that ALL boards should have a jumper to disable reset from serial for use in production.
Parallax decision to add USB to all boards is wrong, one looses the pins and, heck, it is just unneeded expense, ONE PropPlug can program a lot of boards, they do not need a USB on their own.
Luckily I hoarded those 10-Pack Proto boards without USB, but slowly I run out of them.
@jmg - I had trouble finding information on those custom parts but those 04486 ones would be usable with a 24MHz output I guess which can be changed after boot.
So now I'm ordering those 24MHz clocks along with even more Flash memory, the 16MB W25Q128JVSIM since DIgikey have these in stock at a good price along with the Si5351A-B04486 variant. Is a clock gen + crystal really needed vs just a crystal? I don't know, but for the low cost and flexibility of this approach we should never have to worry about the "best crystal frequency" for an application.
I have an RTC option on the pcb for a tiny button 220mF supercap in place of the 11mF cap. But I would use one or the other for a standard stock P2D2, but which one? This is the spec for the larger cap.
My P2 chips should be on my doorstep today so I will make up a pcb and I will have to use a Si5351A-B02075-GT for testing which should yield a 22.7555MHz clock with the 25MHz crystal (I just need to short CLK0 to CLK1). Before then I will test out the code for the EFM chip that jmg sent me which I hadn't tested yet due to some Silab tool problems. Since I need to order more pcbs I will hold off long enough to check for last minute changes and incorporate them if necessary.
I will also try to release details of my P2D2-DEV pcb that also has dual mikroBUS footprints on it. The whole board is designed to be used stand-alone or dropped into a readily available ABS enclosure ready for some industrial use along with combicon screw terminals etc.
A quick feature list of the P2D2-DEV is:
* P2D2 header pins (Module plugs in flipped)
* 5" x 3" PCB
* 7..24VDC input
* Dual mikroBUS
* Servo headers
* HDMI + VGA on dual pin-header
* Full size SD
* IoT5500 Ethernet
* 10-way Combicon screw terminal header to internal module pin headers (variety of power and I/O modules)
* Dual USB-A
* Dual 3.5mm TRS audio
* JAMMA edge connector (break-away if not required)
* Dual 40-pin header straddling the P2D2 (testing, jumpers, or stacked module)
* Edge mounted 40-pin I/O header
* Bottom mounted fan option
* LEDs
* Power and Reset switch
What am I missing?
I think you can generate custom order codes yourself, so I'll try that tomorrow.
A good idea could be to default to Xtal pass thru so CLK1 has the Xtal directly, and that would operate the same as Eval-B, and not need i2c config.
I'll see what that gives.
Further to this, I was thinking that a simplest register map could be used to just enable the XTAL to a CLKn pin, with a few bytes over i2c.
That avoids any jitter that may be added in Si5351A, and is closest to a Xtal-Osc (so is most like Parallax Eval B board )
Data says this
Register 15. PLL Input Source [ CLKIN_DIV[1:0] PLLB_SRC PLLA_SRC ]
7:6 CLKIN_DIV[1:0]
ClKIN Input Divider.
Valid PLL input range is 10-40 MHz. If CLKIN is > 40 MHz, CLKIN input divider,
CLKIN_DIV, must be used to bring the PLL input within the 10-40 MHz range.
00b: Divide by 1.
01b: Divide by 2.
10b: Divide by 4.
11b: Divide by 8.
5:4 Reserved Leave as default.
3 PLLB_SRC Input Source Select for PLLB.
0: Select the XTAL input as the reference clock for PLLB.
1: Select the CLKIN input as the reference clock for PLLB (Si5351C only). << can pick this to fix Si5351A SW bug, then change Reg15 to XTAL source.
2 PLLA_SRC Input Source Select for PLLA.
0: Select the XTAL input as the reference clock for PLLA.
1: Select the CLKIN input as the reference clock for PLLA (Si5351C only).
1:0 Reserved Leave as default.
Register 17 (CLK1)
3:2 CLK1_SRC[1:0] Output Clock 1 Input Source.
These bits determine the input source for CLK1.
00: Select the XTAL as the clock source for CLK1. This option by-passes both synthesis << Direct pass-thru
stages (PLL/VCXO & MultiSynth) and connects CLK1 directly to the oscillator which
generates an output frequency determined by the XTAL frequency.
01: Select CLKIN as the clock source for CLK1. This by-passes both synthesis stages
(PLL/VCXO & MultiSynth) and connects CLK1 directly to the CLKIN input. This essentially
creates a buffered output of the CLKIN input.
10: Select Multisynth 0 as the source for CLK1.
11: Select MultiSynth 1 as the source for CLK1. Select this option when using the Si5351 to generate free-running or synchronous clocks. << seems default on unused channels.
So I tried this, on an Adafruit Board, starting with a full config that asks for 24.5MHz out = working.
Next, I flipped just the XTAL -> CLK1 bits, and that changes CLK1, but drops to no-output, instead of the expected Xtal OUT ? Bummer....
Q: Has anyone successfully had Si5351A output XTAL to a CLKn (on MSOP10 package) ? Google suggests that can be done ?
@jmg - I had trouble finding information on those custom parts but those 04486 ones would be usable with a 24MHz output I guess which can be changed after boot.
So now I'm ordering those 24MHz clocks along with even more Flash memory, the 16MB W25Q128JVSIM since DIgikey have these in stock at a good price along with the Si5351A-B04486 variant. Is a clock gen + crystal really needed vs just a crystal? I don't know, but for the low cost and flexibility of this approach we should never have to worry about the "best crystal frequency" for an application.
Yes, the Si5351A is low cost and comes almost-for-free-option, as it does not increase the PCB dimensions.
I'm looking into workarounds to allow wider MHz choices on XTALs, still using SiLabs Clockbuilder tools.
eg 26MHz has appeal, as here is a 10ppm Xtal for 4.8c/500+ (and that can upgrade to the GPS TCXOs) Murata have XRCGB26M000F1Hxx series in smaller 2.0 x 1.6mm packages ±10ppm, but ~ 25c/3k
On a development board, such flexible clock sources are great, as they allow users to test almost anything, without needing to remove parts & chase rare ones...
It also gives a nice 'second opinion' for any possible P2 PLL jitter issues (tho ES2 is better there than ES1 )
My P2 chips should be on my doorstep today so I will make up a pcb and I will have to use a Si5351A-B02075-GT for testing which should yield a 22.7555MHz clock with the 25MHz crystal (I just need to short CLK0 to CLK1). Before then I will test out the code for the EFM chip that jmg sent me which I hadn't tested yet due to some Silab tool problems.
The UB3 parts also have a boot loader, so have two choices for pgm - either C2D BUS, or HID loader using SiLabs loader.
Pull the C2D pin low at reset to invoke the loader.
Since I need to order more pcbs I will hold off long enough to check for last minute changes and incorporate them if necessary.
Do you have a pullup on UB3.RST ? I added one as Silabs suggest 1K, on that and also on CP2102N, I think to ensure any injected noise to be narrow enough to be shorter than the internal noise filter.
As for the clock while there are preprogrammed parts I think I want to use 20MHz output as standard now rather than some oddball frequency. This entails having the EFM load it via i2c during reset.
As best I can tell, Digikey indicate a MOQ of 50 on the custom-code Si5351A variants. ($0.88140/50) That's quite low MOQ.
Its a shame that this was removed from the latest datasheet:
4. Configuring the Si5351
...
A development kit supports field programming which allows writing a custom configuration directly to the NVM.
Since NVM is an OTP memory, it can only be written once. The default configuration is always re-configurable by
writing to RAM through the I2C interface after power up.
There is no way to modify the Si5351 NVM outside of the Silicon Labs manufacturing process, however you can create a custom NVM configuration using the Clock Builder software and Silicon Labs will manufacture custom Si5351 parts for you at no extra charge.
As for the dev board that this can plug into I have a request to incorporate mikroBUS connections so I don't see a problem with that either. Same goes for PMOD P2 eval accessory kit boards.
Many of the common interfaces will be incorporated on the dev board as standard without the need to plug in sometimes awkward modules.
Comments
Just let me know where to send payment and official order.
Thanks!
I've looked at the costings which I still need to finalize but I think that I will make the Flash a 4MB device instead with the Winbond W25Q32JVSSIQ for just 15 cents more or so. I just need to order these as long as they don't hold up shipping P2D2s otherwise I ship them with the 1MB W25Q80.
Also standard except for special orders will be the RV-3028 RTC with the tiny supercap even if it does add a few dollars extra and it is so useful.
With the Si5351A-B I have a preprogrammed part that I thought would output 25MHz on power-up but that's incorrect so I decided I would just use the blank devices and program the OTP via I2C using the TAQOZ ROM but apparently isn't possible as this can only be done in the factory!!. However the EFM can load it up at power-up with reset held and perhaps I could just set the output frequency to 20MHz then for compatibility. My plan B is to leave off the resistor link that couples this chip to the P2 and use a 25MHz direct.
Left to do in the meantime is to make sure the EFM chip works properly otherwise for my plan B I have the CP2102N which handles USB serial up to 3M baud although there is no DTR style reset from that chip. BTW, I always do a manual reset with the P2 since I never like the idea of the coms link resetting the Prop which may be fine on the test bench, but never in a working product.
The first post will be updated with this information which also has the pcb layouts added for reference.
Google finds this thread, which I think is a Si5351A part code we talked about ? Here they use it on a XC board ?
https://www.xcore.com/viewtopic.php?t=4599&start=10
I would have expected that Si5351A-B04486-GT to output 24MHz on CLK1 at power up, from 25MHz Xtal, (or 24.960MHz from 26MHz source)
but I think you say that does not happen ?
addit: I did find this in a Silabs Forum
Silabs: "You could also try to find a factory pre-programmed Si5351 that is not exactly what you desire but still generates some kind of compatible clock on the outputs at power-up, then have an MCU write the actual desired configuration via I2C." which certainly sounds like pre-programmed parts are designed to power-up active/preset, as one would expect ?
Having the serial DTR reset is handy for people who may want to automate things or be just able to type "make run" to download etc. It also means you don't have to have an accessible reset switch nearby or need to yank power each time. Though I do understand that not all USB serial transceivers support DTR. Hopefully you'll get it going with some DTR support (which chip doesn't support DTR, EFM or CP2102N?). RTS reset is another way, but that needs further software support to get it to work in different tools etc.
In my particular case I think I'll probably have another micro on my own motherboard that pulses reset and acts as the external USB serial port and also as some type of Wifi serial mux for future wireless downloading should that one day become possible, so DTR reset is not critical but it is a very nice thing to have.
The EFM8UB3 code I gave Peter, manages a DTR -> Pin13 Pulse for 100us reset so that should work as you hope.
Checking CP2102N, I see it has less IO in the QFN20 package, so drops DTR but it does have RTS/CTS pins.
PS: I'm assuming the P2D2 has this boot medium as an option.
As for the clock while there are preprogrammed parts I think I want to use 20MHz output as standard now rather than some oddball frequency. This entails having the EFM load it via i2c during reset.
As best I can tell, Digikey indicate a MOQ of 50 on the custom-code Si5351A variants. ($0.88140/50) That's quite low MOQ.
My notes have these listed :
I think you can generate custom order codes yourself, so I'll try that tomorrow.
A good idea could be to default to Xtal pass thru so CLK1 has the Xtal directly, and that would operate the same as Eval-B, and not need i2c config.
I'll see what that gives.
Wait, what, did I miss something?
Click module support?
What is the price range on those boards?
Kind regards, Samuel Lourenço
I believe the design is locked. No talk of RPi or microBUS on the current board. Others are designing new boards with that in mind.
I'd also like one board, whatever reaches the black forest
As for reset, my opinion since YEARS is that ALL boards should have a jumper to disable reset from serial for use in production.
Parallax decision to add USB to all boards is wrong, one looses the pins and, heck, it is just unneeded expense, ONE PropPlug can program a lot of boards, they do not need a USB on their own.
Luckily I hoarded those 10-Pack Proto boards without USB, but slowly I run out of them.
Mike
Seconded! Anyone who uses Linux knows the problems of having serial ports initiate a reset (usually via DTR).
This should be configurable!
Ross.
So now I'm ordering those 24MHz clocks along with even more Flash memory, the 16MB W25Q128JVSIM since DIgikey have these in stock at a good price along with the Si5351A-B04486 variant. Is a clock gen + crystal really needed vs just a crystal? I don't know, but for the low cost and flexibility of this approach we should never have to worry about the "best crystal frequency" for an application.
I have an RTC option on the pcb for a tiny button 220mF supercap in place of the 11mF cap. But I would use one or the other for a standard stock P2D2, but which one? This is the spec for the larger cap.
My P2 chips should be on my doorstep today so I will make up a pcb and I will have to use a Si5351A-B02075-GT for testing which should yield a 22.7555MHz clock with the 25MHz crystal (I just need to short CLK0 to CLK1). Before then I will test out the code for the EFM chip that jmg sent me which I hadn't tested yet due to some Silab tool problems. Since I need to order more pcbs I will hold off long enough to check for last minute changes and incorporate them if necessary.
I will also try to release details of my P2D2-DEV pcb that also has dual mikroBUS footprints on it. The whole board is designed to be used stand-alone or dropped into a readily available ABS enclosure ready for some industrial use along with combicon screw terminals etc.
A quick feature list of the P2D2-DEV is:
* P2D2 header pins (Module plugs in flipped)
* 5" x 3" PCB
* 7..24VDC input
* Dual mikroBUS
* Servo headers
* HDMI + VGA on dual pin-header
* Full size SD
* IoT5500 Ethernet
* 10-way Combicon screw terminal header to internal module pin headers (variety of power and I/O modules)
* Dual USB-A
* Dual 3.5mm TRS audio
* JAMMA edge connector (break-away if not required)
* Dual 40-pin header straddling the P2D2 (testing, jumpers, or stacked module)
* Edge mounted 40-pin I/O header
* Bottom mounted fan option
* LEDs
* Power and Reset switch
What am I missing?
Further to this, I was thinking that a simplest register map could be used to just enable the XTAL to a CLKn pin, with a few bytes over i2c.
That avoids any jitter that may be added in Si5351A, and is closest to a Xtal-Osc (so is most like Parallax Eval B board )
Data says this
Register 15. PLL Input Source [ CLKIN_DIV[1:0] PLLB_SRC PLLA_SRC ] 7:6 CLKIN_DIV[1:0] ClKIN Input Divider. Valid PLL input range is 10-40 MHz. If CLKIN is > 40 MHz, CLKIN input divider, CLKIN_DIV, must be used to bring the PLL input within the 10-40 MHz range. 00b: Divide by 1. 01b: Divide by 2. 10b: Divide by 4. 11b: Divide by 8. 5:4 Reserved Leave as default. 3 PLLB_SRC Input Source Select for PLLB. 0: Select the XTAL input as the reference clock for PLLB. 1: Select the CLKIN input as the reference clock for PLLB (Si5351C only). << can pick this to fix Si5351A SW bug, then change Reg15 to XTAL source. 2 PLLA_SRC Input Source Select for PLLA. 0: Select the XTAL input as the reference clock for PLLA. 1: Select the CLKIN input as the reference clock for PLLA (Si5351C only). 1:0 Reserved Leave as default. Register 17 (CLK1) 3:2 CLK1_SRC[1:0] Output Clock 1 Input Source. These bits determine the input source for CLK1. 00: Select the XTAL as the clock source for CLK1. This option by-passes both synthesis << Direct pass-thru stages (PLL/VCXO & MultiSynth) and connects CLK1 directly to the oscillator which generates an output frequency determined by the XTAL frequency. 01: Select CLKIN as the clock source for CLK1. This by-passes both synthesis stages (PLL/VCXO & MultiSynth) and connects CLK1 directly to the CLKIN input. This essentially creates a buffered output of the CLKIN input. 10: Select Multisynth 0 as the source for CLK1. 11: Select MultiSynth 1 as the source for CLK1. Select this option when using the Si5351 to generate free-running or synchronous clocks. << seems default on unused channels.So I tried this, on an Adafruit Board, starting with a full config that asks for 24.5MHz out = working.
Next, I flipped just the XTAL -> CLK1 bits, and that changes CLK1, but drops to no-output, instead of the expected Xtal OUT ? Bummer....
Q: Has anyone successfully had Si5351A output XTAL to a CLKn (on MSOP10 package) ? Google suggests that can be done ?
I'm looking into workarounds to allow wider MHz choices on XTALs, still using SiLabs Clockbuilder tools.
eg 26MHz has appeal, as here is a 10ppm Xtal for 4.8c/500+ (and that can upgrade to the GPS TCXOs) Murata have XRCGB26M000F1Hxx series in smaller 2.0 x 1.6mm packages ±10ppm, but ~ 25c/3k
On a development board, such flexible clock sources are great, as they allow users to test almost anything, without needing to remove parts & chase rare ones...
It also gives a nice 'second opinion' for any possible P2 PLL jitter issues (tho ES2 is better there than ES1
The UB3 parts also have a boot loader, so have two choices for pgm - either C2D BUS, or HID loader using SiLabs loader.
Pull the C2D pin low at reset to invoke the loader.
Do you have a pullup on UB3.RST ? I added one as Silabs suggest 1K, on that and also on CP2102N, I think to ensure any injected noise to be narrow enough to be shorter than the internal noise filter.
Now that's a pretty picture!
Its a shame that this was removed from the latest datasheet: ... but then on their forum SiLabs wrote this a few years ago:
As I have understood Peter's DevBoard is not designed yet .... or at least not built (I mean the PCB).
https://forums.parallax.com/discussion/comment/1480547/#Comment_1480547
I've started a new thread for Si5351 here, maybe moderators can move any Si5351 comments from this order-thread to reduce clutter.
I'm on Tennessee, one of several united States.
I *definitely* want a max’d out board. Pretty please. Texas, USA here.