Clarification on P2 OpCode Identification.

cgracey

__red__ wrote: »

I think this is a mistake in the instructions_v??.txt in the fpga package.

EEEE 1101011 00L DDDDDDDDD 000000111        LOCKREL D/#         {WC}

We can't check for C if we mandate that C is zero? right?

Did you look at the Google doc section that covers the LOCK bits? I can't remember what the deal is, exactly, but it's in that section. I believe it all makes sense.

ozpropdev

Should be

EEEE 1101011 C0L DDDDDDDDD 000000111        LOCKREL D/#         {WC}

cgracey

ozpropdev wrote: »

Should be

EEEE 1101011 C0L DDDDDDDDD 000000111        LOCKREL D/#         {WC}

Ah, sorry. I will fix that.

__red__

EEEE 1101011 00L DDDDDDDDD 000110101        COGBRK  D

Ignore the L or is D/# valid?

__red__

nm, found it in the docs. Also needs to be updated in the TXT file.
(I was automatically generating disassembly code from the TXT file hence why I was focused on that doc specifically).

cgracey

__red__ wrote: »

EEEE 1101011 00L DDDDDDDDD 000110101        COGBRK  D

Ignore the L or is D/# valid?

It should be D/#.

TonyB_

Re minor corrections, in the spreadsheet XORO32 D comment should be "Iterate D with xoroshiro32++ ..."