So P2 doesn't have any brownout itself then? We were spoilt with the simplicity of the P1 then. A simple 3.3V supply and some systems only had a single decoupling cap too.
So P2 doesn't have any brownout itself then? We were spoilt with the simplicity of the P1 then. A simple 3.3V supply and some systems only had a single decoupling cap too.
A brown out requires a band gap, which really requires trimming to work properly. I just didn't have time to mess with either of those things. So, I figured we could use an external part. It may be, these days, that the regulators, themselves, contain some power good signal which could be used.
Those supervisory type chips aren't cheap! It's easier to use a small micro like the PIC that I'm using on the revision H to detect the brownout against its own 1.024V reference and then to release the output that is driving the P2 reset high, in which case a pulldown on the reset instead of a pullup guarantees that the P2 stays in reset until the PIC is up and ready. I can detect 3.3V brownouts now and the chip has its own brownout reset but I could tie an analog pin to the 1.8V rail and monitor that too. Once I get those P2 chips I can confirm brownout operation with this chip on the existing board. I know there are regs that have brownout but that severely limits our choices and I do like those XCL220 parts or straight LDOs.
Have you got a brownout detection part in mind, Chip?
No. I know nothing, other than the VDD detector should trigger at 1.60V and the one for VIO should trigger at 3.0V.
There are regulators that include a P Good, and the advantage of an in-regulator solution are
* It adjusts with the Trim resistors, so (experienced) users can experiment with minor voltage changes, just with R adjs
* Reduces the BOM
Jmg, having open-collector brownout detectors on both VIO and VDD supplies to pull down on RESn is a really good idea. RESn also needs a pull-up resistor to VIO and a pushbutton to GND.
..and maybe a LED on RESn=low to show a reset, to alert users when they have a brown-out failure ?
As switching regulators go, I think the same part for both VDD (1.8V) and VIO (3.3V), but with different resistors on each to set the output voltage would be good. Each capable of 2A would be critical..
On the other hand, parts which internally sense regulation voltage are safer, because their voltage outputs can't get dangerously off due to conductive contamination or probing mishaps (temporary short causes VDD to go to 10V!).
This approach is maybe on the big side for P2D2, but would be nice for a larger 4-layer carrier board.
Q: What voltage range to you want to target, in tolerating, and operating ?
LDO's have the appeal of simplicity and low noise, so good for analog & DAC applications, but need attention to thermal management and power spreading.
SMPS are more complex, generate much more noise, higher BOM, but do use less energy. SMPS tend to not have fixed versions, ie ADJ only.
Note: You do not have to use a SMPS for 3v3, if you choose one for 1v8
For SMPS, the AOZ2261QI-15 looks good, 2.7V to 28V , 26mΩ high-side 12mΩ low-side, PGood.
For LDO, I've found parts like
OnSemi NCP59744, Linear LDO, which is 5x5mm, 3A with soft start, PGood, and split RegIn pins, very good thermally with 9 vias. (& multi sourced pin-out, TI, Realtek)
Split RegIn also allows power spreading, using simple diodes as droppers, using the Split feature of : Dropout Voltage: ~95 mV at 3 A
All that combines to mean you could use 4 Layers and allow advanced users access to RegIn, but that part is 6V MAX in. ie 5V USB 2A charger powering
If you need to tolerate above that, for those real novice users, options are
* Fat Zener (eg OnSemi 1SMB5919BT3G ) has KISS appeal, trims any 'clone charger' spikes, & manages reverse connect oops too.
-and/or-
* OVLO parts like OnSemi FPF2286: OVP with Very Low on-resistance, 28 V, 4 A
Their web says FPF2286 WLCSP-6 $0.1667/3k
-or-
* 5V True LDO, that operates saturated normally (eg LDL1117S50R, LDL212PU50R, xx29150xx, or better)
Or, STM have a 16V Vin part, PGood, No soft start, no split RegIn, so less thermally flexible, but has wider Vin tolerance.
LDFPUR STM POS ADJ 16V 1A 6-DFN (3x3) (I max is 1.5A Typ, 1.7A typ graph )
also packages as DPAK5 variants, note in order to get PGood in these packages, you need fixed-Vout choices.
LDF33PT-TR STM 3.3V PPAK
LDF33DT-TR (DPAK - 3 pin no PGood)
LDF18PT-TR STM 1.8V PPAK (no stock showing yet, but on order at Mouser)
@"Peter Jakacki"
Another random thought I had while looking at your P2D2 board is that your new larger LEDs on the extra edge could potentially have a hole drilled in the middle of their SMD pads. This would hopefully allow in reverse mounted module situations the light from two optional reverse mounted LEDs to reach through to the other side of of the board through the drill holes. I am assuming these such LEDs can have the same footprint / size as your regular layout and the SD card is still fitted under the board on the original "top" and so does not occlude it. Still might be worth it for most probably zero cost if there is no drill limit.
Parallax already do this with their flip module using small holes and it looks very cool with the light getting through. See this video review if you don't already have one or know what I mean...
The chips arrived!!!!
Now I've just got to place the LDOs and I have some 10ppm oscillators that I can add too as well as connectors and a couple of bridges to touch up and then it's testing time! I have to go out shortly but I will be back later tonight to get stuck into it.
I'd like to send a unit down to you guys with the hammers ready in Melbourne. Who should I send it to?
Thanks heaps Chip, Ken, David - I''m sending more P2D2 boards to Publison with his shipment of LCDs.
I'd send it down to Lachlan for him and OzPropDev to both play with on site. If/when you get any more chips, I'd be keen to take one for a spin too, though I can certainly wait.
I tidied up the board earlier and added a few extra bits including an oscillator, regs, reset pullup (top left corner), transistor reset (just to keep it tidy), etc. Now I'm back and I'm going to add my low profile sockets to the edge so I can connect to it easily and also test it out by plugging into some matrix board with various other modules etc.
I am going to connect 1.8V to the VCC line and make sure that as I dial it up on my digital PSU that the 1.8V rail does not go higher than 1.8V and then the same for 3.3V although that shouldn't be a problem. I'm using the AZ1117CR LDO regs. Then I will remove the supply and plug in my usb serial to power and communicate with the P2D2 and check all the I/O first, do a memory test, smartpin tests etc and then switch to the oscillator etc. It might be an all-nighter!
I will see if I can get that same low-profile socket in a full 20x2 strip as the 16 and 8 way ones I have aren't end stackable and it's a nuisance to sand them down to fit.
Darn, the 1.8V started up at around 1.9V input and seems to be fine with a minimum of 2.2V in but the 3.3V was behaving badly and started to go beyond 3.3V as I cranked it up, so I stopped it there. Turns out the AZ1117CR regs swap their in and out compared to the MCP1700s I normally use. So I will replace these with MCP1700s which are rated at 250ma but the good thing is that there are two of them anyway. I will correct my H revision pcb to take AZ1117CR devices though.
This is why we tread cautiously though, never assuming a single thing, just keep checking, keep testing...
Just a quick update since I have been talking to P2 for the past hour and just checking the basics. I had to add a pullup to P59 of course but I just put that in where the option resistors normally would go. I will scope it later to find out why it needs the pullup.
So far everything checks out although for some reason Flash and SD don't seem to coexist but that might be a PCB thing. I've checked some I/O and they seem to be working but I will add a sense resistor in the 1.8V line and with the scope in differential mode I will look at the switching currents.
Also up shortly is the memory test. Not sure yet why lsio, the I/O check indicates pull-downs on some lines.
Cold start
----------------------------------------------------------------
Parallax P2 .:.:--TAQOZ--:.:. V1.0--142 180530-0135
----------------------------------------------------------------
---------------------------------------------------------------- ok
TAQOZ# lsio
P:00000000001111111111222222222233333333334444444444555555555566
P:01234567890123456789012345678901234567890123456789012345678901
=:ddd~d~~~~~~ddd~ddd~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~h~h ok
TAQOZ# ok
TAQOZ# MOUNT .SDSL08G 6338_6430 WIDGET 32k 7,576M ok
TAQOZ# DIR
.SDSL08G 6338_6430 WIDGET 32k 7,576M
WIDGET $0000_3F80 2017.03.23.09.40 0
DUMPV4 .FTH $0000_4040 2016.12.16.03.45 1,390
EASYFILE.FTH $0000_4080 2016.12.15.22.02 47,765
EASYNET .FTH $0000_4100 2017.03.21.14.02 42,751
EXTEND .FTH $0000_4180 2017.03.22.23.04 41,494
LIFE .FTH $0000_4200 2017.03.09.07.50 7,046
LOVE .WAV $0000_4240 2015.02.16.08.06 14,630,692
POPCORN .WAV $0000_B200 2014.06.17.06.15 117,804
SEEDAWN .FTH $0000_B300 2016.12.15.14.24 1,426
SPLAT-V4.FTH $0000_B340 2017.03.09.12.30 18,944
AT A C H. Y $14C0_3F80 1980.02.09.00.02 78
TACHYO~1.SPI $0000_B380 2016.12.16.07.32 200,883
WARPEACE.TXT $0000_B540 2015.08.30.07.27 3,226,652
ROM_136X.OBJ $0000_CE00 2018.05.15.23.02 1,048,352
ok
TAQOZ# $B540 FOPEN ok
TAQOZ# 0 $80 SD DUMP
00000: 54 68 65 20 50 72 6F 6A 65 63 74 20 47 75 74 65 'The Project Gute'
00010: 6E 62 65 72 67 20 45 42 6F 6F 6B 20 6F 66 20 57 'nberg EBook of W'
00020: 61 72 20 61 6E 64 20 50 65 61 63 65 2C 20 62 79 'ar and Peace, by'
00030: 20 4C 65 6F 20 54 6F 6C 73 74 6F 79 0A 0A 54 68 ' Leo Tolstoy..Th'
00040: 69 73 20 65 42 6F 6F 6B 20 69 73 20 66 6F 72 20 'is eBook is for '
00050: 74 68 65 20 75 73 65 20 6F 66 20 61 6E 79 6F 6E 'the use of anyon'
00060: 65 20 61 6E 79 77 68 65 72 65 20 61 74 20 6E 6F 'e anywhere at no'
00070: 20 63 6F 73 74 20 61 6E 64 20 77 69 74 68 20 61 ' cost and with a' ok
Looks like you are now having some real fun Peter. This stuff will be great for learning whatever changes you need for your next board rev. Just be extra careful not to get too tired and fry anything by mistake if you are up all night experimenting with your new system. Been there before. LOL.
Some of the fpga boards also picked up a phantom pull up/down with the lsio command. I can't remember which ones other than it seemed stable and repetitive.
Yes, you do need to be careful with the regulator pinouts. Some parts from the same manufacturer have same part no except for a suffix so care is needed:(
I've added some clock modes in my CHIPTEST.FTH code so I can easily set it up.
Here I set up P59 to output "40 MHZ" but bear in mind that this would be 40MHZ if we used the 80MHZ FPGA.
TAQOZ# 59 PIN 40 MHZ ok
However I measure this and it indicates that RCFAST is running at 22.8MHZ. Fair enough.
Now I tell P2 to set the clock input up as a standard 30pF with PLL enabled and then divide my 12MHz oscillator by 12 and then just to keep the baud rate friendly which I currently have at 115,200 baud but can change to 1,152,000 baud (10 times) I tell it to multiply that by 228 and don't divide the PLL. When I say USEPLL I am asking it to check if I am switching into crystal and PLL modes and if so it will wait (after applying the previous settings) and then apply the clock settings. Which it does as the reply comes back garbled but a quick change in minicom to 1,152,000 baud and back comes the prompt!.
From another thread, here is a possible P2 heatsink, that looks the part, and is very close to a good fit.... just needs a squeeze to fit the 4 mounting holes.
Or, Chip could allow to fit this on his P2 PCB design ?
(Still looking for the package height / thermal pad compliance info)
From another thread, here is a possible P2 heatsink, that looks the part, and is very close to a good fit.... just needs a squeeze to fit the 4 mounting holes.
Just posted some shots of a P2D2 up close from different angles as this is one I made up from the bare chip just to show the result. I am only using some old paste in a syringe and a $30 toaster oven to achieve this result. Did I need to have a big magnifier and really fine tip soldering iron like Chip did to solder it? No, I just run a bead of solder paste down the 4 sides of the P2, place the chip, smudge it around and nudge it into alignment. The other components are straightforward, even the tiny integrated switcher chip that is dwarfed by the 10uF cap next to it.
They are also in the P2 PICS folder. There is a P1 in a DIP40 pack next to the P2D2 in a couple of shots just to show you how low profile and small the whole pcb is. This pcb is going off to Tubular and I just sent one yesterday to Cluso.
My assembled P2D2 arrived today. Just home from work now, so will be an interesting evening
Thanks Chip and Peter for putting the other components and testing
Comments
A brown out requires a band gap, which really requires trimming to work properly. I just didn't have time to mess with either of those things. So, I figured we could use an external part. It may be, these days, that the regulators, themselves, contain some power good signal which could be used.
No. I know nothing, other than the VDD detector should trigger at 1.60V and the one for VIO should trigger at 3.0V.
There are regulators that include a P Good, and the advantage of an in-regulator solution are
* It adjusts with the Trim resistors, so (experienced) users can experiment with minor voltage changes, just with R adjs
* Reduces the BOM
..and maybe a LED on RESn=low to show a reset, to alert users when they have a brown-out failure ?
Q: What voltage range to you want to target, in tolerating, and operating ?
LDO's have the appeal of simplicity and low noise, so good for analog & DAC applications, but need attention to thermal management and power spreading.
SMPS are more complex, generate much more noise, higher BOM, but do use less energy. SMPS tend to not have fixed versions, ie ADJ only.
Note: You do not have to use a SMPS for 3v3, if you choose one for 1v8
For SMPS, the AOZ2261QI-15 looks good, 2.7V to 28V , 26mΩ high-side 12mΩ low-side, PGood.
For LDO, I've found parts like
OnSemi NCP59744, Linear LDO, which is 5x5mm, 3A with soft start, PGood, and split RegIn pins, very good thermally with 9 vias. (& multi sourced pin-out, TI, Realtek)
Split RegIn also allows power spreading, using simple diodes as droppers, using the Split feature of : Dropout Voltage: ~95 mV at 3 A
All that combines to mean you could use 4 Layers and allow advanced users access to RegIn, but that part is 6V MAX in. ie 5V USB 2A charger powering
If you need to tolerate above that, for those real novice users, options are
* Fat Zener (eg OnSemi 1SMB5919BT3G ) has KISS appeal, trims any 'clone charger' spikes, & manages reverse connect oops too.
-and/or-
* OVLO parts like OnSemi FPF2286: OVP with Very Low on-resistance, 28 V, 4 A
Their web says FPF2286 WLCSP-6 $0.1667/3k
-or-
* 5V True LDO, that operates saturated normally (eg LDL1117S50R, LDL212PU50R, xx29150xx, or better)
Or, STM have a 16V Vin part, PGood, No soft start, no split RegIn, so less thermally flexible, but has wider Vin tolerance.
LDFPUR STM POS ADJ 16V 1A 6-DFN (3x3) (I max is 1.5A Typ, 1.7A typ graph )
also packages as DPAK5 variants, note in order to get PGood in these packages, you need fixed-Vout choices.
LDF33PT-TR STM 3.3V PPAK
LDF33DT-TR (DPAK - 3 pin no PGood)
LDF18PT-TR STM 1.8V PPAK (no stock showing yet, but on order at Mouser)
Another random thought I had while looking at your P2D2 board is that your new larger LEDs on the extra edge could potentially have a hole drilled in the middle of their SMD pads. This would hopefully allow in reverse mounted module situations the light from two optional reverse mounted LEDs to reach through to the other side of of the board through the drill holes. I am assuming these such LEDs can have the same footprint / size as your regular layout and the SD card is still fitted under the board on the original "top" and so does not occlude it. Still might be worth it for most probably zero cost if there is no drill limit.
Parallax already do this with their flip module using small holes and it looks very cool with the light getting through. See this video review if you don't already have one or know what I mean...
Now I've just got to place the LDOs and I have some 10ppm oscillators that I can add too as well as connectors and a couple of bridges to touch up and then it's testing time! I have to go out shortly but I will be back later tonight to get stuck into it.
I'd like to send a unit down to you guys with the hammers ready in Melbourne. Who should I send it to?
Thanks heaps Chip, Ken, David - I''m sending more P2D2 boards to Publison with his shipment of LCDs.
I am going to connect 1.8V to the VCC line and make sure that as I dial it up on my digital PSU that the 1.8V rail does not go higher than 1.8V and then the same for 3.3V although that shouldn't be a problem. I'm using the AZ1117CR LDO regs. Then I will remove the supply and plug in my usb serial to power and communicate with the P2D2 and check all the I/O first, do a memory test, smartpin tests etc and then switch to the oscillator etc. It might be an all-nighter!
I will see if I can get that same low-profile socket in a full 20x2 strip as the 16 and 8 way ones I have aren't end stackable and it's a nuisance to sand them down to fit.
This is why we tread cautiously though, never assuming a single thing, just keep checking, keep testing...
Be back soon...
So far everything checks out although for some reason Flash and SD don't seem to coexist but that might be a PCB thing. I've checked some I/O and they seem to be working but I will add a sense resistor in the 1.8V line and with the scope in differential mode I will look at the switching currents.
Also up shortly is the memory test. Not sure yet why lsio, the I/O check indicates pull-downs on some lines.
Some of the fpga boards also picked up a phantom pull up/down with the lsio command. I can't remember which ones other than it seemed stable and repetitive.
Yes, you do need to be careful with the regulator pinouts. Some parts from the same manufacturer have same part no except for a suffix so care is needed:(
I think it's just booting from TAQOZ on ROM.
Here I set up P59 to output "40 MHZ" but bear in mind that this would be 40MHZ if we used the 80MHZ FPGA. However I measure this and it indicates that RCFAST is running at 22.8MHZ. Fair enough.
Now I tell P2 to set the clock input up as a standard 30pF with PLL enabled and then divide my 12MHz oscillator by 12 and then just to keep the baud rate friendly which I currently have at 115,200 baud but can change to 1,152,000 baud (10 times) I tell it to multiply that by 228 and don't divide the PLL. When I say USEPLL I am asking it to check if I am switching into crystal and PLL modes and if so it will wait (after applying the previous settings) and then apply the clock settings. Which it does as the reply comes back garbled but a quick change in minicom to 1,152,000 baud and back comes the prompt!.
Looking at P59 it is now outputting a frequency of 114MHz, that is, half the frequency of the P2 clock which is now running at 228MHz.
BTW, the P2 is quite warm to the touch
Or, Chip could allow to fit this on his P2 PCB design ?
(Still looking for the package height / thermal pad compliance info)
http://www.nanopi.org/DUO-Heat.html
Their heatsink uses 21.4 x 41.6 x 16 mounting holes on overall PCB 50 x 25.
I found more images here, this looks like another variant heatsink, thicker ?
https://forum.armbian.com/topic/7280-need-some-info-on-nanopi-duo/
They appear to use a thermal pad, which squashes to give some tolerance.
This is 2-D DXF PCB drawing, for the mounting holes (but sadly not the heatsink outline)
For more details refer to the document NanoPi_Duo_v1.0_1706 pcb file in dxf format
The DXF does let you easily make a footprint to overlay onto the board.
Other choices here :
https://www.friendlyarm.com/index.php?route=product/search&search=heat+sink&description=true&sub_category=true
It looks like the processor out of the Terminator (T800).
I want one. So when are you doing the pcb?
Check out the photos here
They are also in the P2 PICS folder. There is a P1 in a DIP40 pack next to the P2D2 in a couple of shots just to show you how low profile and small the whole pcb is. This pcb is going off to Tubular and I just sent one yesterday to Cluso.
Here's one of the shots.
Thanks Chip and Peter for putting the other components and testing