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Prop2 FPGA files!!! - Updated 2 June 2018 - Final Version 32i - Page 26 — Parallax Forums

Prop2 FPGA files!!! - Updated 2 June 2018 - Final Version 32i

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  • Well I figured out the build for the Nano without having to download the entire 1.5 Gig Alteras install. I downloaded the "programming and tools" only under 15.1 lite version and had to mess around with comm ports but everything is running now.

    Here is the link I used for just the tools:

    http://download.altera.com/akdlm/software/acdsinst/15.1/185/ib_installers/QuartusProgrammerSetup-15.1.0.185-windows.exe

    This gave me the correct USB-Blaster drivers for windoze 8.1

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  • cgraceycgracey Posts: 14,155
    I got the pixel mixer all integrated. I hope to get new files out tomorrow and update the doc's, accordingly.

    I'm way behind on reading forum posts right now.

    Question: I'd like to get rid of GETD and GETS, which read the D and S fields, and then replace their slots with RGBW2L and RGBL2W which would convert between 8:8:8:0 RGB (long) and 5:6:5:0 RGB (word). I think with the ALTD/ALTS instructions, there's reduced need for GETD and GETS, though SETD and SETS are still useful. Any opinions? I really want to keep SEUSSF and SEUSSR, as they will be handy for quick pseudo-random and obfuscation functions.
  • I think GETS and GETD can be implemented easy enough with shifts, and, etc.
    Is it possible to merge ALTS with SETS so a single instruction covers both scenarios and frees up another opcode?
    Same applies to ALTD and SETD?
  • RaymanRayman Posts: 14,647
    edited 2015-11-17 14:06
    I think RGBW2L and ..L2W could be very useful in certain situations.
    (say you want to connect all 24 color bits to an LCD but work internally in 16-bit mode) (or, you want to quickly display a 24-bpp bitmap from uSD card when working in 16-bit mode).

    Can't think of any situation where GETD or GETS would be useful for me...

    But now I'm curious... I though there were all kinds of opcodes still free. Are they all full now?
  • I agree with @ozpropdev. GETD/GETS can be handled other ways, when needed.
  • I do as well.

    As for ops, there needs to be some reserved for the smart pin ops. Being frugal at this stage makes good, general sense, and that's all I think Chip is after right now.

  • There were two other instructions I also identified as being re-usable, but I can't remember which ones they were... *sigh*
  • AribaAriba Posts: 2,690
    potatohead wrote: »
    I do as well.

    As for ops, there needs to be some reserved for the smart pin ops. Being frugal at this stage makes good, general sense, and that's all I think Chip is after right now.

    I think MSGIN and MSGOUT are for the smart pins, the ops will then be in the message you send.
  • cgraceycgracey Posts: 14,155
    Okay, I'm going to get rid of SETD and SETS and implement RGBW2L and RGBL2W. I'm going to shift a few instructions around in the region to make this look right. All these instructions are in a block of mux-type instructions, so they work on a common ALU path.
  • Cluso99Cluso99 Posts: 18,069
    Chip,
    SETD & SETS s/be GETD & GETS - a typo ;)

    Yes, we can live without GETD & GETS.
  • Peter JakackiPeter Jakacki Posts: 10,193
    edited 2015-11-18 01:31
    Just as well Chip isn't a dentist then.
    "That's the left wisdom tooth right?"
    "Right!"
    "Okay, right then"........ :)
  • evanhevanh Posts: 15,916
    Rayman wrote: »
    But now I'm curious... I though there were all kinds of opcodes still free. Are they all full now?

    There was plenty of D field and null operand slots spare but only a few left of the full dual operand instruction slots. Presumably those have been gobbled up already.
  • cgraceycgracey Posts: 14,155
    I just posted a new file at the top of this thread. I'm going to be updating the documentation over the next 15 minutes, or so, to reflect the changes.

    At this point, I don't have any ideas to enhance the design further. I will add to the documentation over the next few days before starting on the smartpin circuit.
  • jmgjmg Posts: 15,173
    Smart pins sound good :)

    I see this recent news from Spansion, of faster write speeds on DDR QuadSPI memory

    http://www.cypress.com/news/cypress-introduces-industry-s-fastest-256mb-quad-serial-peripheral-interface-nor-flash-memory
    One part can give 66 MBps, and 2 -wide can give 132MB/s at 66MHz CLK speeds.
  • Thanks Chip.

    I found an issue with Pnut not coding SETS and SETD correctly.
    Docs show
    CCCC 1001101 10I DDDDDDDDD SSSSSSSSS    *   SETD    D,S/#
    CCCC 1001101 11I DDDDDDDDD SSSSSSSSS    *   SETS    D,S/#
    
    Pnut codes as
    CCCC 1001101 10I DDDDDDDDD SSSSSSSSS    *   SETS    D,S/#
    CCCC 1001101 11I DDDDDDDDD SSSSSSSSS    *   SETD    D,S/#
    



  • Cluso99Cluso99 Posts: 18,069
    cgracey wrote: »
    I just posted a new file at the top of this thread. I'm going to be updating the documentation over the next 15 minutes, or so, to reflect the changes.

    At this point, I don't have any ideas to enhance the design further. I will add to the documentation over the next few days before starting on the smartpin circuit.
    Excellent! Smart Pins here we come.... ;)
  • cgraceycgracey Posts: 14,155
    ozpropdev wrote: »
    Thanks Chip.

    I found an issue with Pnut not coding SETS and SETD correctly.
    Docs show
    CCCC 1001101 10I DDDDDDDDD SSSSSSSSS    *   SETD    D,S/#
    CCCC 1001101 11I DDDDDDDDD SSSSSSSSS    *   SETS    D,S/#
    
    Pnut codes as
    CCCC 1001101 10I DDDDDDDDD SSSSSSSSS    *   SETS    D,S/#
    CCCC 1001101 11I DDDDDDDDD SSSSSSSSS    *   SETD    D,S/#
    



    Thanks! It was a typo in the assembler. Fixed it and now updating the main file...
  • A new name? I am beginning to think that it should be called 'Granite' after the founding industry of Rocklin, California - current home of Parallax.
  • RaymanRayman Posts: 14,647
    edited 2015-11-18 11:38
    cgracey wrote: »
    At this point, I don't have any ideas to enhance the design further. I will add to the documentation over the next few days before starting on the smartpin circuit.

    That is great to hear! Maybe we're starting to see some light at end of the tunnel...

    Should VGA work on P123 now?
    Never mind, I see there's a VGA demo now with P123 instructions.

  • A new name? I am beginning to think that it should be called 'Granite' after the founding industry of Rocklin, California - current home of Parallax.
    I hope a name like that is not set in stone! :)
    Rocklin V16 conjures up a chip name and a very powerful engine with not one, or two, or four, but 16 Rocklin cores.

  • RaymanRayman Posts: 14,647
    edited 2015-11-18 16:00
    I was just trying out Chip's VGA driver with DE2. Seems to work pretty well.

    But, I think his "intensity" is too high (for my monitor anyway).
    Had to dial it down from 80 to 55 or so.

    Update: 80 is good for P123 board, but too high for DE2-115

    Also, (and this is really nit-picky) I noticed a lot of pixilation in the image.
    Found the source image and re-did it with Photoshop and I think it's a lot better.
    But, maybe you have to look real close to see the difference:


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  • At this point, I don't have any ideas to enhance the design further.

    We are here now! :) It's been a very long haul. Thank you Chip.

  • RaymanRayman Posts: 14,647
    edited 2015-11-18 15:19
    I think there's an issue with 4-bpp and 1-bpp LUT modes (and probably 2-bpp too)...

    The output order appears backwards from what BMP format uses...

    Here's an example 1-bpp bitmap and screenshot showing how it comes out:

    Also, for some reason I don't understand, I had to set the orgh to $1000-$3E instead of the $1000-$40 that I thought it should be to get it to come out right...
  • potatoheadpotatohead Posts: 10,261
    edited 2015-11-18 15:22
    I had to reverse the font for my character driver. Didn't even notice this, thinking it was reversed because we often did that on the P1. Just checked, and the font is correct, and I've reversed it again for P2. Maybe this was intended for compatability?

    Agreed. This would be good to change. Pixel output order is backward. And making low bit rate bitmaps in linear order is something people will do a lot of. It's just frugal use of RAM.

    Had I chosen to display a 2 color bitmap, I would have seen this too. Glad you did one.

  • rjo__rjo__ Posts: 2,114
    "By incorporating DDS output with Goertzel input, many interactive real-world measurements can be made to determine things like time-of-flight and resonance."

    -from Chip's docs


  • RaymanRayman Posts: 14,647
    Just noticed that the forum software changes the format of bmp files that I upload.
    Anyway, I'll put them here as a zip in case anybody else wants to try:
  • RaymanRayman Posts: 14,647
    I added code to fix the bit order and got it to look right...
    Seems the bytes are in the right order, but the bits in each byte have to be reversed to display correctly. Here's the code that fixes and displays 1bpp bird:
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  • RaymanRayman Posts: 14,647
    edited 2015-11-18 18:16
    Here's 4-bpp photo that is fixed by swapping nibbles in each byte:
    (the photo was created by the popular photo program, irfanview, btw)
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  • RaymanRayman Posts: 14,647
    edited 2015-11-18 19:42
    Just got 800x600 (SVGA) at 72 Hz working with 50 MHz pixel clock:

    BTW: I'm wondering why the buffering of xcont doesn't make the vertical sync signal come out wrong... Or, maybe it is wrong but works anyway?
    640 x 480 - 74K
  • RaymanRayman Posts: 14,647
    edited 2015-11-18 21:39
    If you want more birds, you have to go widescreen :)
    Here's WVGA (852x480):
    (it shimmers a little tiny bit, probably due to the pixel clock not being even divisor of 50 MHz clock)

    640 x 480 - 79K
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