What's the status of the A9 board? I will not have access to my A7 1-2-3 board next week, so would like to take the opportunity to send it back in exchange for the A9 version.
What's the status of the A9 board? I will not have access to my A7 1-2-3 board next week, so would like to take the opportunity to send it back in exchange for the A9 version.
They are sitting next to me. I am planning on going down to Parallax on Wednesday and taking them with me, in case I don't get them done any sooner. They all need Prop1 programming and testing.
I started having a look to see if it worked under Wine or or not - seems to work, GDI display, so far - then downloaded a few of the tutorials ... and found they've used the Hydra PCB in one of them - http://downloads.labcenter.co.uk/videos/v8/PowerPlanes.webm
Tom, there are probably a few of the A7 boards available. There's a batch of the A9 boards that Chip is hopefully delivering to Parallax (on Wednesday?) The A9 boards are being eagerly anticipated by all!!
Tom, there are probably a few of the A7 boards available. There's a batch of the A9 boards that Chip is hopefully delivering to Parallax (on Wednesday?) The A9 boards are being eagerly anticipated by all!!
Also, there will probably be more A7 boards available once people like me start sending them back to Parallax to exchange for A9 boards.
These -A7 boards are kind of a question. I think it would be best if we just swapped everyone out with an -A9 board and dropped -A7 support, as they'll only run 50 MHz and I don't think we can practically repair them so that the PLLs work.
Would everyone interested in an -A9 board please PM me?
I guess I don't know enough about these boards to know if A7 is worth keeping or not...
Does a PLL fixed A9 mean it will run at higher frequency that 50 MHz?
BTW: Is see an Ext CLK even on the A7 board. Can that be used to go to higher than 50 MHz?
I'm also curious what the new board will mean for running a P1V. What frequency can it run at? I assume that port B can be enabled. Could one address the DACs in some way? Would the LEDs and pushbuttons be connected to Prop Pins? Or, is that something the user can change? Is there a way to use the SDRAM?
Also, what are the Exp A,B,C ports good for in P2 or P1V mode?
I guess I don't know enough about these boards to know if A7 is worth keeping or not...
Does a PLL fixed A9 mean it will run at higher frequency that 50 MHz?
BTW: Is see an Ext CLK even on the A7 board. Can that be used to go to higher than 50 MHz?
I'm also curious what the new board will mean for running a P1V. What frequency can it run at? I assume that port B can be enabled. Could one address the DACs in some way? Would the LEDs and pushbuttons be connected to Prop Pins? Or, is that something the user can change? Is there a way to use the SDRAM?
Also, what are the Exp A,B,C ports good for in P2 or P1V mode?
I'll try and answer as best I can. For myself, I'd prefer to keep my A7 for other FPGA projects and also get an A9 (a $100 upgrade charge was discussed earlier for the "early adopters").
Your questions address two currently different things: the P1V which we have source code for and can adopt to many boards and the P2 which we currently don't have source for, so we are at Chip's mercy as to what boards he will build for.
For the P1V on the A7, you should be able to configure it to use the external clock and then have complete control over the frequency used.
For the P2 on the A7, Chip is building the image to use the internal 50MHz clock. He would need to build an image to use the external clock (I'm not sure if it is that easy or if it needs to be build using the external clock and you also must specify in the Verilog what the clock speed will be on that external clock. This is another build option for Chip to maintain as he does new releases. If we are adding work for Chip, a better use of his time would be a BeMicro-A9 version to pick up some test support on a board with a lower price.
Once the P2 source becomes available, the A7/P2 could be used like the A7/P1V combination - you have control over the clock source since you have the source code.
With the P1V, any of the hardware on the A7 or A9 board could be mapped into the FPGA image as extensions to the P1V. They are also usable to connect to the P1V/P2 pins - I think most of the peripheral pins have been brought out to the board in some fashion. I haven't looked a t the schematics for a while. I thought I was using the buttons on the P1V before we had P2 images. It's mostly going to come down to mapping FPGA pins to hardware which you will be able to control whenever you have the Verilog source for something.
While a bit pricey, I think the P123 boards in either version (a "fixed" A7 would be better) are well made FPGA experimenter boards with a good collection of external circuits (working ws2812's would be nice). I could see Parallax developing a FPGA programming curriculum around them when all the current dust settles except they have no margin for them to recover any costs.
I guess they should drop A7, just to free Chip from the burden of supporting it.
The P123-A9 board as P1V+ is very interesting to me.
It would be interesting to know what the possibilities are there...
Can it go higher frequency than 80 MHz? Is there room for 2 or more P1Vs inside?
I think if Parallax would provide the code to make it with Port B enabled, a VGA port connected, and L&R audio on DACs, and buttons and LEDs connected somehow I'd buy an extra board or two.
I just don't think I have the time to figure out how to do all that in Verilog myself...
If I just look at the LUT count and RAM blocks, the A9 FPGA should be capable to do about 16 P1Vs with 64 kB RAM each
This would be 128 cogs! I don't think the speed will be higher than a P1V on a Cyclone 4.
BTW: Is see an Ext CLK even on the A7 board. Can that be used to go to higher than 50 MHz?
Yes, the question is what to connect ?
I found some older, simpler PLLs that could more closely emulate a P2 PLL, but they will never be exact, and are bulky and expensive.
An alternative is a newer PLL, like the Si5351A, which is cheaper but a little more complex, and that has i2c which could configure from the Prop1 on the 123, with the right driver.
I think if Parallax would provide the code to make it with Port B enabled, a VGA port connected, and L&R audio on DACs, and buttons and LEDs connected somehow I'd buy an extra board or two.
I just don't think I have the time to figure out how to do all that in Verilog myself...
Parallax will not have the time either, until P2 is done.
The A9 should host many P1V COGS and a lot more RAM
If someone wanted to, they could modify the PX.spin program to take advantage of the QUAD SPI Flash chip, and get that load time down!
I had a quick go at "hot rodding" the PX.spin code for Quad SPI mode operation.
Load time for the A9_V6 image went from 22 seconds to 9 seconds.
Ironically the P2 ROLNIB instruction would work well here to speed things up even more!
I seem to have broken the write code though. I will have to come back to that later.
Anyhow not a 4x perfprmance boost but not bad though.
I had a quick go at "hot rodding" the PX.spin code for Quad SPI mode operation.
Load time for the A9_V6 image went from 22 seconds to 9 seconds.
Ironically the P2 ROLNIB instruction would work well here to speed things up even more!
2.44x easily, is certainly worth having.
The P2 does need a fast way to move QuadSPI (ideally QuadSPI DDR too )
- I thought the Streamer allowed that, or is the clock support for streamer 'still coming' as part of the smart-pins mix ?
(DDR would likely be done at the pins, so seems a Smart Pin config option ?)
Is the A9 board still available at the $375. price?
The A7 was $375. We are selling the A9 boards for $475. The A9 is all we are making now and we are building 20 more boards that will probably be ready in three weeks.
Is the A9 board still available at the $375. price?
The A7 was $375. We are selling the A9 boards for $475. The A9 is all we are making now and we are building 20 more boards that will probably be ready in three weeks.
Is the A9 board still available at the $375. price?
The A7 was $375. We are selling the A9 boards for $475. The A9 is all we are making now and we are building 20 more boards that will probably be ready in three weeks.
Is the A9 board still available at the $375. price?
The A7 was $375. We are selling the A9 boards for $475. The A9 is all we are making now and we are building 20 more boards that will probably be ready in three weeks.
Comments
They are sitting next to me. I am planning on going down to Parallax on Wednesday and taking them with me, in case I don't get them done any sooner. They all need Prop1 programming and testing.
I started having a look to see if it worked under Wine or or not - seems to work, GDI display, so far - then downloaded a few of the tutorials ... and found they've used the Hydra PCB in one of them - http://downloads.labcenter.co.uk/videos/v8/PowerPlanes.webm
These -A7 boards are kind of a question. I think it would be best if we just swapped everyone out with an -A9 board and dropped -A7 support, as they'll only run 50 MHz and I don't think we can practically repair them so that the PLLs work.
Would everyone interested in an -A9 board please PM me?
https://drive.google.com/file/d/0B9NbgkdrupkHLWpzbWFJNEw1WHM/view?usp=sharing
The source for both the PC Delphi app and the Prop1 chip on the -A9 board are included.
If someone wanted to, they could modify the PX.spin program to take advantage of the QUAD SPI Flash chip, and get that load time down!
That's not a suggestion... that's a challenge!
Does a PLL fixed A9 mean it will run at higher frequency that 50 MHz?
BTW: Is see an Ext CLK even on the A7 board. Can that be used to go to higher than 50 MHz?
I'm also curious what the new board will mean for running a P1V. What frequency can it run at? I assume that port B can be enabled. Could one address the DACs in some way? Would the LEDs and pushbuttons be connected to Prop Pins? Or, is that something the user can change? Is there a way to use the SDRAM?
Also, what are the Exp A,B,C ports good for in P2 or P1V mode?
I'll try and answer as best I can. For myself, I'd prefer to keep my A7 for other FPGA projects and also get an A9 (a $100 upgrade charge was discussed earlier for the "early adopters").
Your questions address two currently different things: the P1V which we have source code for and can adopt to many boards and the P2 which we currently don't have source for, so we are at Chip's mercy as to what boards he will build for.
For the P1V on the A7, you should be able to configure it to use the external clock and then have complete control over the frequency used.
For the P2 on the A7, Chip is building the image to use the internal 50MHz clock. He would need to build an image to use the external clock (I'm not sure if it is that easy or if it needs to be build using the external clock and you also must specify in the Verilog what the clock speed will be on that external clock. This is another build option for Chip to maintain as he does new releases. If we are adding work for Chip, a better use of his time would be a BeMicro-A9 version to pick up some test support on a board with a lower price.
Once the P2 source becomes available, the A7/P2 could be used like the A7/P1V combination - you have control over the clock source since you have the source code.
With the P1V, any of the hardware on the A7 or A9 board could be mapped into the FPGA image as extensions to the P1V. They are also usable to connect to the P1V/P2 pins - I think most of the peripheral pins have been brought out to the board in some fashion. I haven't looked a t the schematics for a while. I thought I was using the buttons on the P1V before we had P2 images. It's mostly going to come down to mapping FPGA pins to hardware which you will be able to control whenever you have the Verilog source for something.
While a bit pricey, I think the P123 boards in either version (a "fixed" A7 would be better) are well made FPGA experimenter boards with a good collection of external circuits (working ws2812's would be nice). I could see Parallax developing a FPGA programming curriculum around them when all the current dust settles except they have no margin for them to recover any costs.
The P123-A9 board as P1V+ is very interesting to me.
It would be interesting to know what the possibilities are there...
Can it go higher frequency than 80 MHz? Is there room for 2 or more P1Vs inside?
I think if Parallax would provide the code to make it with Port B enabled, a VGA port connected, and L&R audio on DACs, and buttons and LEDs connected somehow I'd buy an extra board or two.
I just don't think I have the time to figure out how to do all that in Verilog myself...
This would be 128 cogs! I don't think the speed will be higher than a P1V on a Cyclone 4.
Andy
Yes, but I think you never quite get a clone of a P2 PLL from a user-access view point.
ie no run time register loading to change fPLL
Yes, the question is what to connect ?
I found some older, simpler PLLs that could more closely emulate a P2 PLL, but they will never be exact, and are bulky and expensive.
An alternative is a newer PLL, like the Si5351A, which is cheaper but a little more complex, and that has i2c which could configure from the Prop1 on the 123, with the right driver.
The A9 should host many P1V COGS and a lot more RAM
Load time for the A9_V6 image went from 22 seconds to 9 seconds.
Ironically the P2 ROLNIB instruction would work well here to speed things up even more!
I seem to have broken the write code though. I will have to come back to that later.
Anyhow not a 4x perfprmance boost but not bad though.
ROLNIB would get to 4X. Glad to have that for P2, even though processor speed would probably get to 4X speed boost without it.
Maybe I should have saved the paperwork that came with the new A9....
The P2 does need a fast way to move QuadSPI (ideally QuadSPI DDR too )
- I thought the Streamer allowed that, or is the clock support for streamer 'still coming' as part of the smart-pins mix ?
(DDR would likely be done at the pins, so seems a Smart Pin config option ?)
Welcome to the forums! You probably will not get an answer back until Jan 4 when Parallax opens again.
The are only available through the forum. You will have to wait for the answer.
The A7 was $375. We are selling the A9 boards for $475. The A9 is all we are making now and we are building 20 more boards that will probably be ready in three weeks.
Happy New Year Chip!
Thanks, I appreciate the quick answer.
You bet.
Happy New Year to all you guys!