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BeMicro CV A9 - 301.000K LE

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  • AleAle Posts: 2,363
    edited 2015-08-07 05:06
    I am ecstatic... I found for the A2 and for the A9 DDR3 examples ! (I did try to roll my own... keep trying :( ). Here, at the bottom of the page:
    http://www.alterawiki.com/wiki/Bemicro_cv
    http://www.alterawiki.com/wiki/BeMicro_CV_A9

    Did someone try any of them ?

    I report here my findings so far:
    6:52 AM : No idea what the code is supposed to do, NIOS example ? or what ?....
    It needs SignalTap, so activate TalkBack to get it, at least in QII v13.

    It compiles surprisingly fast, maybe because it did use 4 cores... no idea.
    Info: *******************************************************************
    Info: Running Quartus II 64-Bit Analysis & Synthesis
    	Info: Version 13.1.0 Build 162 10/23/2013 SJ Web Edition
    	Info: Processing started: Fri Aug 07 06:50:37 2015
    	Info: Version 13.1.0 Build 162 10/23/2013 SJ Web Edition
    	Info: Processing started: Fri Aug 07 06:50:37 2015
    Info (332129): Detected timing requirements -- optimizing circuit to achieve only the specified requirements
    Info (332111): Found 17 clocks
    	Info (332111):   Period   Clock Name
    	Info (332111): ======== ============
    	Info (332111):   33.333 altera_reserved_tck
    	Info (332111):    3.333 if0|ddr3_example_if0_p0_sampling_clock
    	Info (332111):    3.333 if0|pll0|pll_afi_clk
    	Info (332111):   16.666 if0|pll0|pll_avl_clk
    	Info (332111):   16.666 if0|pll0|pll_avl_phy_clk
    	Info (332111):   50.000 if0|pll0|pll_config_clk
    	Info (332111):    3.333 if0|pll0|pll_dq_write_clk
    	Info (332111):    3.333    mem_ck[0]
    	Info (332111):    3.333  mem_ck_n[0]
    	Info (332111):    3.333 mem_dqs[0]_IN
    	Info (332111):    3.333 mem_dqs[0]_OUT
    	Info (332111):    3.333 mem_dqs[1]_IN
    	Info (332111):    3.333 mem_dqs[1]_OUT
    	Info (332111):    3.333 mem_dqs_n[0]_OUT
    	Info (332111):    3.333 mem_dqs_n[1]_OUT
    	Info (332111):   20.000 pll0|pll_driver_core_clk
    	Info (332111):   20.000  pll_ref_clk
    	Info (332111):   Period   Clock Name
    	Info (332111): ======== ============
    	Info (332111):   33.333 altera_reserved_tck
    	Info (332111):    3.333 if0|ddr3_example_if0_p0_sampling_clock
    	Info (332111):    3.333 if0|pll0|pll_afi_clk
    	Info (332111):   16.666 if0|pll0|pll_avl_clk
    	Info (332111):   16.666 if0|pll0|pll_avl_phy_clk
    	Info (332111):   50.000 if0|pll0|pll_config_clk
    	Info (332111):    3.333 if0|pll0|pll_dq_write_clk
    	Info (332111):    3.333    mem_ck[0]
    	Info (332111):    3.333  mem_ck_n[0]
    	Info (332111):    3.333 mem_dqs[0]_IN
    	Info (332111):    3.333 mem_dqs[0]_OUT
    	Info (332111):    3.333 mem_dqs[1]_IN
    	Info (332111):    3.333 mem_dqs[1]_OUT
    	Info (332111):    3.333 mem_dqs_n[0]_OUT
    	Info (332111):    3.333 mem_dqs_n[1]_OUT
    	Info (332111):   20.000 pll0|pll_driver_core_clk
    	Info (332111):   20.000  pll_ref_clk
    Info:                                                          setup  hold
    Info: Address Command (Slow 1100mV 85C Model)               |  1.392  1.351
    Info: Bus Turnaround Time (Slow 1100mV 85C Model)           |  4.196     --
    Info: Core (Slow 1100mV 85C Model)                          |  0.686  0.303
    Info: Core Recovery/Removal (Slow 1100mV 85C Model)         |  8.159  1.093
    Info: DQS vs CK (Slow 1100mV 85C Model)                     |  0.896  0.816
    Info: Postamble (Slow 1100mV 85C Model)                     |  0.764  0.764
    Info: Read Capture (Slow 1100mV 85C Model)                  |  0.302  0.236
    Info: Read Resync (Slow 1100mV 85C Model)                   |    1.0    1.0
    Info: Write (Slow 1100mV 85C Model)                         |  0.178  0.287
    Info:                                                          setup  hold
    Info: Address Command (Slow 1100mV 0C Model)                |  1.392  1.328
    Info: Bus Turnaround Time (Slow 1100mV 0C Model)            |  4.242     --
    Info: Core (Slow 1100mV 0C Model)                           |  0.554  0.347
    Info: Core Recovery/Removal (Slow 1100mV 0C Model)          |  8.155  1.046
    Info: DQS vs CK (Slow 1100mV 0C Model)                      |  0.958  0.825
    Info: Postamble (Slow 1100mV 0C Model)                      |  0.748  0.748
    Info: Read Capture (Slow 1100mV 0C Model)                   |   0.31  0.244
    Info: Read Resync (Slow 1100mV 0C Model)                    |    1.0    1.0
    Info: Write (Slow 1100mV 0C Model)                          |  0.151  0.255
    Info:                                                          setup  hold
    Info: Address Command (Fast 1100mV 85C Model)               |  1.615  1.301
    Info: Bus Turnaround Time (Fast 1100mV 85C Model)           |   4.67     --
    Info: Core (Fast 1100mV 85C Model)                          |  2.264  0.156
    Info: Core Recovery/Removal (Fast 1100mV 85C Model)         |  12.63  0.431
    Info: DQS vs CK (Fast 1100mV 85C Model)                     |  1.109  1.032
    Info: Postamble (Fast 1100mV 85C Model)                     |  1.005  1.005
    Info: Read Capture (Fast 1100mV 85C Model)                  |  0.543  0.477
    Info: Read Resync (Fast 1100mV 85C Model)                   |    1.0    1.0
    Info: Write (Fast 1100mV 85C Model)                         |  0.475  0.488
    Info:                                                          setup  hold
    Info: Address Command (Fast 1100mV 0C Model)                |  1.607  1.296
    Info: Bus Turnaround Time (Fast 1100mV 0C Model)            |  4.672     --
    Info: Core (Fast 1100mV 0C Model)                           |  2.423  0.142
    Info: Core Recovery/Removal (Fast 1100mV 0C Model)          | 12.784  0.392
    Info: DQS vs CK (Fast 1100mV 0C Model)                      |  1.094  1.049
    Info: Postamble (Fast 1100mV 0C Model)                      |  1.022  1.022
    Info: Read Capture (Fast 1100mV 0C Model)                   |  0.548  0.482
    Info: Read Resync (Fast 1100mV 0C Model)                    |    1.0    1.0
    Info: Write (Fast 1100mV 0C Model)                          |  0.475  0.499
    
    	Info: Peak virtual memory: 696 megabytes
    	Info: Processing ended: Fri Aug 07 06:57:24 2015
    	Info: Elapsed time: 00:00:11
    	Info: Total CPU time (on all processors): 00:00:11
    	Info: Peak virtual memory: 696 megabytes
    	Info: Processing ended: Fri Aug 07 06:57:24 2015
    	Info: Elapsed time: 00:00:11
    	Info: Total CPU time (on all processors): 00:00:11
    Info (293000): Quartus II Full Compilation was successful. 0 errors, 37 warnings
    
  • AleAle Posts: 2,363
    edited 2015-08-07 05:24
    I think that we have a winner !!!!!!

    - Compile, takes like 5 minutes
    - Program the device
    - Open the SignalTap II Logic Analyzer from the Tools menu
    - Press Run Analysis (Marked 1° on the screenshot).
    - Press S1 (left button on uSD card side)
    - Press the Read Data button (Marked 2° on the screenshot)
    - Scroll to the left to see the data !
    - Mast, I mean Enjoy 128 MBytes of RAM :)

    1458 x 722 - 131K
  • Exciting times, Ale!
  • AleAle Posts: 2,363
    edited 2015-08-07 05:54
    Yes indeed !.

    Last night I was dreaming of DVI-D output. I know I read about it some months ago... but yesterday I saw in the eevblog that someone posted some nice, neat VHDL code for a HDMI -> DVI-D converter. The CV can cope with that nicely, I think. It is a Xilinx project but I think we can, I'll try, to convert it to the CV. DVI-D needs only 4 differential pairs :). The code uses a macrofunction called "OSERDESE2", Altera's equivalent is called "ALTLVDS_TX", it seems:
    https://www.altera.com/en_US/pdfs/literature/ug/ug_altera_lvds.pdf
    http://www.eevblog.com/forum/microcontrollers/the-bowels-of-hdmi
  • LoopyBytelooseLoopyByteloose Posts: 12,537
    edited 2015-08-07 11:55
    6581,
    This may be operating system issues.

    Quartus II has always been targeted for the Red Hat Linux distributions and attempting to use the Debian distributions may get limited results.

    I am running Debian 8.1 Jessie amd64 (native on a Intel Quad 64bit machine) and will try to achieve a compile and report back. The addition of Virtualbox and OSX adds yet more dimensions of challenges to getting a good compile. Quartus II may appear working but actually not be wholly installed.

    I do realize you have OSX and desire to retain that. There are other ways around this.

    A. It might be possible to install a version of Fedora (Red Hat's free version) on a USB hard disk that boots from the USB port, and run your Quartus II in that. IF your hardware is adequate, this will bypass all the issues of Virtualbox and unsupported Linux distributions. I have a version of Debian 7.6 Wheezy amd64 on a USB harddisk that boots fine with my computer (but have not yet tried installed Quartus II V15.0.2.xxx

    B. Try a Windows 7 installation inside a virtual machine software and install Quartus II for Windows.

    As for myself, I am continuing to attempt a good Linux installation.

    Other people claim Quartus II runs in Debian Wheezy, but Altera officially supports only Red Hat Linux (which is not free). So it is difficult to get a clear picture of what installation choices in Linux are verified successes or bogus claims.

    At this point, I am still trying to determine if Quartus II V15.0.2.xxx (which is the latest to date) will perform a BeMicroCV or BeMicroCVA9 compile and install (I have both boards) on a newly installed Debian 8.1 Jessie regardless of some installation problems.

    I may have some news - good or bad within a few days.

    Here is a link to other OSX users attempting to install Quartus II (some are various older versions)
    http://www.alteraforum.com/forum/showthread.php?t=1040
    http://www.alteraforum.com/forum/showthread.php?t=35556
  • TorTor Posts: 2,010
    Quartus II (11.0 through 15.0.2) always worked for me on 64-bit Debian distros (SID, but that's a moving target - the latest setup I have is very close to Jessie). At least it works for everything I try to do, which isn't very much really - I'm fooling around with small demo projects as I'm not much up to speed when it comes to FPGA.
  • AleAle Posts: 2,363
    It boils down to if you can program the FPGA using your linux distro or not. At some point, using those "Jungo" drivers for linux I was able to program (ok, were Xilinx parts), some cplds and spartan3. I never got Quartus to program my CV, even when using CentOS. Diamond had similar problems. Those USB drivers/config what I know what ;(. I had a virtual machine qith WXP just to program the chips, convoluted but it worked.
    You can try CentOS if you want something RedHat compatible. I used to like SuSE and XUbuntu before I went Apple. But for MacOSX there is less and less software, it is my impression. I now just stick to win7 or 10. Not plussed but it works :( If only hybernate/sleep would work on any GNU/Linux (maybe it does, I just lost touch with its development) I'd try it again.
  • LoopyBytelooseLoopyByteloose Posts: 12,537
    edited 2015-08-07 20:21
    Hi all,
    Well I attempted to load the BeMicroCV image from the Parallax provided .zip. That has problems and failed to get beyond Analysis & Synthesis in Quartus II V15.0.2.xxx

    After an evening of frustration and investigation, it became obvious that I overlooked the Download feature in Jacgouldsmit's Github repository. So I downloaded his FAR BETTER AND UP-TO-DATE files, and started another Quartus II compile.

    Things are moving along, passed by Analysis & Synthesis and am progressing with what appears to be a clean build. My only problem is that I am compiling the wrong target -- the P123 A7 device. I don't have one and was trying to get an image for the BeMicroCV or BeMicroCVA9.

    +++++++++++
    So I will have to start over to get a complete install verified for Debian 8.1 Jessie amd 64 and Quartus II V15.0.2. But it is looking very very close to possible at this time.
  • LoopyBytelooseLoopyByteloose Posts: 12,537
    edited 2015-08-07 20:53
    Well, the Propeller 1-2-3 A-7 image compiled in a bit less than 20 minutes. But I dumped it and have managed to see how to properly get a BeMicroCV image set up and running -- which it is doing now.

    I have a BeMicroCV board and a Propeller Prop Tool on hand. If this goes well, I should be able to confirm a successful build in an hour or so. But it is 4:43AM here, so I may just get the board loaded with the Propeller image and go to bed. Actual running of the Propeller might be best after a bit of sleep.

    And outside a typhoon is roaring by................
  • I am too sleepy to continue. I did get my BeMicroCV compiled, but there were timing warnings I didn't fully understand.

    I couldn't seem to comprehend the conversion process. I am hoping that I saved my compile, which took less than 20 minutes and that I can start tomorrow where I left off.
  • Loopy,

    Are you riding out the storm? Seems to be a big one.

  • I just got up (about 2pm) after going to bed about 6am. The wind is still howling outside, but the dog wanted to go out for a nature call.

    Yes, it is a nice big typhoon directly hitting all of Taiwan. I have just stayed home and tried to sleep through the worst of it. It should be gone by tomorrow. No serious damage to me personally.

    I just want to get the BeMicroCV loaded with a working Propeller1v image. More later.
  • @jac_goudsmit: Changing USB to USB 2.0 on VirtualBox has fixed the programming issue.
    But somehow after a power cycle the FPGA doesn't boot from the configuration rom (first
    led from p1v not powering on, so no cogs are running / code not loaded).
  • LeonLeon Posts: 7,620
    Have you programmed the configuration memory, or just configured the FPGA? The former requires a different procedure which is described in the board documentation.
  • @Leon: Configuration of the FPGA works, but not programming the Configuration Memory.
    [img][/img]
  • 6581 wrote: »
    @Leon: Configuration of the FPGA works, but not programming the Configuration Memory.
    [img][/img]

    My screen looks exactly like that, except where it says "USB Blaster [2-2]", it says "USB Blaster [USB-0]" on my screen. That's probably just a Window vs. Linux thing. Sometimes the hardware isn't found, then I have to click on the "Hardware Setup" button to re-detect the hardware. Did you try that?

    ===Jac
  • Welll, I did get my Propeller 1V image to compile for the BeMicroCV, but in Debian 8.1 jessie amd64, it appears that the toolchain for the USB to jtag is broken. It may be that usbfs is not supported without additional installation in Debian 8.1.

    Try http://fpgacpu.ca/fpga/USB-Blaster-Debian.html for some material that might help others.
  • By following an ArchWiki on installing Altera Design Software, I finally got the USB-Blaster recognized and a jtagd started.

    It appears I have a successful download of Propeller 1 for BeMicroCV and all eight of the LEDs lit up after a report of 100% Programed.

    I still have to load the Propeller binaries and run verification.

    +++++++++++
    It has been a bit of a slog to get Debian 8.1 Jessie amd64 confirmed as working with Quartus II V15.0.2.xxx and I am not sure I have explained all the snags very well. But it can be done. And I would be happy to help any others that desire to try.

    Mentoring someone else might reduce their difficulties, and certainly would clarify what one must do to get things right.
  • LoopyBytelooseLoopyByteloose Posts: 12,537
    edited 2015-08-16 12:23
    I guess I was a wee bit optimistic.
    Everything in Quartus II V15.0.2 seems to indicate success, but when I remove the BeMicroCV from power and the repower -- all 8 Leds light up.

    The Readme.txt says I should only have one lit that represents Cog0 is ready.

    +++++
    Attempts to compile and load a .spin file via Brad's Spin Tool fail to find a Propeller.

    +++++
    Enough for today. So far I have twice recompiled all the Verilog from scratch, and attempted to load the BeMicroCV twice. Both times, all 8 LEDs lit. Both times, I cannot load a compiled Propeller binary.

    Also, I did run an Erase of the BeMicroCV in Quartus II between reloads. There are some other diagnostic choices that I will explore tomorrow. It certainly is a lot of software to learn in a short time.

    LATE Breaking NEWS -- Finally a successful download and test of Jac Goudsmit.s LED test that demonstrates working cogs. It seem that I overlooked that there are two pins free below where the Prop Plug should plug it.

    Fortunately it seems nothing was damaged.


    Nevertheless -- 7 LEDs are lit before the first load, not just ONE as mentioned in the readme.txt. Obviousl, the LED Cog Activity is inverted from what the Readme.txt says. When I load pfth Forth, the first Cog goes inactive and the second Cog becomes active.

    So the LEDs indicate how many Cogs are available, not how many are active.

    When I remove power the program is lost, and the device goes back to all 8 LEDs lit.
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