Small V-Prop: 2 Cog's, 4 KB ROM, 4KB Hub RAM

nutson

To accomodate some older (and smaller) FPGA boards (Cyclone 2C5) I made a small but usable V-Prop with 2 COG's in less than 5000 LE's and 12KB RAM (4KB HUB, 4KB ROM 4KB COG registers. It is running the attached SPIN program on the DE0-nano now. The oscilloscope shows two pins toggling. Thanks Cluso for the unscrambled ROM files. If there is interest, I will post the design files later, too exited now. Need more testing to see if there are unidentified aliasing problems.

Willy Ekerslyke

Excellent! I'm in the process of doing something similar, making it parameterised so the number of cogs is variable.

Imagine your 2-cog version with reduced I/O pins as a tiny 16-pin chip - it would be a great little peripheral controller

Cluso99

Very interesting. Did you remove the vga from one of the cogs? That saves some logic too - I posted the files for this.

I have a 40KB Hub RAM with 4KB ROM/RAM and 4 cogs of 4KB. I don't have anything running in the upper 2KB of cog yet.

pik33

Cluso99 wrote: »

Very interesting. Did you remove the vga from one of the cogs? That saves some logic too - I posted the files for this.

I have a 40KB Hub RAM with 4KB ROM/RAM and 4 cogs of 4KB. I don't have anything running in the upper 2KB of cog yet.

Make a logic which can load upper cog ram from the hub while the cog is running, then switch low ram with high ram... then again... then you will have something like a hubexec enabled cog.

Bill Henning

Cool!

I have a couple of 2C5 "Ebay specials" in my lab...

nutson wrote: »

To accomodate some older (and smaller) FPGA boards (Cyclone 2C5) I made a small but usable V-Prop with 2 COG's in less than 5000 LE's and 12KB RAM (4KB HUB, 4KB ROM 4KB COG registers. It is running the attached SPIN program on the DE0-nano now. The oscilloscope shows two pins toggling. Thanks Cluso for the unscrambled ROM files. If there is interest, I will post the design files later, too exited now. Need more testing to see if there are unidentified aliasing problems.

David Betz

pik33 wrote: »

Make a logic which can load upper cog ram from the hub while the cog is running, then switch low ram with high ram... then again... then you will have something like a hubexec enabled cog.

Wouldn't that be more like a COG that supports overlays? In fact, you can already do that with P1 although you have to use code to load the upper COG memory. I guess you're proposing to use the same mechanism used by coginit. The main complexity I can see with that is that unless it is a synchronous operation you'll have to arbitrate between the code running on the COG wanting to access the hub and the overlay loader trying to access the hub.

nutson

After commenting out the counters and videogenerator I am down to 2350LE's!!! That's what I had in mind a few years ago when I started out with a Verilog soft Cog. Thanks, Parallax.

Another experiment: when there are just a few COG's, the hub can rotate faster, I modified lines 68-72 in dig.v to rotate over 4 Cog's. The speedup can be seen for a simple testprogram that just does a series of RDLONG's.