PropBasic - shiftin/shiftout "speed" parm 5 - definition requested
pmrobert
Posts: 675
In a statement "shiftout spi_tx, spi_clk, msbfirst, %11101\5, so_speed" I can plug values into so_speed and increasing numbers definitely speed up the SPI transaction in an ascending manner to a certain point where the MCP3208 ADC chip doesn't respond. I'm not particularly fluent in PASM and see that changing that fifth parameter changes a couple of waitcnts in the emitted code. I've searched far and wide but am unable to find a definitive description of what unit this parameter is in. I can use up to 33 in a cog mode code task and 5 in the same task but running LMM mode; this matches Bean's statement elsewhere that LMM is 5-6 times slower than the equivalent cog mode code. Can anyone help me?
-Mike
-Mike
Comments
Then again, it could be table driven, 0 meaning lowest speed and going up from there.
PUB Init(pv_DataStart, pv_VP_Watch) _Fixup(pv_DataStart, pv_VP_Watch) Return ((pv_DataStart >> 2) << 18) + ((@__INIT >> 2) << 4) DAT ORG 0 __INIT mov dira,__InitDirA mov outa,__InitOutA ' ' ************************************* '' ** SPI INTERFACE DETAIL ** '' ************************************* ' SPI_CS0 PIN 0 HIGH ' SPI Chip Select - MCP3208 - 12 bit, 8 channel ADC 0 'SPI_CS0 PIN 0 HIGH ' SPI Chip Select - MCP3208 - 12 bit, 8 channel ADC 0 ' SPI_CS1 PIN 1 HIGH ' SPI Chip Select - MCP3208 - 12 bit, 8 channel ADC 1 'SPI_CS1 PIN 1 HIGH ' SPI Chip Select - MCP3208 - 12 bit, 8 channel ADC 1 ' SPI_CS2 PIN 2 HIGH ' SPI Chip Select - MCP3208 - 12 bit, 8 channel ADC 2 'SPI_CS2 PIN 2 HIGH ' SPI Chip Select - MCP3208 - 12 bit, 8 channel ADC 2 ' SPI_TX PIN 3 LOW ' SPI master out serial in to slave - TX 'SPI_TX PIN 3 LOW ' SPI master out serial in to slave - TX ' SPI_RX PIN 4 INPUT ' SPI master in serial out from slave - RX 'SPI_RX PIN 4 INPUT ' SPI master in serial out from slave - RX ' SPI_CLK PIN 5 LOW ' SPI clock from master to all slaves 'SPI_CLK PIN 5 LOW ' SPI clock from master to all slaves '' ADC0 Details '' MAP ADC0.0 '' IAT ADC0.1 - Post turbo '' CLT ADC0.2 '' BARO ADC0.3 '' O2 ADC0.4 '' TPS ADC0.5 '' EGT ADC0.6 '' IAT2 ADC0.7 - Pre turbo '' ADC1 Details '' ADC1.0 '' ADC1.1 '' ADC1.2 '' ADC1.3 '' ADC1.4 '' ADC1.5 '' ADC1.6 '' ADC1.7 '' ADC2 Details '' ADC2.0 '' ADC2.1 '' ADC2.2 '' ADC2.3 '' ADC2.4 '' ADC2.5 '' ADC2.6 '' ADC2.7 '' ** SPI INTERFACE DETAIL END ** ' chan var long ' chan var long ' adcchip var long ' adcchip var long ' adchubvar var long ' adchubvar var long ' adc_cnt var long ' adc_cnt var long ' c1 var long ' c1 var long ' c2 var long ' c2 var long ' so_speed con 33 ' cog only, non-LMM max speed, 2881 Hz, 347 usec ' so_speed con 33 ' cog only, non-LMM max speed, 2881 Hz, 347 usec ' 'so_speed con 5 ' LMM max speed, 474 Hz, 2108 usec __DO_5 ' do mov c1,cnt ' c1 = cnt mov adcchip,#0 ' for adcchip = 0 to 2 __FOR_adcchip_11 mov chan,#0 ' for chan = 0 to 7 __FOR_chan_12 cmps adcchip,#0 WZ, WC ' if adcchip = 0 then IF_NE jmp #__ELSE_24 or dira,SPI_CS0 ' high spi_cs0 or outa,SPI_CS0 or dira,SPI_CS0 ' low spi_cs0 andn outa,SPI_CS0 jmp #__ENDIF_24 ' elseif adcchip = 1 then __ELSE_24 cmps adcchip,#1 WZ, WC IF_NE jmp #__ELSE_25 or dira,SPI_CS1 ' high spi_cs1 or outa,SPI_CS1 or dira,SPI_CS1 ' low spi_cs1 andn outa,SPI_CS1 jmp #__ENDIF_24 ' elseif adcchip = 2 then __ELSE_25 cmps adcchip,#2 WZ, WC IF_NE jmp #__ELSE_26 or dira,SPI_CS2 ' high spi_cs2 or outa,SPI_CS2 or dira,SPI_CS2 ' low spi_cs2 andn outa,SPI_CS2 __ELSE_26 ' endif __ENDIF_24 mov adchubvar,#0 ' adchubvar = 0 mov adchubvar,adcchip ' adchubvar = adcchip * 8 shl adchubvar,#3 ' adchubvar = adchubvar + chan adds adchubvar,chan cmps chan,#0 WZ, WC ' if chan = 0 then IF_NE jmp #__ELSE_27 mov __temp1,SPI_TX ' shiftout spi_tx, spi_clk, msbfirst, %11000\5, so_speed or dira,__temp1 mov __temp2,SPI_CLK or dira,__temp2 mov __temp3,#24 mov __temp4,#5 shl __temp3,#27 mov __temp5,#20 add __temp5,cnt __L0029 shl __temp3,#1 WC muxc outa,__temp1 waitcnt __temp5,#20 xor outa,__temp2 waitcnt __temp5,#20 xor outa,__temp2 waitcnt __temp5,#20 djnz __temp4,#__L0029 jmp #__ENDIF_27 ' elseif chan = 1 then __ELSE_27 cmps chan,#1 WZ, WC IF_NE jmp #__ELSE_28 mov __temp1,SPI_TX ' shiftout spi_tx, spi_clk, msbfirst, %11001\5, so_speed or dira,__temp1 mov __temp2,SPI_CLK or dira,__temp2 mov __temp3,#25 mov __temp4,#5 shl __temp3,#27 mov __temp5,#20 add __temp5,cnt __L0030 shl __temp3,#1 WC muxc outa,__temp1 waitcnt __temp5,#20 xor outa,__temp2 waitcnt __temp5,#20 xor outa,__temp2 waitcnt __temp5,#20 djnz __temp4,#__L0030 jmp #__ENDIF_27 ' elseif chan = 2 then __ELSE_28 cmps chan,#2 WZ, WC IF_NE jmp #__ELSE_29 mov __temp1,SPI_TX ' shiftout spi_tx, spi_clk, msbfirst, %11010\5, so_speed or dira,__temp1 mov __temp2,SPI_CLK or dira,__temp2 mov __temp3,#26 mov __temp4,#5 shl __temp3,#27 mov __temp5,#20 add __temp5,cnt __L0031 shl __temp3,#1 WC muxc outa,__temp1 waitcnt __temp5,#20 xor outa,__temp2 waitcnt __temp5,#20 xor outa,__temp2 waitcnt __temp5,#20 djnz __temp4,#__L0031 jmp #__ENDIF_27 ' elseif chan = 3 then __ELSE_29 cmps chan,#3 WZ, WC IF_NE jmp #__ELSE_30 mov __temp1,SPI_TX ' shiftout spi_tx, spi_clk, msbfirst, %11011\5, so_speed or dira,__temp1 mov __temp2,SPI_CLK or dira,__temp2 mov __temp3,#27 mov __temp4,#5 shl __temp3,#27 mov __temp5,#20 add __temp5,cnt __L0032 shl __temp3,#1 WC muxc outa,__temp1 waitcnt __temp5,#20 xor outa,__temp2 waitcnt __temp5,#20 xor outa,__temp2 waitcnt __temp5,#20 djnz __temp4,#__L0032 jmp #__ENDIF_27 ' elseif chan = 4 then __ELSE_30 cmps chan,#4 WZ, WC IF_NE jmp #__ELSE_31 mov __temp1,SPI_TX ' shiftout spi_tx, spi_clk, msbfirst, %11100\5, so_speed or dira,__temp1 mov __temp2,SPI_CLK or dira,__temp2 mov __temp3,#28 mov __temp4,#5 shl __temp3,#27 mov __temp5,#20 add __temp5,cnt __L0033 shl __temp3,#1 WC muxc outa,__temp1 waitcnt __temp5,#20 xor outa,__temp2 waitcnt __temp5,#20 xor outa,__temp2 waitcnt __temp5,#20 djnz __temp4,#__L0033 jmp #__ENDIF_27 ' elseif chan = 5 then __ELSE_31 cmps chan,#5 WZ, WC IF_NE jmp #__ELSE_32 mov __temp1,SPI_TX ' shiftout spi_tx, spi_clk, msbfirst, %11101\5, so_speed or dira,__temp1 mov __temp2,SPI_CLK or dira,__temp2 mov __temp3,#29 mov __temp4,#5 shl __temp3,#27 mov __temp5,#20 add __temp5,cnt __L0034 shl __temp3,#1 WC muxc outa,__temp1 waitcnt __temp5,#20 xor outa,__temp2 waitcnt __temp5,#20 xor outa,__temp2 waitcnt __temp5,#20 djnz __temp4,#__L0034 jmp #__ENDIF_27 ' elseif chan = 6 then __ELSE_32 cmps chan,#6 WZ, WC IF_NE jmp #__ELSE_33 mov __temp1,SPI_TX ' shiftout spi_tx, spi_clk, msbfirst, %11110\5, so_speed or dira,__temp1 mov __temp2,SPI_CLK or dira,__temp2 mov __temp3,#30 mov __temp4,#5 shl __temp3,#27 mov __temp5,#20 add __temp5,cnt __L0035 shl __temp3,#1 WC muxc outa,__temp1 waitcnt __temp5,#20 xor outa,__temp2 waitcnt __temp5,#20 xor outa,__temp2 waitcnt __temp5,#20 djnz __temp4,#__L0035 jmp #__ENDIF_27 ' elseif chan = 7 then __ELSE_33 cmps chan,#7 WZ, WC IF_NE jmp #__ELSE_34 mov __temp1,SPI_TX ' shiftout spi_tx, spi_clk, msbfirst, %11111\5, so_speed or dira,__temp1 mov __temp2,SPI_CLK or dira,__temp2 mov __temp3,#31 mov __temp4,#5 shl __temp3,#27 mov __temp5,#20 add __temp5,cnt __L0036 shl __temp3,#1 WC muxc outa,__temp1 waitcnt __temp5,#20 xor outa,__temp2 waitcnt __temp5,#20 xor outa,__temp2 waitcnt __temp5,#20 djnz __temp4,#__L0036 ' 'elseif chan = 8 then ' ' shiftout spi_tx, spi_clk, msbfirst, %10000\5, so_speed 'Diff - 0=+, 1=- ' 'elseif chan = 9 then ' ' shiftout spi_tx, spi_clk, msbfirst, %10001\5, so_speed 'Diff - 0=-, 1=+ ' 'elseif chan = 10 then ' ' shiftout spi_tx, spi_clk, msbfirst, %10010\5, so_speed 'Diff - 2=+, 3=- ' 'elseif chan = 11 then ' ' shiftout spi_tx, spi_clk, msbfirst, %10011\5, so_speed 'Diff - 2=-, 3=+ ' 'elseif chan = 12 then ' ' shiftout spi_tx, spi_clk, msbfirst, %10100\5, so_speed 'Diff - 4=+, 5=- ' 'elseif chan = 13 then ' ' shiftout spi_tx, spi_clk, msbfirst, %10101\5, so_speed 'Diff - 4=-, 5=+ ' 'elseif chan = 14 then ' ' shiftout spi_tx, spi_clk, msbfirst, %10110\5, so_speed 'Diff - 6=+, 7=- ' 'elseif chan = 15 then ' ' shiftout spi_tx, spi_clk, msbfirst, %10111\5, so_speed 'Diff - 6=-, 7=+ __ELSE_34 ' endif __ENDIF_27 mov __temp1,SPI_RX ' shiftin spi_rx, spi_clk, msbpost, adc_cnt\13, so_speed andn dira,__temp1 mov __temp2,SPI_CLK or dira,__temp2 mov __temp3,#0 mov __temp4,#13 mov __temp5,cnt add __temp5,#24 __L0037 xor outa,__temp2 waitcnt __temp5,#24 xor outa,__temp2 waitcnt __temp5,#24 and __temp1,ina NR, WC rcl __temp3,#1 djnz __temp4,#__L0037 mov adc_cnt,__temp3 or dira,SPI_CLK ' low spi_clk andn outa,SPI_CLK ' 'adc_cnt = spi_rx mov __temp1,adchubvar ' wrlong adc(adchubvar), adc_cnt shl __temp1,#2 add __temp1,__adc_adr wrlong adc_cnt,__temp1 adds chan,#1 ' next cmps chan,#7 WZ, WC IF_BE jmp #__FOR_chan_12 __NEXT_chan_12 adds adcchip,#1 ' next cmps adcchip,#2 WZ, WC IF_BE jmp #__FOR_adcchip_11 __NEXT_adcchip_11 mov c2,cnt ' c2 = cnt - c1 subs c2,c1 wrlong c2,__h_adc_loop_cnt_adr ' wrlong h_adc_loop_cnt, c2 jmp #__DO_5 ' loop __LOOP_5 mov __temp1,#0 'ENDTASK waitpne __temp1,__temp1 '********************************************************************** __InitDirA LONG %00000000_00000000_00000000_00101111 __InitOutA LONG %00000000_00000000_00000000_00000111 SPI_CS0 LONG 1 << 0 SPI_CS1 LONG 1 << 1 SPI_CS2 LONG 1 << 2 SPI_TX LONG 1 << 3 SPI_RX LONG 1 << 4 SPI_CLK LONG 1 << 5 ____STRING_adr LONG 0 __clkfreq_adr LONG 0 __h_adc_loop_cnt_adr LONG 0 __adc_adr LONG 4 __verpm_adr LONG 100 __veload_adr LONG 180 __ve_table_adr LONG 260 __ign_table_adr LONG 1060 __h_rpm_adr LONG 1860 __h_load_adr LONG 1864 __h_ve_interp_adr LONG 1868 __h_ign_interp_adr LONG 1870 __calc_us_h_adr LONG 1872 __ECUUP_adr LONG 1876 __VERSION_adr LONG 1885 __OOPS_adr LONG 1943 __CMD_LIST_adr LONG 1966 __REBOOTING_adr LONG 2100 __ADC_TXT_adr LONG 2172 __ADCL_TXT_adr LONG 2205 __ADC0_TXT_adr LONG 2254 __ADC1_TXT_adr LONG 2263 __ADC2_TXT_adr LONG 2272 __US_TXT_adr LONG 2281 __HZ_TXT_adr LONG 2301 __ULINE_TXT_adr LONG 2308 __VE_adr LONG 2314 __IGN_adr LONG 2323 __remainder __temp1 RES 1 __temp2 RES 1 __temp3 RES 1 __temp4 RES 1 __temp5 RES 1 __param1 RES 1 __param2 RES 1 __param3 RES 1 __param4 RES 1 __paramcnt RES 1 chan RES 1 adcchip RES 1 adchubvar RES 1 adc_cnt RES 1 c1 RES 1 c2 RES 1 FIT 492 CON LSBFIRST = 0 MSBFIRST = 1 MSBPRE = 0 LSBPRE = 1 MSBPOST = 2 LSBPOST = 3 HOME = 1 GOTOXY = 2 CRSRLF = 3 CRSRRT = 4 CRSRUP = 5 CRSRN = 6 BEEP = 7 BKSP = 8 TAB = 9 LF = 10 CLREOL = 11 CLRDN = 12 CR = 13 GOTOX = 14 GOTOY = 15 CLS = 16 so_speed = 33 PUB _Fixup(pv_DataStart, pv_VP_Watch) __h_adc_loop_cnt_adr += pv_DataStart __adc_adr += pv_DataStart __verpm_adr += pv_DataStart __veload_adr += pv_DataStart __ve_table_adr += pv_DataStart __ign_table_adr += pv_DataStart __h_rpm_adr += pv_DataStart __h_load_adr += pv_DataStart __h_ve_interp_adr += pv_DataStart __h_ign_interp_adr += pv_DataStart __calc_us_h_adr += pv_DataStart __ECUUP_adr += pv_DataStart __VERSION_adr += pv_DataStart __OOPS_adr += pv_DataStart __CMD_LIST_adr += pv_DataStart __REBOOTING_adr += pv_DataStart __ADC_TXT_adr += pv_DataStart __ADCL_TXT_adr += pv_DataStart __ADC0_TXT_adr += pv_DataStart __ADC1_TXT_adr += pv_DataStart __ADC2_TXT_adr += pv_DataStart __US_TXT_adr += pv_DataStart __HZ_TXT_adr += pv_DataStart __ULINE_TXT_adr += pv_DataStart __VE_adr += pv_DataStart __IGN_adr += pv_DataStartand with value 5:
PUB Init(pv_DataStart, pv_VP_Watch) _Fixup(pv_DataStart, pv_VP_Watch) Return ((pv_DataStart >> 2) << 18) + ((@__INIT >> 2) << 4) DAT ORG 0 __INIT mov dira,__InitDirA mov outa,__InitOutA ' ' ************************************* '' ** SPI INTERFACE DETAIL ** '' ************************************* ' SPI_CS0 PIN 0 HIGH ' SPI Chip Select - MCP3208 - 12 bit, 8 channel ADC 0 'SPI_CS0 PIN 0 HIGH ' SPI Chip Select - MCP3208 - 12 bit, 8 channel ADC 0 ' SPI_CS1 PIN 1 HIGH ' SPI Chip Select - MCP3208 - 12 bit, 8 channel ADC 1 'SPI_CS1 PIN 1 HIGH ' SPI Chip Select - MCP3208 - 12 bit, 8 channel ADC 1 ' SPI_CS2 PIN 2 HIGH ' SPI Chip Select - MCP3208 - 12 bit, 8 channel ADC 2 'SPI_CS2 PIN 2 HIGH ' SPI Chip Select - MCP3208 - 12 bit, 8 channel ADC 2 ' SPI_TX PIN 3 LOW ' SPI master out serial in to slave - TX 'SPI_TX PIN 3 LOW ' SPI master out serial in to slave - TX ' SPI_RX PIN 4 INPUT ' SPI master in serial out from slave - RX 'SPI_RX PIN 4 INPUT ' SPI master in serial out from slave - RX ' SPI_CLK PIN 5 LOW ' SPI clock from master to all slaves 'SPI_CLK PIN 5 LOW ' SPI clock from master to all slaves '' ADC0 Details '' MAP ADC0.0 '' IAT ADC0.1 - Post turbo '' CLT ADC0.2 '' BARO ADC0.3 '' O2 ADC0.4 '' TPS ADC0.5 '' EGT ADC0.6 '' IAT2 ADC0.7 - Pre turbo '' ADC1 Details '' ADC1.0 '' ADC1.1 '' ADC1.2 '' ADC1.3 '' ADC1.4 '' ADC1.5 '' ADC1.6 '' ADC1.7 '' ADC2 Details '' ADC2.0 '' ADC2.1 '' ADC2.2 '' ADC2.3 '' ADC2.4 '' ADC2.5 '' ADC2.6 '' ADC2.7 '' ** SPI INTERFACE DETAIL END ** ' chan var long ' chan var long ' adcchip var long ' adcchip var long ' adchubvar var long ' adchubvar var long ' adc_cnt var long ' adc_cnt var long ' c1 var long ' c1 var long ' c2 var long ' c2 var long ' 'so_speed con 33 ' cog only, non-LMM max speed, 2881 Hz, 347 usec ' so_speed con 5 ' LMM max speed, 474 Hz, 2108 usec ' so_speed con 5 ' LMM max speed, 474 Hz, 2108 usec __DO_5 ' do mov c1,cnt ' c1 = cnt mov adcchip,#0 ' for adcchip = 0 to 2 __FOR_adcchip_11 mov chan,#0 ' for chan = 0 to 7 __FOR_chan_12 cmps adcchip,#0 WZ, WC ' if adcchip = 0 then IF_NE jmp #__ELSE_24 or dira,SPI_CS0 ' high spi_cs0 or outa,SPI_CS0 or dira,SPI_CS0 ' low spi_cs0 andn outa,SPI_CS0 jmp #__ENDIF_24 ' elseif adcchip = 1 then __ELSE_24 cmps adcchip,#1 WZ, WC IF_NE jmp #__ELSE_25 or dira,SPI_CS1 ' high spi_cs1 or outa,SPI_CS1 or dira,SPI_CS1 ' low spi_cs1 andn outa,SPI_CS1 jmp #__ENDIF_24 ' elseif adcchip = 2 then __ELSE_25 cmps adcchip,#2 WZ, WC IF_NE jmp #__ELSE_26 or dira,SPI_CS2 ' high spi_cs2 or outa,SPI_CS2 or dira,SPI_CS2 ' low spi_cs2 andn outa,SPI_CS2 __ELSE_26 ' endif __ENDIF_24 mov adchubvar,#0 ' adchubvar = 0 mov adchubvar,adcchip ' adchubvar = adcchip * 8 shl adchubvar,#3 ' adchubvar = adchubvar + chan adds adchubvar,chan cmps chan,#0 WZ, WC ' if chan = 0 then IF_NE jmp #__ELSE_27 mov __temp1,SPI_TX ' shiftout spi_tx, spi_clk, msbfirst, %11000\5, so_speed or dira,__temp1 mov __temp2,SPI_CLK or dira,__temp2 mov __temp3,#24 mov __temp4,#5 shl __temp3,#27 mov __temp5,#106 add __temp5,cnt __L0029 shl __temp3,#1 WC muxc outa,__temp1 waitcnt __temp5,#106 xor outa,__temp2 waitcnt __temp5,#106 xor outa,__temp2 waitcnt __temp5,#106 djnz __temp4,#__L0029 jmp #__ENDIF_27 ' elseif chan = 1 then __ELSE_27 cmps chan,#1 WZ, WC IF_NE jmp #__ELSE_28 mov __temp1,SPI_TX ' shiftout spi_tx, spi_clk, msbfirst, %11001\5, so_speed or dira,__temp1 mov __temp2,SPI_CLK or dira,__temp2 mov __temp3,#25 mov __temp4,#5 shl __temp3,#27 mov __temp5,#106 add __temp5,cnt __L0030 shl __temp3,#1 WC muxc outa,__temp1 waitcnt __temp5,#106 xor outa,__temp2 waitcnt __temp5,#106 xor outa,__temp2 waitcnt __temp5,#106 djnz __temp4,#__L0030 jmp #__ENDIF_27 ' elseif chan = 2 then __ELSE_28 cmps chan,#2 WZ, WC IF_NE jmp #__ELSE_29 mov __temp1,SPI_TX ' shiftout spi_tx, spi_clk, msbfirst, %11010\5, so_speed or dira,__temp1 mov __temp2,SPI_CLK or dira,__temp2 mov __temp3,#26 mov __temp4,#5 shl __temp3,#27 mov __temp5,#106 add __temp5,cnt __L0031 shl __temp3,#1 WC muxc outa,__temp1 waitcnt __temp5,#106 xor outa,__temp2 waitcnt __temp5,#106 xor outa,__temp2 waitcnt __temp5,#106 djnz __temp4,#__L0031 jmp #__ENDIF_27 ' elseif chan = 3 then __ELSE_29 cmps chan,#3 WZ, WC IF_NE jmp #__ELSE_30 mov __temp1,SPI_TX ' shiftout spi_tx, spi_clk, msbfirst, %11011\5, so_speed or dira,__temp1 mov __temp2,SPI_CLK or dira,__temp2 mov __temp3,#27 mov __temp4,#5 shl __temp3,#27 mov __temp5,#106 add __temp5,cnt __L0032 shl __temp3,#1 WC muxc outa,__temp1 waitcnt __temp5,#106 xor outa,__temp2 waitcnt __temp5,#106 xor outa,__temp2 waitcnt __temp5,#106 djnz __temp4,#__L0032 jmp #__ENDIF_27 ' elseif chan = 4 then __ELSE_30 cmps chan,#4 WZ, WC IF_NE jmp #__ELSE_31 mov __temp1,SPI_TX ' shiftout spi_tx, spi_clk, msbfirst, %11100\5, so_speed or dira,__temp1 mov __temp2,SPI_CLK or dira,__temp2 mov __temp3,#28 mov __temp4,#5 shl __temp3,#27 mov __temp5,#106 add __temp5,cnt __L0033 shl __temp3,#1 WC muxc outa,__temp1 waitcnt __temp5,#106 xor outa,__temp2 waitcnt __temp5,#106 xor outa,__temp2 waitcnt __temp5,#106 djnz __temp4,#__L0033 jmp #__ENDIF_27 ' elseif chan = 5 then __ELSE_31 cmps chan,#5 WZ, WC IF_NE jmp #__ELSE_32 mov __temp1,SPI_TX ' shiftout spi_tx, spi_clk, msbfirst, %11101\5, so_speed or dira,__temp1 mov __temp2,SPI_CLK or dira,__temp2 mov __temp3,#29 mov __temp4,#5 shl __temp3,#27 mov __temp5,#106 add __temp5,cnt __L0034 shl __temp3,#1 WC muxc outa,__temp1 waitcnt __temp5,#106 xor outa,__temp2 waitcnt __temp5,#106 xor outa,__temp2 waitcnt __temp5,#106 djnz __temp4,#__L0034 jmp #__ENDIF_27 ' elseif chan = 6 then __ELSE_32 cmps chan,#6 WZ, WC IF_NE jmp #__ELSE_33 mov __temp1,SPI_TX ' shiftout spi_tx, spi_clk, msbfirst, %11110\5, so_speed or dira,__temp1 mov __temp2,SPI_CLK or dira,__temp2 mov __temp3,#30 mov __temp4,#5 shl __temp3,#27 mov __temp5,#106 add __temp5,cnt __L0035 shl __temp3,#1 WC muxc outa,__temp1 waitcnt __temp5,#106 xor outa,__temp2 waitcnt __temp5,#106 xor outa,__temp2 waitcnt __temp5,#106 djnz __temp4,#__L0035 jmp #__ENDIF_27 ' elseif chan = 7 then __ELSE_33 cmps chan,#7 WZ, WC IF_NE jmp #__ELSE_34 mov __temp1,SPI_TX ' shiftout spi_tx, spi_clk, msbfirst, %11111\5, so_speed or dira,__temp1 mov __temp2,SPI_CLK or dira,__temp2 mov __temp3,#31 mov __temp4,#5 shl __temp3,#27 mov __temp5,#106 add __temp5,cnt __L0036 shl __temp3,#1 WC muxc outa,__temp1 waitcnt __temp5,#106 xor outa,__temp2 waitcnt __temp5,#106 xor outa,__temp2 waitcnt __temp5,#106 djnz __temp4,#__L0036 ' 'elseif chan = 8 then ' ' shiftout spi_tx, spi_clk, msbfirst, %10000\5, so_speed 'Diff - 0=+, 1=- ' 'elseif chan = 9 then ' ' shiftout spi_tx, spi_clk, msbfirst, %10001\5, so_speed 'Diff - 0=-, 1=+ ' 'elseif chan = 10 then ' ' shiftout spi_tx, spi_clk, msbfirst, %10010\5, so_speed 'Diff - 2=+, 3=- ' 'elseif chan = 11 then ' ' shiftout spi_tx, spi_clk, msbfirst, %10011\5, so_speed 'Diff - 2=-, 3=+ ' 'elseif chan = 12 then ' ' shiftout spi_tx, spi_clk, msbfirst, %10100\5, so_speed 'Diff - 4=+, 5=- ' 'elseif chan = 13 then ' ' shiftout spi_tx, spi_clk, msbfirst, %10101\5, so_speed 'Diff - 4=-, 5=+ ' 'elseif chan = 14 then ' ' shiftout spi_tx, spi_clk, msbfirst, %10110\5, so_speed 'Diff - 6=+, 7=- ' 'elseif chan = 15 then ' ' shiftout spi_tx, spi_clk, msbfirst, %10111\5, so_speed 'Diff - 6=-, 7=+ __ELSE_34 ' endif __ENDIF_27 mov __temp1,SPI_RX ' shiftin spi_rx, spi_clk, msbpost, adc_cnt\13, so_speed andn dira,__temp1 mov __temp2,SPI_CLK or dira,__temp2 mov __temp3,#0 mov __temp4,#13 mov __temp5,cnt add __temp5,#160 __L0037 xor outa,__temp2 waitcnt __temp5,#160 xor outa,__temp2 waitcnt __temp5,#160 and __temp1,ina NR, WC rcl __temp3,#1 djnz __temp4,#__L0037 mov adc_cnt,__temp3 or dira,SPI_CLK ' low spi_clk andn outa,SPI_CLK ' 'adc_cnt = spi_rx mov __temp1,adchubvar ' wrlong adc(adchubvar), adc_cnt shl __temp1,#2 add __temp1,__adc_adr wrlong adc_cnt,__temp1 adds chan,#1 ' next cmps chan,#7 WZ, WC IF_BE jmp #__FOR_chan_12 __NEXT_chan_12 adds adcchip,#1 ' next cmps adcchip,#2 WZ, WC IF_BE jmp #__FOR_adcchip_11 __NEXT_adcchip_11 mov c2,cnt ' c2 = cnt - c1 subs c2,c1 wrlong c2,__h_adc_loop_cnt_adr ' wrlong h_adc_loop_cnt, c2 jmp #__DO_5 ' loop __LOOP_5 mov __temp1,#0 'ENDTASK waitpne __temp1,__temp1 '********************************************************************** __InitDirA LONG %00000000_00000000_00000000_00101111 __InitOutA LONG %00000000_00000000_00000000_00000111 SPI_CS0 LONG 1 << 0 SPI_CS1 LONG 1 << 1 SPI_CS2 LONG 1 << 2 SPI_TX LONG 1 << 3 SPI_RX LONG 1 << 4 SPI_CLK LONG 1 << 5 ____STRING_adr LONG 0 __clkfreq_adr LONG 0 __h_adc_loop_cnt_adr LONG 0 __adc_adr LONG 4 __verpm_adr LONG 100 __veload_adr LONG 180 __ve_table_adr LONG 260 __ign_table_adr LONG 1060 __h_rpm_adr LONG 1860 __h_load_adr LONG 1864 __h_ve_interp_adr LONG 1868 __h_ign_interp_adr LONG 1870 __calc_us_h_adr LONG 1872 __ECUUP_adr LONG 1876 __VERSION_adr LONG 1885 __OOPS_adr LONG 1943 __CMD_LIST_adr LONG 1966 __REBOOTING_adr LONG 2100 __ADC_TXT_adr LONG 2172 __ADCL_TXT_adr LONG 2205 __ADC0_TXT_adr LONG 2254 __ADC1_TXT_adr LONG 2263 __ADC2_TXT_adr LONG 2272 __US_TXT_adr LONG 2281 __HZ_TXT_adr LONG 2301 __ULINE_TXT_adr LONG 2308 __VE_adr LONG 2314 __IGN_adr LONG 2323 __remainder __temp1 RES 1 __temp2 RES 1 __temp3 RES 1 __temp4 RES 1 __temp5 RES 1 __param1 RES 1 __param2 RES 1 __param3 RES 1 __param4 RES 1 __paramcnt RES 1 chan RES 1 adcchip RES 1 adchubvar RES 1 adc_cnt RES 1 c1 RES 1 c2 RES 1 FIT 492 CON LSBFIRST = 0 MSBFIRST = 1 MSBPRE = 0 LSBPRE = 1 MSBPOST = 2 LSBPOST = 3 HOME = 1 GOTOXY = 2 CRSRLF = 3 CRSRRT = 4 CRSRUP = 5 CRSRN = 6 BEEP = 7 BKSP = 8 TAB = 9 LF = 10 CLREOL = 11 CLRDN = 12 CR = 13 GOTOX = 14 GOTOY = 15 CLS = 16 so_speed = 5 PUB _Fixup(pv_DataStart, pv_VP_Watch) __h_adc_loop_cnt_adr += pv_DataStart __adc_adr += pv_DataStart __verpm_adr += pv_DataStart __veload_adr += pv_DataStart __ve_table_adr += pv_DataStart __ign_table_adr += pv_DataStart __h_rpm_adr += pv_DataStart __h_load_adr += pv_DataStart __h_ve_interp_adr += pv_DataStart __h_ign_interp_adr += pv_DataStart __calc_us_h_adr += pv_DataStart __ECUUP_adr += pv_DataStart __VERSION_adr += pv_DataStart __OOPS_adr += pv_DataStart __CMD_LIST_adr += pv_DataStart __REBOOTING_adr += pv_DataStart __ADC_TXT_adr += pv_DataStart __ADCL_TXT_adr += pv_DataStart __ADC0_TXT_adr += pv_DataStart __ADC1_TXT_adr += pv_DataStart __ADC2_TXT_adr += pv_DataStart __US_TXT_adr += pv_DataStart __HZ_TXT_adr += pv_DataStart __ULINE_TXT_adr += pv_DataStart __VE_adr += pv_DataStart __IGN_adr += pv_DataStartThe PropBasic code is:
My scope, the timing measurements I've placed in there and, I think, the PASM code tells me it increases the SPI clock and data rate. I'm just curious what multiplier/divider this parm is in relation to what base. Hope that makes sense...
Thank you -Mike
PUB Init(pv_DataStart, pv_VP_Watch) _Fixup(pv_DataStart, pv_VP_Watch) Return ((pv_DataStart >> 2) << 18) + ((@__INIT >> 2) << 4) DAT ORG 0 __INIT mov dira,__InitDirA mov outa,__InitOutA '' ************************************* '' ** SPI INTERFACE DETAIL ** '' ************************************* ' SPI_CS0 PIN 0 HIGH ' SPI Chip Select - MCP3208 - 12 bit, 8 channel ADC 0 'SPI_CS0 PIN 0 HIGH ' SPI Chip Select - MCP3208 - 12 bit, 8 channel ADC 0 ' SPI_CS1 PIN 1 HIGH ' SPI Chip Select - MCP3208 - 12 bit, 8 channel ADC 1 'SPI_CS1 PIN 1 HIGH ' SPI Chip Select - MCP3208 - 12 bit, 8 channel ADC 1 ' SPI_CS2 PIN 2 HIGH ' SPI Chip Select - MCP3208 - 12 bit, 8 channel ADC 2 'SPI_CS2 PIN 2 HIGH ' SPI Chip Select - MCP3208 - 12 bit, 8 channel ADC 2 ' SPI_TX PIN 3 LOW ' SPI master out serial in to slave - TX 'SPI_TX PIN 3 LOW ' SPI master out serial in to slave - TX ' SPI_RX PIN 4 INPUT ' SPI master in serial out from slave - RX 'SPI_RX PIN 4 INPUT ' SPI master in serial out from slave - RX ' SPI_CLK PIN 5 LOW ' SPI clock from master to all slaves 'SPI_CLK PIN 5 LOW ' SPI clock from master to all slaves '' ADC0 Details '' MAP ADC0.0 '' IAT ADC0.1 - Post turbo '' CLT ADC0.2 - Radiator In '' BARO ADC0.3 '' O2 ADC0.4 '' TPS ADC0.5 '' EGT ADC0.6 - Pre turbo '' IAT2 ADC0.7 - Pre turbo '' ADC1 Details '' EGT2 ADC1.0 - Post turbo '' CLT2 ADC1.1 - Radiator Out '' OIL ADC1.2 - Oil Cooler In '' OIL2 ADC1.3 - Oil Cooler Out '' KNK ADC1.4 - Knock Sensor '' ACLZ ADC1.5 - Accelerometer Z '' ACLX ADC1.6 - Accelerometer X '' ACLY ADC1.7 - Accelerometer Y '' ADC2 Details '' ADC2.0 '' ADC2.1 '' ADC2.2 '' ADC2.3 '' ADC2.4 '' ADC2.5 '' ADC2.6 '' ADC2.7 '' ** SPI INTERFACE DETAIL END ** ' chan var long ' chan var long ' adcchip var long ' adcchip var long ' adchubvar var long ' adchubvar var long ' adc_cnt var long ' adc_cnt var long ' c1 var long ' c1 var long ' c2 var long ' c2 var long ' adc_cmd var long ' adc_cmd var long ' so_speed con 32 ' cog only, non-LMM max speed, 2881 Hz, 347 usec ' so_speed con 32 ' cog only, non-LMM max speed, 2881 Hz, 347 usec ' 'so_speed con 5 ' LMM max speed, 560 Hz, 1784 usec __DO_5 ' do mov c1,cnt ' c1 = cnt mov adcchip,#0 ' for adcchip = 0 to 2 __FOR_adcchip_11 mov chan,#0 ' for chan = 0 to 7 __FOR_chan_12 cmps adcchip,#0 WZ, WC ' if adcchip = 0 then IF_NE jmp #__ELSE_24 or dira,SPI_CS0 ' high spi_cs0 or outa,SPI_CS0 or dira,SPI_CS0 ' low spi_cs0 andn outa,SPI_CS0 jmp #__ENDIF_24 ' elseif adcchip = 1 then __ELSE_24 cmps adcchip,#1 WZ, WC IF_NE jmp #__ELSE_25 or dira,SPI_CS1 ' high spi_cs1 or outa,SPI_CS1 or dira,SPI_CS1 ' low spi_cs1 andn outa,SPI_CS1 jmp #__ENDIF_24 ' elseif adcchip = 2 then __ELSE_25 cmps adcchip,#2 WZ, WC IF_NE jmp #__ELSE_26 or dira,SPI_CS2 ' high spi_cs2 or outa,SPI_CS2 or dira,SPI_CS2 ' low spi_cs2 andn outa,SPI_CS2 __ELSE_26 ' endif __ENDIF_24 mov adchubvar,#0 ' adchubvar = 0 mov adchubvar,adcchip ' adchubvar = adcchip * 8 shl adchubvar,#3 ' adchubvar = adchubvar + chan adds adchubvar,chan mov adc_cmd,chan ' adc_cmd = chan+%11000 adds adc_cmd,#24 mov __temp1,SPI_TX ' shiftout spi_tx, spi_clk, msbfirst, adc_cmd\5, so_speed or dira,__temp1 mov __temp2,SPI_CLK or dira,__temp2 mov __temp3,adc_cmd mov __temp4,#5 shl __temp3,#27 mov __temp5,#20 add __temp5,cnt __L0029 shl __temp3,#1 WC muxc outa,__temp1 waitcnt __temp5,#20 xor outa,__temp2 waitcnt __temp5,#20 xor outa,__temp2 waitcnt __temp5,#20 djnz __temp4,#__L0029 ' 'if chan = 0 then ' ' shiftout spi_tx, spi_clk, msbfirst, %11000\5, so_speed ' 'elseif chan = 1 then ' ' shiftout spi_tx, spi_clk, msbfirst, %11001\5, so_speed ' 'elseif chan = 2 then ' ' shiftout spi_tx, spi_clk, msbfirst, %11010\5, so_speed ' 'elseif chan = 3 then ' ' shiftout spi_tx, spi_clk, msbfirst, %11011\5, so_speed ' 'elseif chan = 4 then ' ' shiftout spi_tx, spi_clk, msbfirst, %11100\5, so_speed ' 'elseif chan = 5 then ' ' shiftout spi_tx, spi_clk, msbfirst, %11101\5, so_speed ' 'elseif chan = 6 then ' ' shiftout spi_tx, spi_clk, msbfirst, %11110\5, so_speed ' 'elseif chan = 7 then ' ' shiftout spi_tx, spi_clk, msbfirst, %11111\5, so_speed ' 'elseif chan = 8 then ' ' shiftout spi_tx, spi_clk, msbfirst, %10000\5, so_speed 'Diff - 0=+, 1=- ' 'elseif chan = 9 then ' ' shiftout spi_tx, spi_clk, msbfirst, %10001\5, so_speed 'Diff - 0=-, 1=+ ' 'elseif chan = 10 then ' ' shiftout spi_tx, spi_clk, msbfirst, %10010\5, so_speed 'Diff - 2=+, 3=- ' 'elseif chan = 11 then ' ' shiftout spi_tx, spi_clk, msbfirst, %10011\5, so_speed 'Diff - 2=-, 3=+ ' 'elseif chan = 12 then ' ' shiftout spi_tx, spi_clk, msbfirst, %10100\5, so_speed 'Diff - 4=+, 5=- ' 'elseif chan = 13 then ' ' shiftout spi_tx, spi_clk, msbfirst, %10101\5, so_speed 'Diff - 4=-, 5=+ ' 'elseif chan = 14 then ' ' shiftout spi_tx, spi_clk, msbfirst, %10110\5, so_speed 'Diff - 6=+, 7=- ' 'elseif chan = 15 then ' ' shiftout spi_tx, spi_clk, msbfirst, %10111\5, so_speed 'Diff - 6=-, 7=+ ' 'endif mov __temp1,SPI_RX ' shiftin spi_rx, spi_clk, msbpost, adc_cnt\13, so_speed andn dira,__temp1 mov __temp2,SPI_CLK or dira,__temp2 mov __temp3,#0 mov __temp4,#13 mov __temp5,cnt add __temp5,#25 __L0030 xor outa,__temp2 waitcnt __temp5,#25 xor outa,__temp2 waitcnt __temp5,#25 and __temp1,ina NR, WC rcl __temp3,#1 djnz __temp4,#__L0030 mov adc_cnt,__temp3 or dira,SPI_CLK ' low spi_clk andn outa,SPI_CLK ' 'adc_cnt = spi_rx mov __temp1,adchubvar ' wrlong adc(adchubvar), adc_cnt shl __temp1,#2 add __temp1,__adc_adr wrlong adc_cnt,__temp1 adds chan,#1 ' next cmps chan,#7 WZ, WC IF_BE jmp #__FOR_chan_12 __NEXT_chan_12 adds adcchip,#1 ' next cmps adcchip,#2 WZ, WC IF_BE jmp #__FOR_adcchip_11 __NEXT_adcchip_11 mov c2,cnt ' c2 = cnt - c1 subs c2,c1 wrlong c2,__h_adc_loop_cnt_adr ' wrlong h_adc_loop_cnt, c2 jmp #__DO_5 ' loop __LOOP_5 mov __temp1,#0 'ENDTASK waitpne __temp1,__temp1 '********************************************************************** __InitDirA LONG %00000000_00000000_00000000_00101111 __InitOutA LONG %00000000_00000000_00000000_00000111 SPI_CS0 LONG 1 << 0 SPI_CS1 LONG 1 << 1 SPI_CS2 LONG 1 << 2 SPI_TX LONG 1 << 3 SPI_RX LONG 1 << 4 SPI_CLK LONG 1 << 5 ____STRING_adr LONG 0 __clkfreq_adr LONG 0 __h_adc_loop_cnt_adr LONG 0 __adc_adr LONG 4 __verpm_adr LONG 100 __veload_adr LONG 180 __ve_table_adr LONG 260 __ign_table_adr LONG 1060 __h_rpm_adr LONG 1860 __h_load_adr LONG 1864 __h_ve_interp_adr LONG 1868 __h_ign_interp_adr LONG 1870 __calc_us_h_adr LONG 1872 __ECUUP_adr LONG 1876 __VERSION_adr LONG 1885 __OOPS_adr LONG 1943 __CMD_LIST_adr LONG 1966 __REBOOTING_adr LONG 2100 __ADC_TXT_adr LONG 2172 __ADCL_TXT_adr LONG 2205 __ADC0_TXT_adr LONG 2254 __ADC1_TXT_adr LONG 2263 __ADC2_TXT_adr LONG 2272 __US_TXT_adr LONG 2281 __HZ_TXT_adr LONG 2301 __ULINE_TXT_adr LONG 2308 __VE_adr LONG 2314 __IGN_adr LONG 2323 __remainder __temp1 RES 1 __temp2 RES 1 __temp3 RES 1 __temp4 RES 1 __temp5 RES 1 __param1 RES 1 __param2 RES 1 __param3 RES 1 __param4 RES 1 __paramcnt RES 1 chan RES 1 adcchip RES 1 adchubvar RES 1 adc_cnt RES 1 c1 RES 1 c2 RES 1 adc_cmd RES 1 FIT 492 CON LSBFIRST = 0 MSBFIRST = 1 MSBPRE = 0 LSBPRE = 1 MSBPOST = 2 LSBPOST = 3 HOME = 1 GOTOXY = 2 CRSRLF = 3 CRSRRT = 4 CRSRUP = 5 CRSRN = 6 BEEP = 7 BKSP = 8 TAB = 9 LF = 10 CLREOL = 11 CLRDN = 12 CR = 13 GOTOX = 14 GOTOY = 15 CLS = 16 so_speed = 32 PUB _Fixup(pv_DataStart, pv_VP_Watch) __h_adc_loop_cnt_adr += pv_DataStart __adc_adr += pv_DataStart __verpm_adr += pv_DataStart __veload_adr += pv_DataStart __ve_table_adr += pv_DataStart __ign_table_adr += pv_DataStart __h_rpm_adr += pv_DataStart __h_load_adr += pv_DataStart __h_ve_interp_adr += pv_DataStart __h_ign_interp_adr += pv_DataStart __calc_us_h_adr += pv_DataStart __ECUUP_adr += pv_DataStart __VERSION_adr += pv_DataStart __OOPS_adr += pv_DataStart __CMD_LIST_adr += pv_DataStart __REBOOTING_adr += pv_DataStart __ADC_TXT_adr += pv_DataStart __ADCL_TXT_adr += pv_DataStart __ADC0_TXT_adr += pv_DataStart __ADC1_TXT_adr += pv_DataStart __ADC2_TXT_adr += pv_DataStart __US_TXT_adr += pv_DataStart __HZ_TXT_adr += pv_DataStart __ULINE_TXT_adr += pv_DataStart __VE_adr += pv_DataStart __IGN_adr += pv_DataStartAnyway, I came up with a preliminary equation: baudrate = (clkfreq/1600)*speed. Note that this is clipped for n = 1 as we can only fit 511 into a literal parameter (533.3 required @80MHz). Other values are OK. Going towards higher numbers it's clipped as well (most likely in the code generator), 20 cycles seems to be the lower limit here (around speed = 26). HTH
Note that this equation works for 80MHz, it reacts to changes (40MHz has half the cycle count) so there may be some work required in that department (too lazy to check, 50k*speed seems to fit the bill). But this should work for you.
PS: My daughter was looking over my shoulder and said something about a black cat...
Thanks again,
-Mike
ShiftIn and ShiftOut have different instructions inside the loop, so the minimum is different for each of them.
If I remember correctly the default speed is 100KHz and gets scaled from there until the minimum is hit. So speed "2" would be about 200KHz etc.
Bean
-Mike