Are there some techichues to avoid line-to line VGA jitter? See attached picture. This is supposed to be a nice white rectangle, but the edges are not straight, and not stable - they look like waves, each line moves left and right, while the next moves in opposite direction
Tough to say without looking at your code, but I would guess that you are exceeding the WAITVID to WAITVID timing during horizontal blanking (probably after sync). Cycle count each WAITVID to WAITVID interval. Assume 6 cycles for WAITVID (I know the manual says 5, but I've seen glitches if the timing is too perfect) and 22 cycles for the first HUBOP after a WAITVID (remaining instructions will be sync'd to the HUB until the next WAITVID). Check the time for the number of cycles at your clockspeed versus the time for the number of PLLAs in FrameCounter.
@Andrey: I've seen jitter like this before. My monitor only auto-adjusts at resolutions above 800x600. Everything below has to be manually adjusted. Once adjusted the waves disappeared. Do you have a test case?
I am observing this on small 7" monitor, on 19" monitor, and on big LCD TV. I am suspecting this is due to pixel clock chosen. I have seen 5 MHz granularity in Chip Graceys' drivers. I am using timings calculated according to VESA coordinated video timing.
Thanks. I can see what you mean. Oddly enough my monitor lists the timing as 1280x768, your source claims 1024x768. Anyway, this'll have to wait until tomorrow.
Yes, all mine say 1280 as well. 1280x768 is a valid 15:9 format. As I understand, aspect ratio is determined by vertical sync pulse length - possibly I made a mistake there- but VESA CVT spreadsheet produces same results as my code generator
I have tried to play with pixel freq. If I make it a rough approximation to calculated value, rounding to nearest 5 MHz multiply (before that I was using 250 kHz as VESA CVT recommends) - I get a nice stable picture. My guess is that the reason is PLL jitter - without that rounding, the PLL clock only equals calculated frequency in average. Why I cannot actually use that rough rounding - because the objective is to get VESA standards - complying signal.
Anyway, I would appreciate if someone looks at the code - possibly I am missing something. kuroneko - I mean you
pixel clock is 63.5 MHz. All blanking interval generation consists of exactly 7 instructions:
I'm slightly confused by your 250kHz comment (previous post). Is that some recommended step size? Anyway, the PLL setup you posted comes down to 63.75MHz, 80_000_000/4K*408*(16/2) = 63_750_000. With that setting I get a small amount of jitter of I look closely. Changing the PLL setup to actually generate 63.50MHz ($19800000 -> $19666666) results in a stable picture (on my monitor that is). Can you give that setting a try?
Both frequencies differ by 250kHz which makes me wonder which frequency you actually want. Can you clarify?
That was an error in my CVT calculation. The freq must be 63.5 MHz. With corrected calculation, at 63.5 MHz I do see notable jitter on 7" monitor and big LCD TV. An old 15" monitor designed specifically for 1024x768 gives sharp stable picture. If I change frame rate to 75 Hz, both TV and 7" show even more jitter, and subtle jitter can be seen on 15" monitor.
I am attaching CVT description and spreadsheet, my CVT calculator and code builder, along with test code.
Comments
the shortest waitvid is for front porch - 48 pixels, translating into over 60 propeller clock cycles, which is much more than 34
Anyway, I would appreciate if someone looks at the code - possibly I am missing something. kuroneko - I mean you
Both frequencies differ by 250kHz which makes me wonder which frequency you actually want. Can you clarify?
I am attaching CVT description and spreadsheet, my CVT calculator and code builder, along with test code.